blob: 04084900d810b251913193c4efa06ec0ae367918 [file] [log] [blame]
Shawn Guo31a2fbf2013-05-03 11:24:47 +08001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 */
9
10#include <linux/irqchip.h>
11#include <linux/of.h>
12#include <linux/of_platform.h>
Fugang Duana9aec302013-09-04 10:58:17 +080013#include <linux/mfd/syscon.h>
14#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
15#include <linux/regmap.h>
Shawn Guo31a2fbf2013-05-03 11:24:47 +080016#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18
19#include "common.h"
Anson Huang751f7e92014-01-09 16:03:16 +080020#include "cpuidle.h"
Shawn Guo31a2fbf2013-05-03 11:24:47 +080021
Fugang Duana9aec302013-09-04 10:58:17 +080022static void __init imx6sl_fec_init(void)
23{
24 struct regmap *gpr;
25
26 /* set FEC clock from internal PLL clock source */
27 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
28 if (!IS_ERR(gpr)) {
29 regmap_update_bits(gpr, IOMUXC_GPR1,
30 IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
31 regmap_update_bits(gpr, IOMUXC_GPR1,
32 IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
33 } else {
34 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
35 }
36}
37
John Tobias1ed4aae2013-12-19 12:35:37 -080038static void __init imx6sl_init_late(void)
39{
40 /* imx6sl reuses imx6q cpufreq driver */
41 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
42 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
Anson Huang751f7e92014-01-09 16:03:16 +080043
44 imx6sl_cpuidle_init();
John Tobias1ed4aae2013-12-19 12:35:37 -080045}
46
Shawn Guo31a2fbf2013-05-03 11:24:47 +080047static void __init imx6sl_init_machine(void)
48{
Shawn Guoa2887542013-08-13 16:59:28 +080049 struct device *parent;
50
Shawn Guoa2887542013-08-13 16:59:28 +080051 parent = imx_soc_device_init();
52 if (parent == NULL)
53 pr_warn("failed to initialize soc device\n");
54
Kefeng Wang435ebcb2016-06-01 14:53:05 +080055 of_platform_default_populate(NULL, NULL, parent);
Fugang Duana9aec302013-09-04 10:58:17 +080056
57 imx6sl_fec_init();
Shawn Guo9ba64fe2013-10-17 10:07:09 +080058 imx_anatop_init();
Anson Huangdf595742014-01-17 11:39:05 +080059 imx6sl_pm_init();
Shawn Guo31a2fbf2013-05-03 11:24:47 +080060}
61
62static void __init imx6sl_init_irq(void)
63{
Marc Zyngier14517562015-03-13 16:05:37 +000064 imx_gpc_check_dt();
Shawn Guod8ce8232013-08-13 16:54:05 +080065 imx_init_revision_from_anatop();
Shawn Guo73dada72013-07-08 21:52:33 +080066 imx_init_l2cache();
Shawn Guo31a2fbf2013-05-03 11:24:47 +080067 imx_src_init();
Shawn Guo31a2fbf2013-05-03 11:24:47 +080068 irqchip_init();
Shawn Guo35e29162015-04-29 13:07:03 +080069 imx6_pm_ccm_init("fsl,imx6sl-ccm");
Shawn Guo31a2fbf2013-05-03 11:24:47 +080070}
71
Shawn Guo8756dd92014-07-01 16:03:00 +080072static const char * const imx6sl_dt_compat[] __initconst = {
Shawn Guo31a2fbf2013-05-03 11:24:47 +080073 "fsl,imx6sl",
74 NULL,
75};
76
77DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
Andrey Smirnov510aca62016-06-18 18:09:31 -070078 .l2c_aux_val = 0,
79 .l2c_aux_mask = ~0,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080080 .init_irq = imx6sl_init_irq,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080081 .init_machine = imx6sl_init_machine,
John Tobias1ed4aae2013-12-19 12:35:37 -080082 .init_late = imx6sl_init_late,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080083 .dt_compat = imx6sl_dt_compat,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080084MACHINE_END