| Lothar Wassmann | a9d4309 | 2009-07-16 20:51:21 -0400 | [diff] [blame] | 1 | /* |
| 2 | * board initialization code should put one of these into dev->platform_data |
| 3 | * and place the isp1362 onto platform_bus. |
| 4 | */ |
| 5 | |
| 6 | #ifndef __LINUX_USB_ISP1362_H__ |
| 7 | #define __LINUX_USB_ISP1362_H__ |
| 8 | |
| 9 | struct isp1362_platform_data { |
| 10 | /* Enable internal pulldown resistors on downstream ports */ |
| 11 | unsigned sel15Kres:1; |
| 12 | /* Clock cannot be stopped */ |
| 13 | unsigned clknotstop:1; |
| 14 | /* On-chip overcurrent protection */ |
| 15 | unsigned oc_enable:1; |
| 16 | /* INT output polarity */ |
| 17 | unsigned int_act_high:1; |
| 18 | /* INT edge or level triggered */ |
| 19 | unsigned int_edge_triggered:1; |
| 20 | /* DREQ output polarity */ |
| 21 | unsigned dreq_act_high:1; |
| 22 | /* DACK input polarity */ |
| 23 | unsigned dack_act_high:1; |
| 24 | /* chip can be resumed via H_WAKEUP pin */ |
| 25 | unsigned remote_wakeup_connected:1; |
| 26 | /* Switch or not to switch (keep always powered) */ |
| 27 | unsigned no_power_switching:1; |
| 28 | /* Ganged port power switching (0) or individual port power switching (1) */ |
| 29 | unsigned power_switching_mode:1; |
| 30 | /* Given port_power, msec/2 after power on till power good */ |
| 31 | u8 potpg; |
| 32 | /* Hardware reset set/clear */ |
| 33 | void (*reset) (struct device *dev, int set); |
| 34 | /* Clock start/stop */ |
| 35 | void (*clock) (struct device *dev, int start); |
| 36 | /* Inter-io delay (ns). The chip is picky about access timings; it |
| 37 | * expects at least: |
| 38 | * 110ns delay between consecutive accesses to DATA_REG, |
| 39 | * 300ns delay between access to ADDR_REG and DATA_REG (registers) |
| 40 | * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory) |
| 41 | * WE MUST NOT be activated during these intervals (even without CS!) |
| 42 | */ |
| 43 | void (*delay) (struct device *dev, unsigned int delay); |
| 44 | }; |
| 45 | |
| 46 | #endif |