blob: 1456b1c3e890f42a9f54ebb0be08f1d6b7651f05 [file] [log] [blame]
Rob Clarkc8afe682013-06-26 12:44:06 -04001/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include "msm_drv.h"
Rob Clark7198e6b2013-07-19 12:59:32 -040019#include "msm_gpu.h"
Rob Clarkdd2da6e2013-11-30 16:12:10 -050020#include "msm_kms.h"
Rob Clarkc8afe682013-06-26 12:44:06 -040021
Rob Clarkc8afe682013-06-26 12:44:06 -040022static void msm_fb_output_poll_changed(struct drm_device *dev)
23{
24 struct msm_drm_private *priv = dev->dev_private;
25 if (priv->fbdev)
26 drm_fb_helper_hotplug_event(priv->fbdev);
27}
28
29static const struct drm_mode_config_funcs mode_config_funcs = {
30 .fb_create = msm_framebuffer_create,
31 .output_poll_changed = msm_fb_output_poll_changed,
32};
33
Rob Clark871d8122013-11-16 12:56:06 -050034int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
Rob Clarkc8afe682013-06-26 12:44:06 -040035{
36 struct msm_drm_private *priv = dev->dev_private;
Rob Clark871d8122013-11-16 12:56:06 -050037 int idx = priv->num_mmus++;
Rob Clarkc8afe682013-06-26 12:44:06 -040038
Rob Clark871d8122013-11-16 12:56:06 -050039 if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
Rob Clarkc8afe682013-06-26 12:44:06 -040040 return -EINVAL;
41
Rob Clark871d8122013-11-16 12:56:06 -050042 priv->mmus[idx] = mmu;
Rob Clarkc8afe682013-06-26 12:44:06 -040043
44 return idx;
45}
46
Rob Clarkc8afe682013-06-26 12:44:06 -040047#ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
48static bool reglog = false;
49MODULE_PARM_DESC(reglog, "Enable register read/write logging");
50module_param(reglog, bool, 0600);
51#else
52#define reglog 0
53#endif
54
Rob Clark3a10ba82014-09-08 14:24:57 -040055static char *vram = "16m";
Rob Clark871d8122013-11-16 12:56:06 -050056MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU");
57module_param(vram, charp, 0);
58
Rob Clark060530f2014-03-03 14:19:12 -050059/*
60 * Util/helpers:
61 */
62
Rob Clarkc8afe682013-06-26 12:44:06 -040063void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
64 const char *dbgname)
65{
66 struct resource *res;
67 unsigned long size;
68 void __iomem *ptr;
69
70 if (name)
71 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
72 else
73 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
74
75 if (!res) {
76 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
77 return ERR_PTR(-EINVAL);
78 }
79
80 size = resource_size(res);
81
82 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
83 if (!ptr) {
84 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
85 return ERR_PTR(-ENOMEM);
86 }
87
88 if (reglog)
89 printk(KERN_DEBUG "IO:region %s %08x %08lx\n", dbgname, (u32)ptr, size);
90
91 return ptr;
92}
93
94void msm_writel(u32 data, void __iomem *addr)
95{
96 if (reglog)
97 printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
98 writel(data, addr);
99}
100
101u32 msm_readl(const void __iomem *addr)
102{
103 u32 val = readl(addr);
104 if (reglog)
105 printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
106 return val;
107}
108
109/*
110 * DRM operations:
111 */
112
113static int msm_unload(struct drm_device *dev)
114{
115 struct msm_drm_private *priv = dev->dev_private;
116 struct msm_kms *kms = priv->kms;
Rob Clark7198e6b2013-07-19 12:59:32 -0400117 struct msm_gpu *gpu = priv->gpu;
Rob Clarkc8afe682013-06-26 12:44:06 -0400118
119 drm_kms_helper_poll_fini(dev);
120 drm_mode_config_cleanup(dev);
121 drm_vblank_cleanup(dev);
122
123 pm_runtime_get_sync(dev->dev);
124 drm_irq_uninstall(dev);
125 pm_runtime_put_sync(dev->dev);
126
127 flush_workqueue(priv->wq);
128 destroy_workqueue(priv->wq);
129
130 if (kms) {
131 pm_runtime_disable(dev->dev);
132 kms->funcs->destroy(kms);
133 }
134
Rob Clark7198e6b2013-07-19 12:59:32 -0400135 if (gpu) {
136 mutex_lock(&dev->struct_mutex);
137 gpu->funcs->pm_suspend(gpu);
138 gpu->funcs->destroy(gpu);
139 mutex_unlock(&dev->struct_mutex);
140 }
Rob Clarkc8afe682013-06-26 12:44:06 -0400141
Rob Clark871d8122013-11-16 12:56:06 -0500142 if (priv->vram.paddr) {
143 DEFINE_DMA_ATTRS(attrs);
144 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
145 drm_mm_takedown(&priv->vram.mm);
146 dma_free_attrs(dev->dev, priv->vram.size, NULL,
147 priv->vram.paddr, &attrs);
148 }
149
Rob Clark060530f2014-03-03 14:19:12 -0500150 component_unbind_all(dev->dev, dev);
151
Rob Clarkc8afe682013-06-26 12:44:06 -0400152 dev->dev_private = NULL;
153
154 kfree(priv);
155
156 return 0;
157}
158
Rob Clark06c0dd92013-11-30 17:51:47 -0500159static int get_mdp_ver(struct platform_device *pdev)
160{
161#ifdef CONFIG_OF
Peter Griffin370a4d82014-06-05 18:30:58 +0100162 static const struct of_device_id match_types[] = { {
Rob Clark06c0dd92013-11-30 17:51:47 -0500163 .compatible = "qcom,mdss_mdp",
164 .data = (void *)5,
165 }, {
166 /* end node */
167 } };
168 struct device *dev = &pdev->dev;
169 const struct of_device_id *match;
170 match = of_match_node(match_types, dev->of_node);
171 if (match)
172 return (int)match->data;
173#endif
174 return 4;
175}
176
Rob Clarkc8afe682013-06-26 12:44:06 -0400177static int msm_load(struct drm_device *dev, unsigned long flags)
178{
179 struct platform_device *pdev = dev->platformdev;
180 struct msm_drm_private *priv;
181 struct msm_kms *kms;
182 int ret;
183
184 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
185 if (!priv) {
186 dev_err(dev->dev, "failed to allocate private data\n");
187 return -ENOMEM;
188 }
189
190 dev->dev_private = priv;
191
192 priv->wq = alloc_ordered_workqueue("msm", 0);
Rob Clark7198e6b2013-07-19 12:59:32 -0400193 init_waitqueue_head(&priv->fence_event);
Rob Clarkc8afe682013-06-26 12:44:06 -0400194
195 INIT_LIST_HEAD(&priv->inactive_list);
Rob Clarkedd4fc62013-09-14 14:01:55 -0400196 INIT_LIST_HEAD(&priv->fence_cbs);
Rob Clarkc8afe682013-06-26 12:44:06 -0400197
198 drm_mode_config_init(dev);
199
Rob Clark871d8122013-11-16 12:56:06 -0500200 /* if we have no IOMMU, then we need to use carveout allocator.
201 * Grab the entire CMA chunk carved out in early startup in
202 * mach-msm:
203 */
204 if (!iommu_present(&platform_bus_type)) {
205 DEFINE_DMA_ATTRS(attrs);
206 unsigned long size;
207 void *p;
208
209 DBG("using %s VRAM carveout", vram);
210 size = memparse(vram, NULL);
211 priv->vram.size = size;
212
213 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
214
215 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
216 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
217
218 /* note that for no-kernel-mapping, the vaddr returned
219 * is bogus, but non-null if allocation succeeded:
220 */
221 p = dma_alloc_attrs(dev->dev, size,
Rob Clark543d3012014-06-02 07:25:56 -0400222 &priv->vram.paddr, GFP_KERNEL, &attrs);
Rob Clark871d8122013-11-16 12:56:06 -0500223 if (!p) {
224 dev_err(dev->dev, "failed to allocate VRAM\n");
225 priv->vram.paddr = 0;
226 ret = -ENOMEM;
227 goto fail;
228 }
229
230 dev_info(dev->dev, "VRAM: %08x->%08x\n",
231 (uint32_t)priv->vram.paddr,
232 (uint32_t)(priv->vram.paddr + size));
233 }
234
Rob Clark060530f2014-03-03 14:19:12 -0500235 platform_set_drvdata(pdev, dev);
236
237 /* Bind all our sub-components: */
238 ret = component_bind_all(dev->dev, dev);
239 if (ret)
240 return ret;
241
Rob Clark06c0dd92013-11-30 17:51:47 -0500242 switch (get_mdp_ver(pdev)) {
243 case 4:
244 kms = mdp4_kms_init(dev);
245 break;
246 case 5:
247 kms = mdp5_kms_init(dev);
248 break;
249 default:
250 kms = ERR_PTR(-ENODEV);
251 break;
252 }
253
Rob Clarkc8afe682013-06-26 12:44:06 -0400254 if (IS_ERR(kms)) {
255 /*
256 * NOTE: once we have GPU support, having no kms should not
257 * be considered fatal.. ideally we would still support gpu
258 * and (for example) use dmabuf/prime to share buffers with
259 * imx drm driver on iMX5
260 */
261 dev_err(dev->dev, "failed to load kms\n");
Thomas Meyere4826a92013-09-16 23:19:54 +0200262 ret = PTR_ERR(kms);
Rob Clarkc8afe682013-06-26 12:44:06 -0400263 goto fail;
264 }
265
266 priv->kms = kms;
267
268 if (kms) {
269 pm_runtime_enable(dev->dev);
270 ret = kms->funcs->hw_init(kms);
271 if (ret) {
272 dev_err(dev->dev, "kms hw init failed: %d\n", ret);
273 goto fail;
274 }
275 }
276
277 dev->mode_config.min_width = 0;
278 dev->mode_config.min_height = 0;
279 dev->mode_config.max_width = 2048;
280 dev->mode_config.max_height = 2048;
281 dev->mode_config.funcs = &mode_config_funcs;
282
Rob Clarkd65bd0e2014-08-06 07:43:12 -0400283 ret = drm_vblank_init(dev, priv->num_crtcs);
Rob Clarkc8afe682013-06-26 12:44:06 -0400284 if (ret < 0) {
285 dev_err(dev->dev, "failed to initialize vblank\n");
286 goto fail;
287 }
288
289 pm_runtime_get_sync(dev->dev);
Daniel Vetterbb0f1b52013-11-03 21:09:27 +0100290 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
Rob Clarkc8afe682013-06-26 12:44:06 -0400291 pm_runtime_put_sync(dev->dev);
292 if (ret < 0) {
293 dev_err(dev->dev, "failed to install IRQ handler\n");
294 goto fail;
295 }
296
Rob Clarkc8afe682013-06-26 12:44:06 -0400297#ifdef CONFIG_DRM_MSM_FBDEV
298 priv->fbdev = msm_fbdev_init(dev);
299#endif
300
Rob Clarka7d3c952014-05-30 14:47:38 -0400301 ret = msm_debugfs_late_init(dev);
302 if (ret)
303 goto fail;
304
Rob Clarkc8afe682013-06-26 12:44:06 -0400305 drm_kms_helper_poll_init(dev);
306
307 return 0;
308
309fail:
310 msm_unload(dev);
311 return ret;
312}
313
Rob Clark7198e6b2013-07-19 12:59:32 -0400314static void load_gpu(struct drm_device *dev)
315{
Rob Clarka1ad3522014-07-11 11:59:22 -0400316 static DEFINE_MUTEX(init_lock);
Rob Clark7198e6b2013-07-19 12:59:32 -0400317 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -0400318
Rob Clarka1ad3522014-07-11 11:59:22 -0400319 mutex_lock(&init_lock);
Rob Clark7198e6b2013-07-19 12:59:32 -0400320
Rob Clarke2550b72014-09-05 13:30:27 -0400321 if (!priv->gpu)
322 priv->gpu = adreno_load_gpu(dev);
Rob Clarka1ad3522014-07-11 11:59:22 -0400323
Rob Clarka1ad3522014-07-11 11:59:22 -0400324 mutex_unlock(&init_lock);
Rob Clark7198e6b2013-07-19 12:59:32 -0400325}
326
327static int msm_open(struct drm_device *dev, struct drm_file *file)
328{
329 struct msm_file_private *ctx;
330
331 /* For now, load gpu on open.. to avoid the requirement of having
332 * firmware in the initrd.
333 */
334 load_gpu(dev);
335
336 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
337 if (!ctx)
338 return -ENOMEM;
339
340 file->driver_priv = ctx;
341
342 return 0;
343}
344
Rob Clarkc8afe682013-06-26 12:44:06 -0400345static void msm_preclose(struct drm_device *dev, struct drm_file *file)
346{
347 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -0400348 struct msm_file_private *ctx = file->driver_priv;
Rob Clarkc8afe682013-06-26 12:44:06 -0400349 struct msm_kms *kms = priv->kms;
Rob Clark7198e6b2013-07-19 12:59:32 -0400350
Rob Clarkc8afe682013-06-26 12:44:06 -0400351 if (kms)
352 kms->funcs->preclose(kms, file);
Rob Clark7198e6b2013-07-19 12:59:32 -0400353
354 mutex_lock(&dev->struct_mutex);
355 if (ctx == priv->lastctx)
356 priv->lastctx = NULL;
357 mutex_unlock(&dev->struct_mutex);
358
359 kfree(ctx);
Rob Clarkc8afe682013-06-26 12:44:06 -0400360}
361
362static void msm_lastclose(struct drm_device *dev)
363{
364 struct msm_drm_private *priv = dev->dev_private;
Rob Clark5ea1f752014-05-30 12:29:48 -0400365 if (priv->fbdev)
366 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400367}
368
Daniel Vettere9f0d762013-12-11 11:34:42 +0100369static irqreturn_t msm_irq(int irq, void *arg)
Rob Clarkc8afe682013-06-26 12:44:06 -0400370{
371 struct drm_device *dev = arg;
372 struct msm_drm_private *priv = dev->dev_private;
373 struct msm_kms *kms = priv->kms;
374 BUG_ON(!kms);
375 return kms->funcs->irq(kms);
376}
377
378static void msm_irq_preinstall(struct drm_device *dev)
379{
380 struct msm_drm_private *priv = dev->dev_private;
381 struct msm_kms *kms = priv->kms;
382 BUG_ON(!kms);
383 kms->funcs->irq_preinstall(kms);
384}
385
386static int msm_irq_postinstall(struct drm_device *dev)
387{
388 struct msm_drm_private *priv = dev->dev_private;
389 struct msm_kms *kms = priv->kms;
390 BUG_ON(!kms);
391 return kms->funcs->irq_postinstall(kms);
392}
393
394static void msm_irq_uninstall(struct drm_device *dev)
395{
396 struct msm_drm_private *priv = dev->dev_private;
397 struct msm_kms *kms = priv->kms;
398 BUG_ON(!kms);
399 kms->funcs->irq_uninstall(kms);
400}
401
402static int msm_enable_vblank(struct drm_device *dev, int crtc_id)
403{
404 struct msm_drm_private *priv = dev->dev_private;
405 struct msm_kms *kms = priv->kms;
406 if (!kms)
407 return -ENXIO;
408 DBG("dev=%p, crtc=%d", dev, crtc_id);
409 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]);
410}
411
412static void msm_disable_vblank(struct drm_device *dev, int crtc_id)
413{
414 struct msm_drm_private *priv = dev->dev_private;
415 struct msm_kms *kms = priv->kms;
416 if (!kms)
417 return;
418 DBG("dev=%p, crtc=%d", dev, crtc_id);
419 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]);
420}
421
422/*
423 * DRM debugfs:
424 */
425
426#ifdef CONFIG_DEBUG_FS
Rob Clark7198e6b2013-07-19 12:59:32 -0400427static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
428{
429 struct msm_drm_private *priv = dev->dev_private;
430 struct msm_gpu *gpu = priv->gpu;
431
432 if (gpu) {
433 seq_printf(m, "%s Status:\n", gpu->name);
434 gpu->funcs->show(gpu, m);
435 }
436
437 return 0;
438}
439
Rob Clarkc8afe682013-06-26 12:44:06 -0400440static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
441{
442 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -0400443 struct msm_gpu *gpu = priv->gpu;
Rob Clarkc8afe682013-06-26 12:44:06 -0400444
Rob Clark7198e6b2013-07-19 12:59:32 -0400445 if (gpu) {
446 seq_printf(m, "Active Objects (%s):\n", gpu->name);
447 msm_gem_describe_objects(&gpu->active_list, m);
448 }
449
450 seq_printf(m, "Inactive Objects:\n");
Rob Clarkc8afe682013-06-26 12:44:06 -0400451 msm_gem_describe_objects(&priv->inactive_list, m);
452
453 return 0;
454}
455
456static int msm_mm_show(struct drm_device *dev, struct seq_file *m)
457{
Daniel Vetterb04a5902013-12-11 14:24:46 +0100458 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
Rob Clarkc8afe682013-06-26 12:44:06 -0400459}
460
461static int msm_fb_show(struct drm_device *dev, struct seq_file *m)
462{
463 struct msm_drm_private *priv = dev->dev_private;
464 struct drm_framebuffer *fb, *fbdev_fb = NULL;
465
466 if (priv->fbdev) {
467 seq_printf(m, "fbcon ");
468 fbdev_fb = priv->fbdev->fb;
469 msm_framebuffer_describe(fbdev_fb, m);
470 }
471
472 mutex_lock(&dev->mode_config.fb_lock);
473 list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
474 if (fb == fbdev_fb)
475 continue;
476
477 seq_printf(m, "user ");
478 msm_framebuffer_describe(fb, m);
479 }
480 mutex_unlock(&dev->mode_config.fb_lock);
481
482 return 0;
483}
484
485static int show_locked(struct seq_file *m, void *arg)
486{
487 struct drm_info_node *node = (struct drm_info_node *) m->private;
488 struct drm_device *dev = node->minor->dev;
489 int (*show)(struct drm_device *dev, struct seq_file *m) =
490 node->info_ent->data;
491 int ret;
492
493 ret = mutex_lock_interruptible(&dev->struct_mutex);
494 if (ret)
495 return ret;
496
497 ret = show(dev, m);
498
499 mutex_unlock(&dev->struct_mutex);
500
501 return ret;
502}
503
504static struct drm_info_list msm_debugfs_list[] = {
Rob Clark7198e6b2013-07-19 12:59:32 -0400505 {"gpu", show_locked, 0, msm_gpu_show},
Rob Clarkc8afe682013-06-26 12:44:06 -0400506 {"gem", show_locked, 0, msm_gem_show},
507 { "mm", show_locked, 0, msm_mm_show },
508 { "fb", show_locked, 0, msm_fb_show },
509};
510
Rob Clarka7d3c952014-05-30 14:47:38 -0400511static int late_init_minor(struct drm_minor *minor)
512{
513 int ret;
514
515 if (!minor)
516 return 0;
517
518 ret = msm_rd_debugfs_init(minor);
519 if (ret) {
520 dev_err(minor->dev->dev, "could not install rd debugfs\n");
521 return ret;
522 }
523
Rob Clark70c70f02014-05-30 14:49:43 -0400524 ret = msm_perf_debugfs_init(minor);
525 if (ret) {
526 dev_err(minor->dev->dev, "could not install perf debugfs\n");
527 return ret;
528 }
529
Rob Clarka7d3c952014-05-30 14:47:38 -0400530 return 0;
531}
532
533int msm_debugfs_late_init(struct drm_device *dev)
534{
535 int ret;
536 ret = late_init_minor(dev->primary);
537 if (ret)
538 return ret;
539 ret = late_init_minor(dev->render);
540 if (ret)
541 return ret;
542 ret = late_init_minor(dev->control);
543 return ret;
544}
545
Rob Clarkc8afe682013-06-26 12:44:06 -0400546static int msm_debugfs_init(struct drm_minor *minor)
547{
548 struct drm_device *dev = minor->dev;
549 int ret;
550
551 ret = drm_debugfs_create_files(msm_debugfs_list,
552 ARRAY_SIZE(msm_debugfs_list),
553 minor->debugfs_root, minor);
554
555 if (ret) {
556 dev_err(dev->dev, "could not install msm_debugfs_list\n");
557 return ret;
558 }
559
Rob Clarka7d3c952014-05-30 14:47:38 -0400560 return 0;
Rob Clarkc8afe682013-06-26 12:44:06 -0400561}
562
563static void msm_debugfs_cleanup(struct drm_minor *minor)
564{
565 drm_debugfs_remove_files(msm_debugfs_list,
566 ARRAY_SIZE(msm_debugfs_list), minor);
Rob Clarka7d3c952014-05-30 14:47:38 -0400567 if (!minor->dev->dev_private)
568 return;
569 msm_rd_debugfs_cleanup(minor);
Rob Clark70c70f02014-05-30 14:49:43 -0400570 msm_perf_debugfs_cleanup(minor);
Rob Clarkc8afe682013-06-26 12:44:06 -0400571}
572#endif
573
Rob Clark7198e6b2013-07-19 12:59:32 -0400574/*
575 * Fences:
576 */
577
578int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
579 struct timespec *timeout)
580{
581 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -0400582 int ret;
583
Rob Clarkf816f272013-09-11 17:34:07 -0400584 if (!priv->gpu)
585 return 0;
Rob Clark7198e6b2013-07-19 12:59:32 -0400586
Rob Clarkf816f272013-09-11 17:34:07 -0400587 if (fence > priv->gpu->submitted_fence) {
588 DRM_ERROR("waiting on invalid fence: %u (of %u)\n",
589 fence, priv->gpu->submitted_fence);
590 return -EINVAL;
591 }
592
593 if (!timeout) {
594 /* no-wait: */
595 ret = fence_completed(dev, fence) ? 0 : -EBUSY;
596 } else {
597 unsigned long timeout_jiffies = timespec_to_jiffies(timeout);
598 unsigned long start_jiffies = jiffies;
599 unsigned long remaining_jiffies;
600
601 if (time_after(start_jiffies, timeout_jiffies))
602 remaining_jiffies = 0;
603 else
604 remaining_jiffies = timeout_jiffies - start_jiffies;
605
606 ret = wait_event_interruptible_timeout(priv->fence_event,
607 fence_completed(dev, fence),
608 remaining_jiffies);
609
610 if (ret == 0) {
611 DBG("timeout waiting for fence: %u (completed: %u)",
612 fence, priv->completed_fence);
613 ret = -ETIMEDOUT;
614 } else if (ret != -ERESTARTSYS) {
615 ret = 0;
616 }
Rob Clark7198e6b2013-07-19 12:59:32 -0400617 }
618
619 return ret;
620}
621
Rob Clark69193e52014-11-07 18:10:04 -0500622int msm_queue_fence_cb(struct drm_device *dev,
623 struct msm_fence_cb *cb, uint32_t fence)
624{
625 struct msm_drm_private *priv = dev->dev_private;
626 int ret = 0;
627
628 mutex_lock(&dev->struct_mutex);
629 if (!list_empty(&cb->work.entry)) {
630 ret = -EINVAL;
631 } else if (fence > priv->completed_fence) {
632 cb->fence = fence;
633 list_add_tail(&cb->work.entry, &priv->fence_cbs);
634 } else {
635 queue_work(priv->wq, &cb->work);
636 }
637 mutex_unlock(&dev->struct_mutex);
638
639 return ret;
640}
641
Rob Clarkedd4fc62013-09-14 14:01:55 -0400642/* called from workqueue */
Rob Clark7198e6b2013-07-19 12:59:32 -0400643void msm_update_fence(struct drm_device *dev, uint32_t fence)
644{
645 struct msm_drm_private *priv = dev->dev_private;
646
Rob Clarkedd4fc62013-09-14 14:01:55 -0400647 mutex_lock(&dev->struct_mutex);
648 priv->completed_fence = max(fence, priv->completed_fence);
649
650 while (!list_empty(&priv->fence_cbs)) {
651 struct msm_fence_cb *cb;
652
653 cb = list_first_entry(&priv->fence_cbs,
654 struct msm_fence_cb, work.entry);
655
656 if (cb->fence > priv->completed_fence)
657 break;
658
659 list_del_init(&cb->work.entry);
660 queue_work(priv->wq, &cb->work);
Rob Clark7198e6b2013-07-19 12:59:32 -0400661 }
Rob Clarkedd4fc62013-09-14 14:01:55 -0400662
663 mutex_unlock(&dev->struct_mutex);
664
665 wake_up_all(&priv->fence_event);
666}
667
668void __msm_fence_worker(struct work_struct *work)
669{
670 struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work);
671 cb->func(cb);
Rob Clark7198e6b2013-07-19 12:59:32 -0400672}
673
674/*
675 * DRM ioctls:
676 */
677
678static int msm_ioctl_get_param(struct drm_device *dev, void *data,
679 struct drm_file *file)
680{
681 struct msm_drm_private *priv = dev->dev_private;
682 struct drm_msm_param *args = data;
683 struct msm_gpu *gpu;
684
685 /* for now, we just have 3d pipe.. eventually this would need to
686 * be more clever to dispatch to appropriate gpu module:
687 */
688 if (args->pipe != MSM_PIPE_3D0)
689 return -EINVAL;
690
691 gpu = priv->gpu;
692
693 if (!gpu)
694 return -ENXIO;
695
696 return gpu->funcs->get_param(gpu, args->param, &args->value);
697}
698
699static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
700 struct drm_file *file)
701{
702 struct drm_msm_gem_new *args = data;
Rob Clark93ddb0d2014-03-03 09:42:33 -0500703
704 if (args->flags & ~MSM_BO_FLAGS) {
705 DRM_ERROR("invalid flags: %08x\n", args->flags);
706 return -EINVAL;
707 }
708
Rob Clark7198e6b2013-07-19 12:59:32 -0400709 return msm_gem_new_handle(dev, file, args->size,
710 args->flags, &args->handle);
711}
712
713#define TS(t) ((struct timespec){ .tv_sec = (t).tv_sec, .tv_nsec = (t).tv_nsec })
714
715static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
716 struct drm_file *file)
717{
718 struct drm_msm_gem_cpu_prep *args = data;
719 struct drm_gem_object *obj;
720 int ret;
721
Rob Clark93ddb0d2014-03-03 09:42:33 -0500722 if (args->op & ~MSM_PREP_FLAGS) {
723 DRM_ERROR("invalid op: %08x\n", args->op);
724 return -EINVAL;
725 }
726
Rob Clark7198e6b2013-07-19 12:59:32 -0400727 obj = drm_gem_object_lookup(dev, file, args->handle);
728 if (!obj)
729 return -ENOENT;
730
731 ret = msm_gem_cpu_prep(obj, args->op, &TS(args->timeout));
732
733 drm_gem_object_unreference_unlocked(obj);
734
735 return ret;
736}
737
738static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
739 struct drm_file *file)
740{
741 struct drm_msm_gem_cpu_fini *args = data;
742 struct drm_gem_object *obj;
743 int ret;
744
745 obj = drm_gem_object_lookup(dev, file, args->handle);
746 if (!obj)
747 return -ENOENT;
748
749 ret = msm_gem_cpu_fini(obj);
750
751 drm_gem_object_unreference_unlocked(obj);
752
753 return ret;
754}
755
756static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
757 struct drm_file *file)
758{
759 struct drm_msm_gem_info *args = data;
760 struct drm_gem_object *obj;
761 int ret = 0;
762
763 if (args->pad)
764 return -EINVAL;
765
766 obj = drm_gem_object_lookup(dev, file, args->handle);
767 if (!obj)
768 return -ENOENT;
769
770 args->offset = msm_gem_mmap_offset(obj);
771
772 drm_gem_object_unreference_unlocked(obj);
773
774 return ret;
775}
776
777static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
778 struct drm_file *file)
779{
780 struct drm_msm_wait_fence *args = data;
Rob Clark93ddb0d2014-03-03 09:42:33 -0500781
782 if (args->pad) {
783 DRM_ERROR("invalid pad: %08x\n", args->pad);
784 return -EINVAL;
785 }
786
787 return msm_wait_fence_interruptable(dev, args->fence,
788 &TS(args->timeout));
Rob Clark7198e6b2013-07-19 12:59:32 -0400789}
790
791static const struct drm_ioctl_desc msm_ioctls[] = {
Rob Clarkb4b15c82013-09-28 12:01:25 -0400792 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
793 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
794 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
795 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
796 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
797 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
798 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
Rob Clark7198e6b2013-07-19 12:59:32 -0400799};
800
Rob Clarkc8afe682013-06-26 12:44:06 -0400801static const struct vm_operations_struct vm_ops = {
802 .fault = msm_gem_fault,
803 .open = drm_gem_vm_open,
804 .close = drm_gem_vm_close,
805};
806
807static const struct file_operations fops = {
808 .owner = THIS_MODULE,
809 .open = drm_open,
810 .release = drm_release,
811 .unlocked_ioctl = drm_ioctl,
812#ifdef CONFIG_COMPAT
813 .compat_ioctl = drm_compat_ioctl,
814#endif
815 .poll = drm_poll,
816 .read = drm_read,
817 .llseek = no_llseek,
818 .mmap = msm_gem_mmap,
819};
820
821static struct drm_driver msm_driver = {
Rob Clark05b84912013-09-28 11:28:35 -0400822 .driver_features = DRIVER_HAVE_IRQ |
823 DRIVER_GEM |
824 DRIVER_PRIME |
Rob Clarkb4b15c82013-09-28 12:01:25 -0400825 DRIVER_RENDER |
Rob Clark05b84912013-09-28 11:28:35 -0400826 DRIVER_MODESET,
Rob Clarkc8afe682013-06-26 12:44:06 -0400827 .load = msm_load,
828 .unload = msm_unload,
Rob Clark7198e6b2013-07-19 12:59:32 -0400829 .open = msm_open,
Rob Clarkc8afe682013-06-26 12:44:06 -0400830 .preclose = msm_preclose,
831 .lastclose = msm_lastclose,
David Herrmann915b4d12014-08-29 12:12:43 +0200832 .set_busid = drm_platform_set_busid,
Rob Clarkc8afe682013-06-26 12:44:06 -0400833 .irq_handler = msm_irq,
834 .irq_preinstall = msm_irq_preinstall,
835 .irq_postinstall = msm_irq_postinstall,
836 .irq_uninstall = msm_irq_uninstall,
837 .get_vblank_counter = drm_vblank_count,
838 .enable_vblank = msm_enable_vblank,
839 .disable_vblank = msm_disable_vblank,
840 .gem_free_object = msm_gem_free_object,
841 .gem_vm_ops = &vm_ops,
842 .dumb_create = msm_gem_dumb_create,
843 .dumb_map_offset = msm_gem_dumb_map_offset,
Rob Clark30600a9092013-09-28 10:13:04 -0400844 .dumb_destroy = drm_gem_dumb_destroy,
Rob Clark05b84912013-09-28 11:28:35 -0400845 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
846 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
847 .gem_prime_export = drm_gem_prime_export,
848 .gem_prime_import = drm_gem_prime_import,
849 .gem_prime_pin = msm_gem_prime_pin,
850 .gem_prime_unpin = msm_gem_prime_unpin,
851 .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
852 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
853 .gem_prime_vmap = msm_gem_prime_vmap,
854 .gem_prime_vunmap = msm_gem_prime_vunmap,
Daniel Thompson77a147e2014-11-12 11:38:14 +0000855 .gem_prime_mmap = msm_gem_prime_mmap,
Rob Clarkc8afe682013-06-26 12:44:06 -0400856#ifdef CONFIG_DEBUG_FS
857 .debugfs_init = msm_debugfs_init,
858 .debugfs_cleanup = msm_debugfs_cleanup,
859#endif
Rob Clark7198e6b2013-07-19 12:59:32 -0400860 .ioctls = msm_ioctls,
861 .num_ioctls = DRM_MSM_NUM_IOCTLS,
Rob Clarkc8afe682013-06-26 12:44:06 -0400862 .fops = &fops,
863 .name = "msm",
864 .desc = "MSM Snapdragon DRM",
865 .date = "20130625",
866 .major = 1,
867 .minor = 0,
868};
869
870#ifdef CONFIG_PM_SLEEP
871static int msm_pm_suspend(struct device *dev)
872{
873 struct drm_device *ddev = dev_get_drvdata(dev);
874
875 drm_kms_helper_poll_disable(ddev);
876
877 return 0;
878}
879
880static int msm_pm_resume(struct device *dev)
881{
882 struct drm_device *ddev = dev_get_drvdata(dev);
883
884 drm_kms_helper_poll_enable(ddev);
885
886 return 0;
887}
888#endif
889
890static const struct dev_pm_ops msm_pm_ops = {
891 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
892};
893
894/*
Rob Clark060530f2014-03-03 14:19:12 -0500895 * Componentized driver support:
896 */
897
898#ifdef CONFIG_OF
899/* NOTE: the CONFIG_OF case duplicates the same code as exynos or imx
900 * (or probably any other).. so probably some room for some helpers
901 */
902static int compare_of(struct device *dev, void *data)
903{
904 return dev->of_node == data;
905}
Rob Clark41e69772013-12-15 16:23:05 -0500906
907static int add_components(struct device *dev, struct component_match **matchptr,
908 const char *name)
909{
910 struct device_node *np = dev->of_node;
911 unsigned i;
912
913 for (i = 0; ; i++) {
914 struct device_node *node;
915
916 node = of_parse_phandle(np, name, i);
917 if (!node)
918 break;
919
920 component_match_add(dev, matchptr, compare_of, node);
921 }
922
923 return 0;
924}
Russell King84448282014-04-19 11:20:42 +0100925#else
926static int compare_dev(struct device *dev, void *data)
Rob Clark060530f2014-03-03 14:19:12 -0500927{
Russell King84448282014-04-19 11:20:42 +0100928 return dev == data;
929}
930#endif
931
932static int msm_drm_bind(struct device *dev)
933{
934 return drm_platform_init(&msm_driver, to_platform_device(dev));
935}
936
937static void msm_drm_unbind(struct device *dev)
938{
939 drm_put_dev(platform_get_drvdata(to_platform_device(dev)));
940}
941
942static const struct component_master_ops msm_drm_ops = {
943 .bind = msm_drm_bind,
944 .unbind = msm_drm_unbind,
945};
946
947/*
948 * Platform driver:
949 */
950
951static int msm_pdev_probe(struct platform_device *pdev)
952{
953 struct component_match *match = NULL;
954#ifdef CONFIG_OF
Rob Clark41e69772013-12-15 16:23:05 -0500955 add_components(&pdev->dev, &match, "connectors");
956 add_components(&pdev->dev, &match, "gpus");
Rob Clark060530f2014-03-03 14:19:12 -0500957#else
Rob Clark060530f2014-03-03 14:19:12 -0500958 /* For non-DT case, it kinda sucks. We don't actually have a way
959 * to know whether or not we are waiting for certain devices (or if
960 * they are simply not present). But for non-DT we only need to
961 * care about apq8064/apq8060/etc (all mdp4/a3xx):
962 */
963 static const char *devnames[] = {
964 "hdmi_msm.0", "kgsl-3d0.0",
965 };
966 int i;
967
968 DBG("Adding components..");
969
970 for (i = 0; i < ARRAY_SIZE(devnames); i++) {
971 struct device *dev;
Rob Clark060530f2014-03-03 14:19:12 -0500972
973 dev = bus_find_device_by_name(&platform_bus_type,
974 NULL, devnames[i]);
975 if (!dev) {
Rob Clark12313c22014-08-04 15:45:16 -0400976 dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]);
Rob Clark060530f2014-03-03 14:19:12 -0500977 return -EPROBE_DEFER;
978 }
979
Russell King84448282014-04-19 11:20:42 +0100980 component_match_add(&pdev->dev, &match, compare_dev, dev);
Rob Clark060530f2014-03-03 14:19:12 -0500981 }
Rob Clark060530f2014-03-03 14:19:12 -0500982#endif
983
Rob Clark871d8122013-11-16 12:56:06 -0500984 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
Russell King84448282014-04-19 11:20:42 +0100985 return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
Rob Clarkc8afe682013-06-26 12:44:06 -0400986}
987
988static int msm_pdev_remove(struct platform_device *pdev)
989{
Rob Clark060530f2014-03-03 14:19:12 -0500990 component_master_del(&pdev->dev, &msm_drm_ops);
Rob Clarkc8afe682013-06-26 12:44:06 -0400991
992 return 0;
993}
994
995static const struct platform_device_id msm_id[] = {
996 { "mdp", 0 },
997 { }
998};
999
Rob Clark06c0dd92013-11-30 17:51:47 -05001000static const struct of_device_id dt_match[] = {
Rob Clark41e69772013-12-15 16:23:05 -05001001 { .compatible = "qcom,mdp" }, /* mdp4 */
1002 { .compatible = "qcom,mdss_mdp" }, /* mdp5 */
Rob Clark06c0dd92013-11-30 17:51:47 -05001003 {}
1004};
1005MODULE_DEVICE_TABLE(of, dt_match);
1006
Rob Clarkc8afe682013-06-26 12:44:06 -04001007static struct platform_driver msm_platform_driver = {
1008 .probe = msm_pdev_probe,
1009 .remove = msm_pdev_remove,
1010 .driver = {
1011 .owner = THIS_MODULE,
1012 .name = "msm",
Rob Clark06c0dd92013-11-30 17:51:47 -05001013 .of_match_table = dt_match,
Rob Clarkc8afe682013-06-26 12:44:06 -04001014 .pm = &msm_pm_ops,
1015 },
1016 .id_table = msm_id,
1017};
1018
1019static int __init msm_drm_register(void)
1020{
1021 DBG("init");
1022 hdmi_register();
Rob Clarkbfd28b12014-09-05 13:06:37 -04001023 adreno_register();
Rob Clarkc8afe682013-06-26 12:44:06 -04001024 return platform_driver_register(&msm_platform_driver);
1025}
1026
1027static void __exit msm_drm_unregister(void)
1028{
1029 DBG("fini");
1030 platform_driver_unregister(&msm_platform_driver);
1031 hdmi_unregister();
Rob Clarkbfd28b12014-09-05 13:06:37 -04001032 adreno_unregister();
Rob Clarkc8afe682013-06-26 12:44:06 -04001033}
1034
1035module_init(msm_drm_register);
1036module_exit(msm_drm_unregister);
1037
1038MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1039MODULE_DESCRIPTION("MSM DRM Driver");
1040MODULE_LICENSE("GPL");