| Dave Martin | d41418c0 | 2012-07-17 14:25:44 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/include/asm/dcscb_setup.S |
| 3 | * |
| 4 | * Created by: Dave Martin, 2012-06-22 |
| 5 | * Copyright: (C) 2012-2013 Linaro Limited |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/linkage.h> |
| 13 | |
| 14 | |
| 15 | ENTRY(dcscb_power_up_setup) |
| 16 | |
| 17 | cmp r0, #0 @ check affinity level |
| 18 | beq 2f |
| 19 | |
| 20 | /* |
| 21 | * Enable cluster-level coherency, in preparation for turning on the MMU. |
| 22 | * The ACTLR SMP bit does not need to be set here, because cpu_resume() |
| 23 | * already restores that. |
| 24 | * |
| 25 | * A15/A7 may not require explicit L2 invalidation on reset, dependent |
| 26 | * on hardware integration decisions. |
| 27 | * For now, this code assumes that L2 is either already invalidated, |
| 28 | * or invalidation is not required. |
| 29 | */ |
| 30 | |
| 31 | b cci_enable_port_for_self |
| 32 | |
| 33 | 2: @ Implementation-specific local CPU setup operations should go here, |
| 34 | @ if any. In this case, there is nothing to do. |
| 35 | |
| 36 | bx lr |
| 37 | |
| 38 | ENDPROC(dcscb_power_up_setup) |