blob: 8d9192d49f4a8136a4f140a4b5c349dcae0848f0 [file] [log] [blame]
Dan Williams6f231dd2011-07-02 22:56:22 -07001/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "isci.h"
Dan Williamsce2b3262011-05-08 15:49:15 -070057#include "host.h"
Dan Williams6f231dd2011-07-02 22:56:22 -070058#include "phy.h"
Dan Williamsd35bc1b2011-05-10 02:28:45 -070059#include "scu_event_codes.h"
Dan Williamse2f8db52011-05-10 02:28:46 -070060#include "probe_roms.h"
Dan Williams6f231dd2011-07-02 22:56:22 -070061
Dan Williamsd35bc1b2011-05-10 02:28:45 -070062/* Maximum arbitration wait time in micro-seconds */
63#define SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME (700)
64
Dan Williams85280952011-06-28 15:05:53 -070065enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -070066{
Dan Williams85280952011-06-28 15:05:53 -070067 return iphy->max_negotiated_speed;
Dan Williamsd35bc1b2011-05-10 02:28:45 -070068}
69
Dan Williams89a73012011-06-30 19:14:33 -070070static enum sci_status
71sci_phy_transport_layer_initialization(struct isci_phy *iphy,
72 struct scu_transport_layer_registers __iomem *reg)
Dan Williamsd35bc1b2011-05-10 02:28:45 -070073{
74 u32 tl_control;
75
Dan Williams89a73012011-06-30 19:14:33 -070076 iphy->transport_layer_registers = reg;
Dan Williamsd35bc1b2011-05-10 02:28:45 -070077
78 writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX,
Dan Williams85280952011-06-28 15:05:53 -070079 &iphy->transport_layer_registers->stp_rni);
Dan Williamsd35bc1b2011-05-10 02:28:45 -070080
81 /*
82 * Hardware team recommends that we enable the STP prefetch for all
83 * transports
84 */
Dan Williams85280952011-06-28 15:05:53 -070085 tl_control = readl(&iphy->transport_layer_registers->control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -070086 tl_control |= SCU_TLCR_GEN_BIT(STP_WRITE_DATA_PREFETCH);
Dan Williams85280952011-06-28 15:05:53 -070087 writel(tl_control, &iphy->transport_layer_registers->control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -070088
89 return SCI_SUCCESS;
90}
91
Dan Williamsd35bc1b2011-05-10 02:28:45 -070092static enum sci_status
Dan Williams89a73012011-06-30 19:14:33 -070093sci_phy_link_layer_initialization(struct isci_phy *iphy,
94 struct scu_link_layer_registers __iomem *reg)
Dan Williamsd35bc1b2011-05-10 02:28:45 -070095{
Dan Williams89a73012011-06-30 19:14:33 -070096 struct isci_host *ihost = iphy->owning_port->owning_controller;
Dan Williams85280952011-06-28 15:05:53 -070097 int phy_idx = iphy->phy_index;
Dan Williams89a73012011-06-30 19:14:33 -070098 struct sci_phy_user_params *phy_user = &ihost->user_parameters.phys[phy_idx];
Dan Williamsd35bc1b2011-05-10 02:28:45 -070099 struct sci_phy_oem_params *phy_oem =
Dan Williams89a73012011-06-30 19:14:33 -0700100 &ihost->oem_parameters.phys[phy_idx];
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700101 u32 phy_configuration;
Dan Williams89a73012011-06-30 19:14:33 -0700102 struct sci_phy_cap phy_cap;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700103 u32 parity_check = 0;
104 u32 parity_count = 0;
105 u32 llctl, link_rate;
106 u32 clksm_value = 0;
107
Dan Williams89a73012011-06-30 19:14:33 -0700108 iphy->link_layer_registers = reg;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700109
110 /* Set our IDENTIFY frame data */
111 #define SCI_END_DEVICE 0x01
112
113 writel(SCU_SAS_TIID_GEN_BIT(SMP_INITIATOR) |
114 SCU_SAS_TIID_GEN_BIT(SSP_INITIATOR) |
115 SCU_SAS_TIID_GEN_BIT(STP_INITIATOR) |
116 SCU_SAS_TIID_GEN_BIT(DA_SATA_HOST) |
117 SCU_SAS_TIID_GEN_VAL(DEVICE_TYPE, SCI_END_DEVICE),
Dan Williams85280952011-06-28 15:05:53 -0700118 &iphy->link_layer_registers->transmit_identification);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700119
120 /* Write the device SAS Address */
121 writel(0xFEDCBA98,
Dan Williams85280952011-06-28 15:05:53 -0700122 &iphy->link_layer_registers->sas_device_name_high);
123 writel(phy_idx, &iphy->link_layer_registers->sas_device_name_low);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700124
125 /* Write the source SAS Address */
126 writel(phy_oem->sas_address.high,
Dan Williams85280952011-06-28 15:05:53 -0700127 &iphy->link_layer_registers->source_sas_address_high);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700128 writel(phy_oem->sas_address.low,
Dan Williams85280952011-06-28 15:05:53 -0700129 &iphy->link_layer_registers->source_sas_address_low);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700130
131 /* Clear and Set the PHY Identifier */
Dan Williams85280952011-06-28 15:05:53 -0700132 writel(0, &iphy->link_layer_registers->identify_frame_phy_id);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700133 writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx),
Dan Williams85280952011-06-28 15:05:53 -0700134 &iphy->link_layer_registers->identify_frame_phy_id);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700135
136 /* Change the initial state of the phy configuration register */
137 phy_configuration =
Dan Williams85280952011-06-28 15:05:53 -0700138 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700139
140 /* Hold OOB state machine in reset */
141 phy_configuration |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
142 writel(phy_configuration,
Dan Williams85280952011-06-28 15:05:53 -0700143 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700144
145 /* Configure the SNW capabilities */
146 phy_cap.all = 0;
147 phy_cap.start = 1;
148 phy_cap.gen3_no_ssc = 1;
149 phy_cap.gen2_no_ssc = 1;
150 phy_cap.gen1_no_ssc = 1;
Dan Williams89a73012011-06-30 19:14:33 -0700151 if (ihost->oem_parameters.controller.do_enable_ssc == true) {
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700152 phy_cap.gen3_ssc = 1;
153 phy_cap.gen2_ssc = 1;
154 phy_cap.gen1_ssc = 1;
155 }
156
157 /*
158 * The SAS specification indicates that the phy_capabilities that
159 * are transmitted shall have an even parity. Calculate the parity. */
160 parity_check = phy_cap.all;
161 while (parity_check != 0) {
162 if (parity_check & 0x1)
163 parity_count++;
164 parity_check >>= 1;
165 }
166
167 /*
168 * If parity indicates there are an odd number of bits set, then
169 * set the parity bit to 1 in the phy capabilities. */
170 if ((parity_count % 2) != 0)
171 phy_cap.parity = 1;
172
Dan Williams85280952011-06-28 15:05:53 -0700173 writel(phy_cap.all, &iphy->link_layer_registers->phy_capabilities);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700174
175 /* Set the enable spinup period but disable the ability to send
176 * notify enable spinup
177 */
178 writel(SCU_ENSPINUP_GEN_VAL(COUNT,
179 phy_user->notify_enable_spin_up_insertion_frequency),
Dan Williams85280952011-06-28 15:05:53 -0700180 &iphy->link_layer_registers->notify_enable_spinup_control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700181
182 /* Write the ALIGN Insertion Ferequency for connected phy and
183 * inpendent of connected state
184 */
185 clksm_value = SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(CONNECTED,
186 phy_user->in_connection_align_insertion_frequency);
187
188 clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL,
189 phy_user->align_insertion_frequency);
190
Dan Williams85280952011-06-28 15:05:53 -0700191 writel(clksm_value, &iphy->link_layer_registers->clock_skew_management);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700192
193 /* @todo Provide a way to write this register correctly */
194 writel(0x02108421,
Dan Williams85280952011-06-28 15:05:53 -0700195 &iphy->link_layer_registers->afe_lookup_table_control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700196
197 llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT,
Dan Williams89a73012011-06-30 19:14:33 -0700198 (u8)ihost->user_parameters.no_outbound_task_timeout);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700199
James Bottomleya5ec7f862011-07-03 14:14:45 -0500200 switch (phy_user->max_speed_generation) {
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700201 case SCIC_SDS_PARM_GEN3_SPEED:
202 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3;
203 break;
204 case SCIC_SDS_PARM_GEN2_SPEED:
205 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2;
206 break;
207 default:
208 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1;
209 break;
210 }
211 llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate);
Dan Williams85280952011-06-28 15:05:53 -0700212 writel(llctl, &iphy->link_layer_registers->link_layer_control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700213
Dan Williamsdc00c8b2011-07-01 11:41:21 -0700214 if (is_a2(ihost->pdev)) {
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700215 /* Program the max ARB time for the PHY to 700us so we inter-operate with
216 * the PMC expander which shuts down PHYs if the expander PHY generates too
217 * many breaks. This time value will guarantee that the initiator PHY will
218 * generate the break.
219 */
220 writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME,
Dan Williams85280952011-06-28 15:05:53 -0700221 &iphy->link_layer_registers->maximum_arbitration_wait_timer_timeout);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700222 }
223
Jeff Skirvin9b917982011-06-20 14:09:31 -0700224 /* Disable link layer hang detection, rely on the OS timeout for I/O timeouts. */
Dan Williams85280952011-06-28 15:05:53 -0700225 writel(0, &iphy->link_layer_registers->link_layer_hang_detection_timeout);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700226
227 /* We can exit the initial state to the stopped state */
Dan Williams85280952011-06-28 15:05:53 -0700228 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700229
230 return SCI_SUCCESS;
231}
232
Edmund Nadolskia628d472011-05-19 11:59:36 +0000233static void phy_sata_timeout(unsigned long data)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700234{
Edmund Nadolskia628d472011-05-19 11:59:36 +0000235 struct sci_timer *tmr = (struct sci_timer *)data;
Dan Williams85280952011-06-28 15:05:53 -0700236 struct isci_phy *iphy = container_of(tmr, typeof(*iphy), sata_timer);
Dan Williamsd9dcb4b2011-06-30 17:38:32 -0700237 struct isci_host *ihost = iphy->owning_port->owning_controller;
Edmund Nadolskia628d472011-05-19 11:59:36 +0000238 unsigned long flags;
239
240 spin_lock_irqsave(&ihost->scic_lock, flags);
241
242 if (tmr->cancel)
243 goto done;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700244
Dan Williams85280952011-06-28 15:05:53 -0700245 dev_dbg(sciphy_to_dev(iphy),
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700246 "%s: SCIC SDS Phy 0x%p did not receive signature fis before "
247 "timeout.\n",
248 __func__,
Dan Williams85280952011-06-28 15:05:53 -0700249 iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700250
Dan Williams85280952011-06-28 15:05:53 -0700251 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Edmund Nadolskia628d472011-05-19 11:59:36 +0000252done:
253 spin_unlock_irqrestore(&ihost->scic_lock, flags);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700254}
255
256/**
257 * This method returns the port currently containing this phy. If the phy is
258 * currently contained by the dummy port, then the phy is considered to not
259 * be part of a port.
260 * @sci_phy: This parameter specifies the phy for which to retrieve the
261 * containing port.
262 *
263 * This method returns a handle to a port that contains the supplied phy.
264 * NULL This value is returned if the phy is not part of a real
265 * port (i.e. it's contained in the dummy port). !NULL All other
266 * values indicate a handle/pointer to the port containing the phy.
267 */
Dan Williams34a99152011-07-01 02:25:15 -0700268struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700269{
Dan Williams34a99152011-07-01 02:25:15 -0700270 struct isci_port *iport = iphy->owning_port;
271
272 if (iport->physical_port_index == SCIC_SDS_DUMMY_PORT)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700273 return NULL;
274
Dan Williams85280952011-06-28 15:05:53 -0700275 return iphy->owning_port;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700276}
277
278/**
279 * This method will assign a port to the phy object.
Dan Williams85280952011-06-28 15:05:53 -0700280 * @out]: iphy This parameter specifies the phy for which to assign a port
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700281 * object.
282 *
283 *
284 */
Dan Williams89a73012011-06-30 19:14:33 -0700285void sci_phy_set_port(
Dan Williams85280952011-06-28 15:05:53 -0700286 struct isci_phy *iphy,
Dan Williamsffe191c2011-06-29 13:09:25 -0700287 struct isci_port *iport)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700288{
Dan Williamsffe191c2011-06-29 13:09:25 -0700289 iphy->owning_port = iport;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700290
Dan Williams85280952011-06-28 15:05:53 -0700291 if (iphy->bcn_received_while_port_unassigned) {
292 iphy->bcn_received_while_port_unassigned = false;
Dan Williams89a73012011-06-30 19:14:33 -0700293 sci_port_broadcast_change_received(iphy->owning_port, iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700294 }
295}
296
Dan Williams89a73012011-06-30 19:14:33 -0700297enum sci_status sci_phy_initialize(struct isci_phy *iphy,
298 struct scu_transport_layer_registers __iomem *tl,
299 struct scu_link_layer_registers __iomem *ll)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700300{
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700301 /* Perfrom the initialization of the TL hardware */
Dan Williams89a73012011-06-30 19:14:33 -0700302 sci_phy_transport_layer_initialization(iphy, tl);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700303
304 /* Perofrm the initialization of the PE hardware */
Dan Williams89a73012011-06-30 19:14:33 -0700305 sci_phy_link_layer_initialization(iphy, ll);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700306
Dan Williams89a73012011-06-30 19:14:33 -0700307 /* There is nothing that needs to be done in this state just
308 * transition to the stopped state
309 */
Dan Williams85280952011-06-28 15:05:53 -0700310 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700311
312 return SCI_SUCCESS;
313}
314
315/**
316 * This method assigns the direct attached device ID for this phy.
317 *
Dan Williams85280952011-06-28 15:05:53 -0700318 * @iphy The phy for which the direct attached device id is to
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700319 * be assigned.
320 * @device_id The direct attached device ID to assign to the phy.
321 * This will either be the RNi for the device or an invalid RNi if there
322 * is no current device assigned to the phy.
323 */
Dan Williams89a73012011-06-30 19:14:33 -0700324void sci_phy_setup_transport(struct isci_phy *iphy, u32 device_id)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700325{
326 u32 tl_control;
327
Dan Williams85280952011-06-28 15:05:53 -0700328 writel(device_id, &iphy->transport_layer_registers->stp_rni);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700329
330 /*
331 * The read should guarantee that the first write gets posted
332 * before the next write
333 */
Dan Williams85280952011-06-28 15:05:53 -0700334 tl_control = readl(&iphy->transport_layer_registers->control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700335 tl_control |= SCU_TLCR_GEN_BIT(CLEAR_TCI_NCQ_MAPPING_TABLE);
Dan Williams85280952011-06-28 15:05:53 -0700336 writel(tl_control, &iphy->transport_layer_registers->control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700337}
338
Dan Williams89a73012011-06-30 19:14:33 -0700339static void sci_phy_suspend(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700340{
341 u32 scu_sas_pcfg_value;
342
343 scu_sas_pcfg_value =
Dan Williams85280952011-06-28 15:05:53 -0700344 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700345 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE);
346 writel(scu_sas_pcfg_value,
Dan Williams85280952011-06-28 15:05:53 -0700347 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700348
Dan Williams89a73012011-06-30 19:14:33 -0700349 sci_phy_setup_transport(iphy, SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700350}
351
Dan Williams89a73012011-06-30 19:14:33 -0700352void sci_phy_resume(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700353{
354 u32 scu_sas_pcfg_value;
355
356 scu_sas_pcfg_value =
Dan Williams85280952011-06-28 15:05:53 -0700357 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700358 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE);
359 writel(scu_sas_pcfg_value,
Dan Williams85280952011-06-28 15:05:53 -0700360 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700361}
362
Dan Williams89a73012011-06-30 19:14:33 -0700363void sci_phy_get_sas_address(struct isci_phy *iphy, struct sci_sas_address *sas)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700364{
Dan Williams89a73012011-06-30 19:14:33 -0700365 sas->high = readl(&iphy->link_layer_registers->source_sas_address_high);
366 sas->low = readl(&iphy->link_layer_registers->source_sas_address_low);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700367}
368
Dan Williams89a73012011-06-30 19:14:33 -0700369void sci_phy_get_attached_sas_address(struct isci_phy *iphy, struct sci_sas_address *sas)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700370{
371 struct sas_identify_frame *iaf;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700372
373 iaf = &iphy->frame_rcvd.iaf;
Dan Williams89a73012011-06-30 19:14:33 -0700374 memcpy(sas, iaf->sas_addr, SAS_ADDR_SIZE);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700375}
376
Dan Williams89a73012011-06-30 19:14:33 -0700377void sci_phy_get_protocols(struct isci_phy *iphy, struct sci_phy_proto *proto)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700378{
Dan Williams89a73012011-06-30 19:14:33 -0700379 proto->all = readl(&iphy->link_layer_registers->transmit_identification);
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700380}
381
Dan Williams89a73012011-06-30 19:14:33 -0700382enum sci_status sci_phy_start(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700383{
Dan Williams89a73012011-06-30 19:14:33 -0700384 enum sci_phy_states state = iphy->sm.current_state_id;
Dan Williams966699b2011-05-12 03:44:24 -0700385
Edmund Nadolskie3013702011-06-02 00:10:43 +0000386 if (state != SCI_PHY_STOPPED) {
Dan Williams85280952011-06-28 15:05:53 -0700387 dev_dbg(sciphy_to_dev(iphy),
Dan Williams966699b2011-05-12 03:44:24 -0700388 "%s: in wrong state: %d\n", __func__, state);
389 return SCI_FAILURE_INVALID_STATE;
390 }
391
Dan Williams85280952011-06-28 15:05:53 -0700392 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams966699b2011-05-12 03:44:24 -0700393 return SCI_SUCCESS;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700394}
395
Dan Williams89a73012011-06-30 19:14:33 -0700396enum sci_status sci_phy_stop(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700397{
Dan Williams89a73012011-06-30 19:14:33 -0700398 enum sci_phy_states state = iphy->sm.current_state_id;
Dan Williams93153232011-05-12 04:01:03 -0700399
400 switch (state) {
Edmund Nadolskie3013702011-06-02 00:10:43 +0000401 case SCI_PHY_SUB_INITIAL:
402 case SCI_PHY_SUB_AWAIT_OSSP_EN:
403 case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN:
404 case SCI_PHY_SUB_AWAIT_SAS_POWER:
405 case SCI_PHY_SUB_AWAIT_SATA_POWER:
406 case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:
407 case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:
408 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:
409 case SCI_PHY_SUB_FINAL:
410 case SCI_PHY_READY:
Dan Williams93153232011-05-12 04:01:03 -0700411 break;
412 default:
Dan Williams85280952011-06-28 15:05:53 -0700413 dev_dbg(sciphy_to_dev(iphy),
Dan Williams93153232011-05-12 04:01:03 -0700414 "%s: in wrong state: %d\n", __func__, state);
415 return SCI_FAILURE_INVALID_STATE;
416 }
417
Dan Williams85280952011-06-28 15:05:53 -0700418 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
Dan Williams93153232011-05-12 04:01:03 -0700419 return SCI_SUCCESS;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700420}
421
Dan Williams89a73012011-06-30 19:14:33 -0700422enum sci_status sci_phy_reset(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700423{
Dan Williams89a73012011-06-30 19:14:33 -0700424 enum sci_phy_states state = iphy->sm.current_state_id;
Dan Williams0cf36fa2011-05-12 04:02:07 -0700425
Edmund Nadolskie3013702011-06-02 00:10:43 +0000426 if (state != SCI_PHY_READY) {
Dan Williams85280952011-06-28 15:05:53 -0700427 dev_dbg(sciphy_to_dev(iphy),
Dan Williams0cf36fa2011-05-12 04:02:07 -0700428 "%s: in wrong state: %d\n", __func__, state);
429 return SCI_FAILURE_INVALID_STATE;
430 }
431
Dan Williams85280952011-06-28 15:05:53 -0700432 sci_change_state(&iphy->sm, SCI_PHY_RESETTING);
Dan Williams0cf36fa2011-05-12 04:02:07 -0700433 return SCI_SUCCESS;
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700434}
435
Dan Williams89a73012011-06-30 19:14:33 -0700436enum sci_status sci_phy_consume_power_handler(struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700437{
Dan Williams89a73012011-06-30 19:14:33 -0700438 enum sci_phy_states state = iphy->sm.current_state_id;
Dan Williams5b1d4af2011-05-12 04:51:41 -0700439
440 switch (state) {
Edmund Nadolskie3013702011-06-02 00:10:43 +0000441 case SCI_PHY_SUB_AWAIT_SAS_POWER: {
Dan Williams5b1d4af2011-05-12 04:51:41 -0700442 u32 enable_spinup;
443
Dan Williams85280952011-06-28 15:05:53 -0700444 enable_spinup = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700445 enable_spinup |= SCU_ENSPINUP_GEN_BIT(ENABLE);
Dan Williams85280952011-06-28 15:05:53 -0700446 writel(enable_spinup, &iphy->link_layer_registers->notify_enable_spinup_control);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700447
448 /* Change state to the final state this substate machine has run to completion */
Dan Williams85280952011-06-28 15:05:53 -0700449 sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700450
451 return SCI_SUCCESS;
452 }
Edmund Nadolskie3013702011-06-02 00:10:43 +0000453 case SCI_PHY_SUB_AWAIT_SATA_POWER: {
Dan Williams5b1d4af2011-05-12 04:51:41 -0700454 u32 scu_sas_pcfg_value;
455
456 /* Release the spinup hold state and reset the OOB state machine */
457 scu_sas_pcfg_value =
Dan Williams85280952011-06-28 15:05:53 -0700458 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700459 scu_sas_pcfg_value &=
460 ~(SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD) | SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE));
461 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
462 writel(scu_sas_pcfg_value,
Dan Williams85280952011-06-28 15:05:53 -0700463 &iphy->link_layer_registers->phy_configuration);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700464
465 /* Now restart the OOB operation */
466 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
467 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
468 writel(scu_sas_pcfg_value,
Dan Williams85280952011-06-28 15:05:53 -0700469 &iphy->link_layer_registers->phy_configuration);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700470
471 /* Change state to the final state this substate machine has run to completion */
Dan Williams85280952011-06-28 15:05:53 -0700472 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_PHY_EN);
Dan Williams5b1d4af2011-05-12 04:51:41 -0700473
474 return SCI_SUCCESS;
475 }
476 default:
Dan Williams85280952011-06-28 15:05:53 -0700477 dev_dbg(sciphy_to_dev(iphy),
Dan Williams5b1d4af2011-05-12 04:51:41 -0700478 "%s: in wrong state: %d\n", __func__, state);
479 return SCI_FAILURE_INVALID_STATE;
480 }
Dan Williams23506a62011-05-12 04:27:29 -0700481}
482
Dan Williams89a73012011-06-30 19:14:33 -0700483static void sci_phy_start_sas_link_training(struct isci_phy *iphy)
Dan Williams23506a62011-05-12 04:27:29 -0700484{
Dan Williams89a73012011-06-30 19:14:33 -0700485 /* continue the link training for the phy as if it were a SAS PHY
486 * instead of a SATA PHY. This is done because the completion queue had a SAS
487 * PHY DETECTED event when the state machine was expecting a SATA PHY event.
488 */
Dan Williams23506a62011-05-12 04:27:29 -0700489 u32 phy_control;
490
Dan Williams89a73012011-06-30 19:14:33 -0700491 phy_control = readl(&iphy->link_layer_registers->phy_configuration);
Dan Williams23506a62011-05-12 04:27:29 -0700492 phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD);
493 writel(phy_control,
Dan Williams89a73012011-06-30 19:14:33 -0700494 &iphy->link_layer_registers->phy_configuration);
Dan Williams23506a62011-05-12 04:27:29 -0700495
Dan Williams85280952011-06-28 15:05:53 -0700496 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SAS_SPEED_EN);
Dan Williams23506a62011-05-12 04:27:29 -0700497
Dan Williams85280952011-06-28 15:05:53 -0700498 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SAS;
Dan Williams23506a62011-05-12 04:27:29 -0700499}
500
Dan Williams89a73012011-06-30 19:14:33 -0700501static void sci_phy_start_sata_link_training(struct isci_phy *iphy)
Dan Williams23506a62011-05-12 04:27:29 -0700502{
Dan Williams89a73012011-06-30 19:14:33 -0700503 /* This method continues the link training for the phy as if it were a SATA PHY
504 * instead of a SAS PHY. This is done because the completion queue had a SATA
505 * SPINUP HOLD event when the state machine was expecting a SAS PHY event. none
506 */
Dan Williams85280952011-06-28 15:05:53 -0700507 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_POWER);
Dan Williams23506a62011-05-12 04:27:29 -0700508
Dan Williams85280952011-06-28 15:05:53 -0700509 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA;
Dan Williams23506a62011-05-12 04:27:29 -0700510}
511
512/**
Dan Williams89a73012011-06-30 19:14:33 -0700513 * sci_phy_complete_link_training - perform processing common to
Dan Williams23506a62011-05-12 04:27:29 -0700514 * all protocols upon completion of link training.
515 * @sci_phy: This parameter specifies the phy object for which link training
516 * has completed.
517 * @max_link_rate: This parameter specifies the maximum link rate to be
518 * associated with this phy.
519 * @next_state: This parameter specifies the next state for the phy's starting
520 * sub-state machine.
521 *
522 */
Dan Williams89a73012011-06-30 19:14:33 -0700523static void sci_phy_complete_link_training(struct isci_phy *iphy,
524 enum sas_linkrate max_link_rate,
525 u32 next_state)
Dan Williams23506a62011-05-12 04:27:29 -0700526{
Dan Williams85280952011-06-28 15:05:53 -0700527 iphy->max_negotiated_speed = max_link_rate;
Dan Williams23506a62011-05-12 04:27:29 -0700528
Dan Williams85280952011-06-28 15:05:53 -0700529 sci_change_state(&iphy->sm, next_state);
Dan Williams23506a62011-05-12 04:27:29 -0700530}
531
Dan Williams89a73012011-06-30 19:14:33 -0700532enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)
Dan Williams23506a62011-05-12 04:27:29 -0700533{
Dan Williams89a73012011-06-30 19:14:33 -0700534 enum sci_phy_states state = iphy->sm.current_state_id;
Dan Williams23506a62011-05-12 04:27:29 -0700535
536 switch (state) {
Edmund Nadolskie3013702011-06-02 00:10:43 +0000537 case SCI_PHY_SUB_AWAIT_OSSP_EN:
Dan Williams23506a62011-05-12 04:27:29 -0700538 switch (scu_get_event_code(event_code)) {
539 case SCU_EVENT_SAS_PHY_DETECTED:
Dan Williams89a73012011-06-30 19:14:33 -0700540 sci_phy_start_sas_link_training(iphy);
Dan Williams85280952011-06-28 15:05:53 -0700541 iphy->is_in_link_training = true;
Dan Williams23506a62011-05-12 04:27:29 -0700542 break;
543 case SCU_EVENT_SATA_SPINUP_HOLD:
Dan Williams89a73012011-06-30 19:14:33 -0700544 sci_phy_start_sata_link_training(iphy);
Dan Williams85280952011-06-28 15:05:53 -0700545 iphy->is_in_link_training = true;
Dan Williams23506a62011-05-12 04:27:29 -0700546 break;
547 default:
Dan Williams85280952011-06-28 15:05:53 -0700548 dev_dbg(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700549 "%s: PHY starting substate machine received "
550 "unexpected event_code %x\n",
551 __func__,
552 event_code);
553 return SCI_FAILURE;
554 }
555 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000556 case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN:
Dan Williams23506a62011-05-12 04:27:29 -0700557 switch (scu_get_event_code(event_code)) {
558 case SCU_EVENT_SAS_PHY_DETECTED:
559 /*
560 * Why is this being reported again by the controller?
561 * We would re-enter this state so just stay here */
562 break;
563 case SCU_EVENT_SAS_15:
564 case SCU_EVENT_SAS_15_SSC:
Dan Williams89a73012011-06-30 19:14:33 -0700565 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_1_5_GBPS,
566 SCI_PHY_SUB_AWAIT_IAF_UF);
Dan Williams23506a62011-05-12 04:27:29 -0700567 break;
568 case SCU_EVENT_SAS_30:
569 case SCU_EVENT_SAS_30_SSC:
Dan Williams89a73012011-06-30 19:14:33 -0700570 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_3_0_GBPS,
571 SCI_PHY_SUB_AWAIT_IAF_UF);
Dan Williams23506a62011-05-12 04:27:29 -0700572 break;
573 case SCU_EVENT_SAS_60:
574 case SCU_EVENT_SAS_60_SSC:
Dan Williams89a73012011-06-30 19:14:33 -0700575 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_6_0_GBPS,
576 SCI_PHY_SUB_AWAIT_IAF_UF);
Dan Williams23506a62011-05-12 04:27:29 -0700577 break;
578 case SCU_EVENT_SATA_SPINUP_HOLD:
579 /*
580 * We were doing SAS PHY link training and received a SATA PHY event
581 * continue OOB/SN as if this were a SATA PHY */
Dan Williams89a73012011-06-30 19:14:33 -0700582 sci_phy_start_sata_link_training(iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700583 break;
584 case SCU_EVENT_LINK_FAILURE:
585 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700586 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700587 break;
588 default:
Dan Williams85280952011-06-28 15:05:53 -0700589 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700590 "%s: PHY starting substate machine received "
591 "unexpected event_code %x\n",
592 __func__, event_code);
593
594 return SCI_FAILURE;
595 break;
596 }
597 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000598 case SCI_PHY_SUB_AWAIT_IAF_UF:
Dan Williams23506a62011-05-12 04:27:29 -0700599 switch (scu_get_event_code(event_code)) {
600 case SCU_EVENT_SAS_PHY_DETECTED:
601 /* Backup the state machine */
Dan Williams89a73012011-06-30 19:14:33 -0700602 sci_phy_start_sas_link_training(iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700603 break;
604 case SCU_EVENT_SATA_SPINUP_HOLD:
605 /* We were doing SAS PHY link training and received a
606 * SATA PHY event continue OOB/SN as if this were a
607 * SATA PHY
608 */
Dan Williams89a73012011-06-30 19:14:33 -0700609 sci_phy_start_sata_link_training(iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700610 break;
611 case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT:
612 case SCU_EVENT_LINK_FAILURE:
613 case SCU_EVENT_HARD_RESET_RECEIVED:
614 /* Start the oob/sn state machine over again */
Dan Williams85280952011-06-28 15:05:53 -0700615 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700616 break;
617 default:
Dan Williams85280952011-06-28 15:05:53 -0700618 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700619 "%s: PHY starting substate machine received "
620 "unexpected event_code %x\n",
621 __func__, event_code);
622 return SCI_FAILURE;
623 }
624 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000625 case SCI_PHY_SUB_AWAIT_SAS_POWER:
Dan Williams23506a62011-05-12 04:27:29 -0700626 switch (scu_get_event_code(event_code)) {
627 case SCU_EVENT_LINK_FAILURE:
628 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700629 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700630 break;
631 default:
Dan Williams85280952011-06-28 15:05:53 -0700632 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700633 "%s: PHY starting substate machine received unexpected "
634 "event_code %x\n",
635 __func__,
636 event_code);
637 return SCI_FAILURE;
638 }
639 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000640 case SCI_PHY_SUB_AWAIT_SATA_POWER:
Dan Williams23506a62011-05-12 04:27:29 -0700641 switch (scu_get_event_code(event_code)) {
642 case SCU_EVENT_LINK_FAILURE:
643 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700644 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700645 break;
646 case SCU_EVENT_SATA_SPINUP_HOLD:
647 /* These events are received every 10ms and are
648 * expected while in this state
649 */
650 break;
651
652 case SCU_EVENT_SAS_PHY_DETECTED:
653 /* There has been a change in the phy type before OOB/SN for the
654 * SATA finished start down the SAS link traning path.
655 */
Dan Williams89a73012011-06-30 19:14:33 -0700656 sci_phy_start_sas_link_training(iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700657 break;
658
659 default:
Dan Williams85280952011-06-28 15:05:53 -0700660 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700661 "%s: PHY starting substate machine received "
662 "unexpected event_code %x\n",
663 __func__, event_code);
664
665 return SCI_FAILURE;
666 }
667 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000668 case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:
Dan Williams23506a62011-05-12 04:27:29 -0700669 switch (scu_get_event_code(event_code)) {
670 case SCU_EVENT_LINK_FAILURE:
671 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700672 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700673 break;
674 case SCU_EVENT_SATA_SPINUP_HOLD:
675 /* These events might be received since we dont know how many may be in
676 * the completion queue while waiting for power
677 */
678 break;
679 case SCU_EVENT_SATA_PHY_DETECTED:
Dan Williams85280952011-06-28 15:05:53 -0700680 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA;
Dan Williams23506a62011-05-12 04:27:29 -0700681
682 /* We have received the SATA PHY notification change state */
Dan Williams85280952011-06-28 15:05:53 -0700683 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);
Dan Williams23506a62011-05-12 04:27:29 -0700684 break;
685 case SCU_EVENT_SAS_PHY_DETECTED:
686 /* There has been a change in the phy type before OOB/SN for the
687 * SATA finished start down the SAS link traning path.
688 */
Dan Williams89a73012011-06-30 19:14:33 -0700689 sci_phy_start_sas_link_training(iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700690 break;
691 default:
Dan Williams85280952011-06-28 15:05:53 -0700692 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700693 "%s: PHY starting substate machine received "
694 "unexpected event_code %x\n",
695 __func__,
696 event_code);
697
Justin P. Mattock69932482011-07-26 23:06:29 -0700698 return SCI_FAILURE;
Dan Williams23506a62011-05-12 04:27:29 -0700699 }
700 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000701 case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:
Dan Williams23506a62011-05-12 04:27:29 -0700702 switch (scu_get_event_code(event_code)) {
703 case SCU_EVENT_SATA_PHY_DETECTED:
704 /*
705 * The hardware reports multiple SATA PHY detected events
706 * ignore the extras */
707 break;
708 case SCU_EVENT_SATA_15:
709 case SCU_EVENT_SATA_15_SSC:
Dan Williams89a73012011-06-30 19:14:33 -0700710 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_1_5_GBPS,
711 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
Dan Williams23506a62011-05-12 04:27:29 -0700712 break;
713 case SCU_EVENT_SATA_30:
714 case SCU_EVENT_SATA_30_SSC:
Dan Williams89a73012011-06-30 19:14:33 -0700715 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_3_0_GBPS,
716 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
Dan Williams23506a62011-05-12 04:27:29 -0700717 break;
718 case SCU_EVENT_SATA_60:
719 case SCU_EVENT_SATA_60_SSC:
Dan Williams89a73012011-06-30 19:14:33 -0700720 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_6_0_GBPS,
721 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
Dan Williams23506a62011-05-12 04:27:29 -0700722 break;
723 case SCU_EVENT_LINK_FAILURE:
724 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700725 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700726 break;
727 case SCU_EVENT_SAS_PHY_DETECTED:
728 /*
729 * There has been a change in the phy type before OOB/SN for the
730 * SATA finished start down the SAS link traning path. */
Dan Williams89a73012011-06-30 19:14:33 -0700731 sci_phy_start_sas_link_training(iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700732 break;
733 default:
Dan Williams85280952011-06-28 15:05:53 -0700734 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700735 "%s: PHY starting substate machine received "
736 "unexpected event_code %x\n",
737 __func__, event_code);
738
739 return SCI_FAILURE;
740 }
741
742 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000743 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:
Dan Williams23506a62011-05-12 04:27:29 -0700744 switch (scu_get_event_code(event_code)) {
745 case SCU_EVENT_SATA_PHY_DETECTED:
746 /* Backup the state machine */
Dan Williams85280952011-06-28 15:05:53 -0700747 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);
Dan Williams23506a62011-05-12 04:27:29 -0700748 break;
749
750 case SCU_EVENT_LINK_FAILURE:
751 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700752 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700753 break;
754
755 default:
Dan Williams85280952011-06-28 15:05:53 -0700756 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700757 "%s: PHY starting substate machine received "
758 "unexpected event_code %x\n",
759 __func__,
760 event_code);
761
762 return SCI_FAILURE;
763 }
764 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000765 case SCI_PHY_READY:
Dan Williams23506a62011-05-12 04:27:29 -0700766 switch (scu_get_event_code(event_code)) {
767 case SCU_EVENT_LINK_FAILURE:
768 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700769 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700770 break;
771 case SCU_EVENT_BROADCAST_CHANGE:
772 /* Broadcast change received. Notify the port. */
Dan Williams85280952011-06-28 15:05:53 -0700773 if (phy_get_non_dummy_port(iphy) != NULL)
Dan Williams89a73012011-06-30 19:14:33 -0700774 sci_port_broadcast_change_received(iphy->owning_port, iphy);
Dan Williams23506a62011-05-12 04:27:29 -0700775 else
Dan Williams85280952011-06-28 15:05:53 -0700776 iphy->bcn_received_while_port_unassigned = true;
Dan Williams23506a62011-05-12 04:27:29 -0700777 break;
778 default:
Dan Williams85280952011-06-28 15:05:53 -0700779 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700780 "%sP SCIC PHY 0x%p ready state machine received "
781 "unexpected event_code %x\n",
Dan Williams85280952011-06-28 15:05:53 -0700782 __func__, iphy, event_code);
Dan Williams23506a62011-05-12 04:27:29 -0700783 return SCI_FAILURE_INVALID_STATE;
784 }
785 return SCI_SUCCESS;
Edmund Nadolskie3013702011-06-02 00:10:43 +0000786 case SCI_PHY_RESETTING:
Dan Williams23506a62011-05-12 04:27:29 -0700787 switch (scu_get_event_code(event_code)) {
788 case SCU_EVENT_HARD_RESET_TRANSMITTED:
789 /* Link failure change state back to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700790 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williams23506a62011-05-12 04:27:29 -0700791 break;
792 default:
Dan Williams85280952011-06-28 15:05:53 -0700793 dev_warn(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700794 "%s: SCIC PHY 0x%p resetting state machine received "
795 "unexpected event_code %x\n",
Dan Williams85280952011-06-28 15:05:53 -0700796 __func__, iphy, event_code);
Dan Williams23506a62011-05-12 04:27:29 -0700797
798 return SCI_FAILURE_INVALID_STATE;
799 break;
800 }
801 return SCI_SUCCESS;
802 default:
Dan Williams85280952011-06-28 15:05:53 -0700803 dev_dbg(sciphy_to_dev(iphy),
Dan Williams23506a62011-05-12 04:27:29 -0700804 "%s: in wrong state: %d\n", __func__, state);
805 return SCI_FAILURE_INVALID_STATE;
806 }
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700807}
808
Dan Williams89a73012011-06-30 19:14:33 -0700809enum sci_status sci_phy_frame_handler(struct isci_phy *iphy, u32 frame_index)
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700810{
Dan Williams89a73012011-06-30 19:14:33 -0700811 enum sci_phy_states state = iphy->sm.current_state_id;
Dan Williamsd9dcb4b2011-06-30 17:38:32 -0700812 struct isci_host *ihost = iphy->owning_port->owning_controller;
Dan Williamsc4441ab2011-05-12 04:17:51 -0700813 enum sci_status result;
Dan Williams4cffe13e2011-06-23 23:44:52 -0700814 unsigned long flags;
Dan Williamsc4441ab2011-05-12 04:17:51 -0700815
816 switch (state) {
Edmund Nadolskie3013702011-06-02 00:10:43 +0000817 case SCI_PHY_SUB_AWAIT_IAF_UF: {
Dan Williamsc4441ab2011-05-12 04:17:51 -0700818 u32 *frame_words;
819 struct sas_identify_frame iaf;
Dan Williamsc4441ab2011-05-12 04:17:51 -0700820
Dan Williams89a73012011-06-30 19:14:33 -0700821 result = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
822 frame_index,
823 (void **)&frame_words);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700824
825 if (result != SCI_SUCCESS)
826 return result;
827
828 sci_swab32_cpy(&iaf, frame_words, sizeof(iaf) / sizeof(u32));
829 if (iaf.frame_type == 0) {
830 u32 state;
831
Dan Williams4cffe13e2011-06-23 23:44:52 -0700832 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700833 memcpy(&iphy->frame_rcvd.iaf, &iaf, sizeof(iaf));
Dan Williams4cffe13e2011-06-23 23:44:52 -0700834 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700835 if (iaf.smp_tport) {
836 /* We got the IAF for an expander PHY go to the final
837 * state since there are no power requirements for
838 * expander phys.
839 */
Edmund Nadolskie3013702011-06-02 00:10:43 +0000840 state = SCI_PHY_SUB_FINAL;
Dan Williamsc4441ab2011-05-12 04:17:51 -0700841 } else {
842 /* We got the IAF we can now go to the await spinup
843 * semaphore state
844 */
Edmund Nadolskie3013702011-06-02 00:10:43 +0000845 state = SCI_PHY_SUB_AWAIT_SAS_POWER;
Dan Williamsc4441ab2011-05-12 04:17:51 -0700846 }
Dan Williams85280952011-06-28 15:05:53 -0700847 sci_change_state(&iphy->sm, state);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700848 result = SCI_SUCCESS;
849 } else
Dan Williams85280952011-06-28 15:05:53 -0700850 dev_warn(sciphy_to_dev(iphy),
Dan Williamsc4441ab2011-05-12 04:17:51 -0700851 "%s: PHY starting substate machine received "
852 "unexpected frame id %x\n",
853 __func__, frame_index);
854
Dan Williams89a73012011-06-30 19:14:33 -0700855 sci_controller_release_frame(ihost, frame_index);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700856 return result;
857 }
Edmund Nadolskie3013702011-06-02 00:10:43 +0000858 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: {
Dan Williamsc4441ab2011-05-12 04:17:51 -0700859 struct dev_to_host_fis *frame_header;
860 u32 *fis_frame_data;
Dan Williamsc4441ab2011-05-12 04:17:51 -0700861
Dan Williams34a99152011-07-01 02:25:15 -0700862 result = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
863 frame_index,
864 (void **)&frame_header);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700865
866 if (result != SCI_SUCCESS)
867 return result;
868
869 if ((frame_header->fis_type == FIS_REGD2H) &&
870 !(frame_header->status & ATA_BUSY)) {
Dan Williams89a73012011-06-30 19:14:33 -0700871 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
872 frame_index,
873 (void **)&fis_frame_data);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700874
Dan Williams4cffe13e2011-06-23 23:44:52 -0700875 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
Dan Williams89a73012011-06-30 19:14:33 -0700876 sci_controller_copy_sata_response(&iphy->frame_rcvd.fis,
877 frame_header,
878 fis_frame_data);
Dan Williams4cffe13e2011-06-23 23:44:52 -0700879 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700880
881 /* got IAF we can now go to the await spinup semaphore state */
Dan Williams85280952011-06-28 15:05:53 -0700882 sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700883
884 result = SCI_SUCCESS;
885 } else
Dan Williams85280952011-06-28 15:05:53 -0700886 dev_warn(sciphy_to_dev(iphy),
Dan Williamsc4441ab2011-05-12 04:17:51 -0700887 "%s: PHY starting substate machine received "
888 "unexpected frame id %x\n",
889 __func__, frame_index);
890
891 /* Regardless of the result we are done with this frame with it */
Dan Williams89a73012011-06-30 19:14:33 -0700892 sci_controller_release_frame(ihost, frame_index);
Dan Williamsc4441ab2011-05-12 04:17:51 -0700893
894 return result;
895 }
896 default:
Dan Williams85280952011-06-28 15:05:53 -0700897 dev_dbg(sciphy_to_dev(iphy),
Dan Williamsc4441ab2011-05-12 04:17:51 -0700898 "%s: in wrong state: %d\n", __func__, state);
899 return SCI_FAILURE_INVALID_STATE;
900 }
Dan Williams5076a1a2011-06-27 14:57:03 -0700901
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700902}
903
Dan Williams89a73012011-06-30 19:14:33 -0700904static void sci_phy_starting_initial_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000905{
Dan Williams85280952011-06-28 15:05:53 -0700906 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000907
Adam Gruchala4a33c522011-05-10 23:54:23 +0000908 /* This is just an temporary state go off to the starting state */
Dan Williams85280952011-06-28 15:05:53 -0700909 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_OSSP_EN);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000910}
911
Dan Williams89a73012011-06-30 19:14:33 -0700912static void sci_phy_starting_await_sas_power_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000913{
Dan Williams85280952011-06-28 15:05:53 -0700914 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williamsd9dcb4b2011-06-30 17:38:32 -0700915 struct isci_host *ihost = iphy->owning_port->owning_controller;
Adam Gruchala4a33c522011-05-10 23:54:23 +0000916
Dan Williams89a73012011-06-30 19:14:33 -0700917 sci_controller_power_control_queue_insert(ihost, iphy);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000918}
919
Dan Williams89a73012011-06-30 19:14:33 -0700920static void sci_phy_starting_await_sas_power_substate_exit(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000921{
Dan Williams85280952011-06-28 15:05:53 -0700922 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williamsd9dcb4b2011-06-30 17:38:32 -0700923 struct isci_host *ihost = iphy->owning_port->owning_controller;
Adam Gruchala4a33c522011-05-10 23:54:23 +0000924
Dan Williams89a73012011-06-30 19:14:33 -0700925 sci_controller_power_control_queue_remove(ihost, iphy);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000926}
927
Dan Williams89a73012011-06-30 19:14:33 -0700928static void sci_phy_starting_await_sata_power_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000929{
Dan Williams85280952011-06-28 15:05:53 -0700930 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williamsd9dcb4b2011-06-30 17:38:32 -0700931 struct isci_host *ihost = iphy->owning_port->owning_controller;
Adam Gruchala4a33c522011-05-10 23:54:23 +0000932
Dan Williams89a73012011-06-30 19:14:33 -0700933 sci_controller_power_control_queue_insert(ihost, iphy);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000934}
935
Dan Williams89a73012011-06-30 19:14:33 -0700936static void sci_phy_starting_await_sata_power_substate_exit(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000937{
Dan Williams85280952011-06-28 15:05:53 -0700938 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williamsd9dcb4b2011-06-30 17:38:32 -0700939 struct isci_host *ihost = iphy->owning_port->owning_controller;
Adam Gruchala4a33c522011-05-10 23:54:23 +0000940
Dan Williams89a73012011-06-30 19:14:33 -0700941 sci_controller_power_control_queue_remove(ihost, iphy);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000942}
943
Dan Williams89a73012011-06-30 19:14:33 -0700944static void sci_phy_starting_await_sata_phy_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000945{
Dan Williams85280952011-06-28 15:05:53 -0700946 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000947
Dan Williams85280952011-06-28 15:05:53 -0700948 sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000949}
950
Dan Williams89a73012011-06-30 19:14:33 -0700951static void sci_phy_starting_await_sata_phy_substate_exit(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000952{
Dan Williams85280952011-06-28 15:05:53 -0700953 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000954
Dan Williams85280952011-06-28 15:05:53 -0700955 sci_del_timer(&iphy->sata_timer);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000956}
957
Dan Williams89a73012011-06-30 19:14:33 -0700958static void sci_phy_starting_await_sata_speed_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000959{
Dan Williams85280952011-06-28 15:05:53 -0700960 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000961
Dan Williams85280952011-06-28 15:05:53 -0700962 sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000963}
964
Dan Williams89a73012011-06-30 19:14:33 -0700965static void sci_phy_starting_await_sata_speed_substate_exit(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000966{
Dan Williams85280952011-06-28 15:05:53 -0700967 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000968
Dan Williams85280952011-06-28 15:05:53 -0700969 sci_del_timer(&iphy->sata_timer);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000970}
971
Dan Williams89a73012011-06-30 19:14:33 -0700972static void sci_phy_starting_await_sig_fis_uf_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000973{
Dan Williams85280952011-06-28 15:05:53 -0700974 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000975
Dan Williams89a73012011-06-30 19:14:33 -0700976 if (sci_port_link_detected(iphy->owning_port, iphy)) {
Adam Gruchala4a33c522011-05-10 23:54:23 +0000977
Adam Gruchala4a33c522011-05-10 23:54:23 +0000978 /*
979 * Clear the PE suspend condition so we can actually
980 * receive SIG FIS
981 * The hardware will not respond to the XRDY until the PE
982 * suspend condition is cleared.
983 */
Dan Williams89a73012011-06-30 19:14:33 -0700984 sci_phy_resume(iphy);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000985
Dan Williams85280952011-06-28 15:05:53 -0700986 sci_mod_timer(&iphy->sata_timer,
Edmund Nadolskia628d472011-05-19 11:59:36 +0000987 SCIC_SDS_SIGNATURE_FIS_TIMEOUT);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000988 } else
Dan Williams85280952011-06-28 15:05:53 -0700989 iphy->is_in_link_training = false;
Adam Gruchala4a33c522011-05-10 23:54:23 +0000990}
991
Dan Williams89a73012011-06-30 19:14:33 -0700992static void sci_phy_starting_await_sig_fis_uf_substate_exit(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +0000993{
Dan Williams85280952011-06-28 15:05:53 -0700994 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000995
Dan Williams85280952011-06-28 15:05:53 -0700996 sci_del_timer(&iphy->sata_timer);
Adam Gruchala4a33c522011-05-10 23:54:23 +0000997}
998
Dan Williams89a73012011-06-30 19:14:33 -0700999static void sci_phy_starting_final_substate_enter(struct sci_base_state_machine *sm)
Adam Gruchala4a33c522011-05-10 23:54:23 +00001000{
Dan Williams85280952011-06-28 15:05:53 -07001001 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Adam Gruchala4a33c522011-05-10 23:54:23 +00001002
Adam Gruchala4a33c522011-05-10 23:54:23 +00001003 /* State machine has run to completion so exit out and change
1004 * the base state machine to the ready state
1005 */
Dan Williams85280952011-06-28 15:05:53 -07001006 sci_change_state(&iphy->sm, SCI_PHY_READY);
Adam Gruchala4a33c522011-05-10 23:54:23 +00001007}
1008
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001009/**
1010 *
Dan Williams85280952011-06-28 15:05:53 -07001011 * @sci_phy: This is the struct isci_phy object to stop.
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001012 *
Dan Williams85280952011-06-28 15:05:53 -07001013 * This method will stop the struct isci_phy object. This does not reset the
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001014 * protocol engine it just suspends it and places it in a state where it will
1015 * not cause the end device to power up. none
1016 */
1017static void scu_link_layer_stop_protocol_engine(
Dan Williams85280952011-06-28 15:05:53 -07001018 struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001019{
1020 u32 scu_sas_pcfg_value;
1021 u32 enable_spinup_value;
1022
1023 /* Suspend the protocol engine and place it in a sata spinup hold state */
1024 scu_sas_pcfg_value =
Dan Williams85280952011-06-28 15:05:53 -07001025 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001026 scu_sas_pcfg_value |=
1027 (SCU_SAS_PCFG_GEN_BIT(OOB_RESET) |
1028 SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE) |
1029 SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD));
1030 writel(scu_sas_pcfg_value,
Dan Williams85280952011-06-28 15:05:53 -07001031 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001032
1033 /* Disable the notify enable spinup primitives */
Dan Williams85280952011-06-28 15:05:53 -07001034 enable_spinup_value = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001035 enable_spinup_value &= ~SCU_ENSPINUP_GEN_BIT(ENABLE);
Dan Williams85280952011-06-28 15:05:53 -07001036 writel(enable_spinup_value, &iphy->link_layer_registers->notify_enable_spinup_control);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001037}
1038
1039/**
1040 *
1041 *
Dan Williams85280952011-06-28 15:05:53 -07001042 * This method will start the OOB/SN state machine for this struct isci_phy object.
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001043 */
1044static void scu_link_layer_start_oob(
Dan Williams85280952011-06-28 15:05:53 -07001045 struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001046{
1047 u32 scu_sas_pcfg_value;
1048
1049 scu_sas_pcfg_value =
Dan Williams85280952011-06-28 15:05:53 -07001050 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001051 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
1052 scu_sas_pcfg_value &=
1053 ~(SCU_SAS_PCFG_GEN_BIT(OOB_RESET) |
1054 SCU_SAS_PCFG_GEN_BIT(HARD_RESET));
1055 writel(scu_sas_pcfg_value,
Dan Williams85280952011-06-28 15:05:53 -07001056 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001057}
1058
1059/**
1060 *
1061 *
1062 * This method will transmit a hard reset request on the specified phy. The SCU
1063 * hardware requires that we reset the OOB state machine and set the hard reset
1064 * bit in the phy configuration register. We then must start OOB over with the
1065 * hard reset bit set.
1066 */
1067static void scu_link_layer_tx_hard_reset(
Dan Williams85280952011-06-28 15:05:53 -07001068 struct isci_phy *iphy)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001069{
1070 u32 phy_configuration_value;
1071
1072 /*
1073 * SAS Phys must wait for the HARD_RESET_TX event notification to transition
1074 * to the starting state. */
1075 phy_configuration_value =
Dan Williams85280952011-06-28 15:05:53 -07001076 readl(&iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001077 phy_configuration_value |=
1078 (SCU_SAS_PCFG_GEN_BIT(HARD_RESET) |
1079 SCU_SAS_PCFG_GEN_BIT(OOB_RESET));
1080 writel(phy_configuration_value,
Dan Williams85280952011-06-28 15:05:53 -07001081 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001082
1083 /* Now take the OOB state machine out of reset */
1084 phy_configuration_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
1085 phy_configuration_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
1086 writel(phy_configuration_value,
Dan Williams85280952011-06-28 15:05:53 -07001087 &iphy->link_layer_registers->phy_configuration);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001088}
1089
Dan Williams89a73012011-06-30 19:14:33 -07001090static void sci_phy_stopped_state_enter(struct sci_base_state_machine *sm)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001091{
Dan Williams85280952011-06-28 15:05:53 -07001092 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williams34a99152011-07-01 02:25:15 -07001093 struct isci_port *iport = iphy->owning_port;
1094 struct isci_host *ihost = iport->owning_controller;
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001095
1096 /*
1097 * @todo We need to get to the controller to place this PE in a
1098 * reset state
1099 */
Dan Williams85280952011-06-28 15:05:53 -07001100 sci_del_timer(&iphy->sata_timer);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001101
Dan Williams85280952011-06-28 15:05:53 -07001102 scu_link_layer_stop_protocol_engine(iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001103
Dan Williams85280952011-06-28 15:05:53 -07001104 if (iphy->sm.previous_state_id != SCI_PHY_INITIAL)
Dan Williams34a99152011-07-01 02:25:15 -07001105 sci_controller_link_down(ihost, phy_get_non_dummy_port(iphy), iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001106}
1107
Dan Williams89a73012011-06-30 19:14:33 -07001108static void sci_phy_starting_state_enter(struct sci_base_state_machine *sm)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001109{
Dan Williams85280952011-06-28 15:05:53 -07001110 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williams34a99152011-07-01 02:25:15 -07001111 struct isci_port *iport = iphy->owning_port;
1112 struct isci_host *ihost = iport->owning_controller;
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001113
Dan Williams85280952011-06-28 15:05:53 -07001114 scu_link_layer_stop_protocol_engine(iphy);
1115 scu_link_layer_start_oob(iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001116
1117 /* We don't know what kind of phy we are going to be just yet */
Dan Williams85280952011-06-28 15:05:53 -07001118 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;
1119 iphy->bcn_received_while_port_unassigned = false;
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001120
Dan Williams85280952011-06-28 15:05:53 -07001121 if (iphy->sm.previous_state_id == SCI_PHY_READY)
Dan Williams34a99152011-07-01 02:25:15 -07001122 sci_controller_link_down(ihost, phy_get_non_dummy_port(iphy), iphy);
Adam Gruchala4a33c522011-05-10 23:54:23 +00001123
Dan Williams85280952011-06-28 15:05:53 -07001124 sci_change_state(&iphy->sm, SCI_PHY_SUB_INITIAL);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001125}
1126
Dan Williams89a73012011-06-30 19:14:33 -07001127static void sci_phy_ready_state_enter(struct sci_base_state_machine *sm)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001128{
Dan Williams85280952011-06-28 15:05:53 -07001129 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williams34a99152011-07-01 02:25:15 -07001130 struct isci_port *iport = iphy->owning_port;
1131 struct isci_host *ihost = iport->owning_controller;
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001132
Dan Williams34a99152011-07-01 02:25:15 -07001133 sci_controller_link_up(ihost, phy_get_non_dummy_port(iphy), iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001134}
1135
Dan Williams89a73012011-06-30 19:14:33 -07001136static void sci_phy_ready_state_exit(struct sci_base_state_machine *sm)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001137{
Dan Williams85280952011-06-28 15:05:53 -07001138 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001139
Dan Williams89a73012011-06-30 19:14:33 -07001140 sci_phy_suspend(iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001141}
1142
Dan Williams89a73012011-06-30 19:14:33 -07001143static void sci_phy_resetting_state_enter(struct sci_base_state_machine *sm)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001144{
Dan Williams85280952011-06-28 15:05:53 -07001145 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001146
Dan Williams5b1d4af2011-05-12 04:51:41 -07001147 /* The phy is being reset, therefore deactivate it from the port. In
1148 * the resetting state we don't notify the user regarding link up and
1149 * link down notifications
1150 */
Dan Williams89a73012011-06-30 19:14:33 -07001151 sci_port_deactivate_phy(iphy->owning_port, iphy, false);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001152
Dan Williams85280952011-06-28 15:05:53 -07001153 if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {
1154 scu_link_layer_tx_hard_reset(iphy);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001155 } else {
Dan Williams5b1d4af2011-05-12 04:51:41 -07001156 /* The SCU does not need to have a discrete reset state so
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001157 * just go back to the starting state.
1158 */
Dan Williams85280952011-06-28 15:05:53 -07001159 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001160 }
1161}
1162
Dan Williams89a73012011-06-30 19:14:33 -07001163static const struct sci_base_state sci_phy_state_table[] = {
Edmund Nadolskie3013702011-06-02 00:10:43 +00001164 [SCI_PHY_INITIAL] = { },
1165 [SCI_PHY_STOPPED] = {
Dan Williams89a73012011-06-30 19:14:33 -07001166 .enter_state = sci_phy_stopped_state_enter,
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001167 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001168 [SCI_PHY_STARTING] = {
Dan Williams89a73012011-06-30 19:14:33 -07001169 .enter_state = sci_phy_starting_state_enter,
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001170 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001171 [SCI_PHY_SUB_INITIAL] = {
Dan Williams89a73012011-06-30 19:14:33 -07001172 .enter_state = sci_phy_starting_initial_substate_enter,
Adam Gruchala4a33c522011-05-10 23:54:23 +00001173 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001174 [SCI_PHY_SUB_AWAIT_OSSP_EN] = { },
1175 [SCI_PHY_SUB_AWAIT_SAS_SPEED_EN] = { },
1176 [SCI_PHY_SUB_AWAIT_IAF_UF] = { },
1177 [SCI_PHY_SUB_AWAIT_SAS_POWER] = {
Dan Williams89a73012011-06-30 19:14:33 -07001178 .enter_state = sci_phy_starting_await_sas_power_substate_enter,
1179 .exit_state = sci_phy_starting_await_sas_power_substate_exit,
Adam Gruchala4a33c522011-05-10 23:54:23 +00001180 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001181 [SCI_PHY_SUB_AWAIT_SATA_POWER] = {
Dan Williams89a73012011-06-30 19:14:33 -07001182 .enter_state = sci_phy_starting_await_sata_power_substate_enter,
1183 .exit_state = sci_phy_starting_await_sata_power_substate_exit
Adam Gruchala4a33c522011-05-10 23:54:23 +00001184 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001185 [SCI_PHY_SUB_AWAIT_SATA_PHY_EN] = {
Dan Williams89a73012011-06-30 19:14:33 -07001186 .enter_state = sci_phy_starting_await_sata_phy_substate_enter,
1187 .exit_state = sci_phy_starting_await_sata_phy_substate_exit
Adam Gruchala4a33c522011-05-10 23:54:23 +00001188 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001189 [SCI_PHY_SUB_AWAIT_SATA_SPEED_EN] = {
Dan Williams89a73012011-06-30 19:14:33 -07001190 .enter_state = sci_phy_starting_await_sata_speed_substate_enter,
1191 .exit_state = sci_phy_starting_await_sata_speed_substate_exit
Adam Gruchala4a33c522011-05-10 23:54:23 +00001192 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001193 [SCI_PHY_SUB_AWAIT_SIG_FIS_UF] = {
Dan Williams89a73012011-06-30 19:14:33 -07001194 .enter_state = sci_phy_starting_await_sig_fis_uf_substate_enter,
1195 .exit_state = sci_phy_starting_await_sig_fis_uf_substate_exit
Adam Gruchala4a33c522011-05-10 23:54:23 +00001196 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001197 [SCI_PHY_SUB_FINAL] = {
Dan Williams89a73012011-06-30 19:14:33 -07001198 .enter_state = sci_phy_starting_final_substate_enter,
Adam Gruchala4a33c522011-05-10 23:54:23 +00001199 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001200 [SCI_PHY_READY] = {
Dan Williams89a73012011-06-30 19:14:33 -07001201 .enter_state = sci_phy_ready_state_enter,
1202 .exit_state = sci_phy_ready_state_exit,
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001203 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001204 [SCI_PHY_RESETTING] = {
Dan Williams89a73012011-06-30 19:14:33 -07001205 .enter_state = sci_phy_resetting_state_enter,
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001206 },
Edmund Nadolskie3013702011-06-02 00:10:43 +00001207 [SCI_PHY_FINAL] = { },
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001208};
1209
Dan Williams89a73012011-06-30 19:14:33 -07001210void sci_phy_construct(struct isci_phy *iphy,
Dan Williamsffe191c2011-06-29 13:09:25 -07001211 struct isci_port *iport, u8 phy_index)
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001212{
Dan Williams89a73012011-06-30 19:14:33 -07001213 sci_init_sm(&iphy->sm, sci_phy_state_table, SCI_PHY_INITIAL);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001214
1215 /* Copy the rest of the input data to our locals */
Dan Williamsffe191c2011-06-29 13:09:25 -07001216 iphy->owning_port = iport;
Dan Williams85280952011-06-28 15:05:53 -07001217 iphy->phy_index = phy_index;
1218 iphy->bcn_received_while_port_unassigned = false;
1219 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;
1220 iphy->link_layer_registers = NULL;
1221 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
Edmund Nadolskia628d472011-05-19 11:59:36 +00001222
1223 /* Create the SIGNATURE FIS Timeout timer for this phy */
Dan Williams85280952011-06-28 15:05:53 -07001224 sci_init_timer(&iphy->sata_timer, phy_sata_timeout);
Dan Williamsd35bc1b2011-05-10 02:28:45 -07001225}
Dan Williams6f231dd2011-07-02 22:56:22 -07001226
Dan Williams4b339812011-05-06 17:36:38 -07001227void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index)
Dan Williams6f231dd2011-07-02 22:56:22 -07001228{
Dan Williams89a73012011-06-30 19:14:33 -07001229 struct sci_oem_params *oem = &ihost->oem_parameters;
Dan Williams4b339812011-05-06 17:36:38 -07001230 u64 sci_sas_addr;
1231 __be64 sas_addr;
Dan Williams6f231dd2011-07-02 22:56:22 -07001232
Dan Williams89a73012011-06-30 19:14:33 -07001233 sci_sas_addr = oem->phys[index].sas_address.high;
Dan Williams4b339812011-05-06 17:36:38 -07001234 sci_sas_addr <<= 32;
Dan Williams89a73012011-06-30 19:14:33 -07001235 sci_sas_addr |= oem->phys[index].sas_address.low;
Dan Williams4b339812011-05-06 17:36:38 -07001236 sas_addr = cpu_to_be64(sci_sas_addr);
1237 memcpy(iphy->sas_addr, &sas_addr, sizeof(sas_addr));
Dan Williams6f231dd2011-07-02 22:56:22 -07001238
Dan Williams4b339812011-05-06 17:36:38 -07001239 iphy->isci_port = NULL;
1240 iphy->sas_phy.enabled = 0;
1241 iphy->sas_phy.id = index;
1242 iphy->sas_phy.sas_addr = &iphy->sas_addr[0];
1243 iphy->sas_phy.frame_rcvd = (u8 *)&iphy->frame_rcvd;
1244 iphy->sas_phy.ha = &ihost->sas_ha;
1245 iphy->sas_phy.lldd_phy = iphy;
1246 iphy->sas_phy.enabled = 1;
1247 iphy->sas_phy.class = SAS;
1248 iphy->sas_phy.iproto = SAS_PROTOCOL_ALL;
1249 iphy->sas_phy.tproto = 0;
1250 iphy->sas_phy.type = PHY_TYPE_PHYSICAL;
1251 iphy->sas_phy.role = PHY_ROLE_INITIATOR;
1252 iphy->sas_phy.oob_mode = OOB_NOT_CONNECTED;
1253 iphy->sas_phy.linkrate = SAS_LINK_RATE_UNKNOWN;
1254 memset(&iphy->frame_rcvd, 0, sizeof(iphy->frame_rcvd));
Dan Williams6f231dd2011-07-02 22:56:22 -07001255}
1256
1257
1258/**
1259 * isci_phy_control() - This function is one of the SAS Domain Template
1260 * functions. This is a phy management function.
1261 * @phy: This parameter specifies the sphy being controlled.
1262 * @func: This parameter specifies the phy control function being invoked.
1263 * @buf: This parameter is specific to the phy function being invoked.
1264 *
1265 * status, zero indicates success.
1266 */
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001267int isci_phy_control(struct asd_sas_phy *sas_phy,
1268 enum phy_func func,
1269 void *buf)
Dan Williams6f231dd2011-07-02 22:56:22 -07001270{
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001271 int ret = 0;
1272 struct isci_phy *iphy = sas_phy->lldd_phy;
1273 struct isci_port *iport = iphy->isci_port;
1274 struct isci_host *ihost = sas_phy->ha->lldd_ha;
1275 unsigned long flags;
Dan Williams6f231dd2011-07-02 22:56:22 -07001276
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001277 dev_dbg(&ihost->pdev->dev,
1278 "%s: phy %p; func %d; buf %p; isci phy %p, port %p\n",
1279 __func__, sas_phy, func, buf, iphy, iport);
Dan Williams6f231dd2011-07-02 22:56:22 -07001280
1281 switch (func) {
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001282 case PHY_FUNC_DISABLE:
1283 spin_lock_irqsave(&ihost->scic_lock, flags);
Dan Williams89a73012011-06-30 19:14:33 -07001284 sci_phy_stop(iphy);
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001285 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1286 break;
1287
Dan Williams6f231dd2011-07-02 22:56:22 -07001288 case PHY_FUNC_LINK_RESET:
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001289 spin_lock_irqsave(&ihost->scic_lock, flags);
Dan Williams89a73012011-06-30 19:14:33 -07001290 sci_phy_stop(iphy);
1291 sci_phy_start(iphy);
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001292 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1293 break;
1294
1295 case PHY_FUNC_HARD_RESET:
1296 if (!iport)
1297 return -ENODEV;
Dan Williams6f231dd2011-07-02 22:56:22 -07001298
1299 /* Perform the port reset. */
Dan Williams4393aa42011-03-31 13:10:44 -07001300 ret = isci_port_perform_hard_reset(ihost, iport, iphy);
Dan Williams6f231dd2011-07-02 22:56:22 -07001301
1302 break;
1303
Dan Williams6f231dd2011-07-02 22:56:22 -07001304 default:
Dave Jiang4d07f7f2011-03-02 12:31:24 -08001305 dev_dbg(&ihost->pdev->dev,
1306 "%s: phy %p; func %d NOT IMPLEMENTED!\n",
1307 __func__, sas_phy, func);
1308 ret = -ENOSYS;
Dan Williams6f231dd2011-07-02 22:56:22 -07001309 break;
1310 }
1311 return ret;
1312}