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Magnus Damm0468b2d2013-03-28 00:49:34 +09001/*
2 * r8a7790 processor support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/irq.h>
22#include <linux/irqchip.h>
23#include <linux/kernel.h>
24#include <linux/of_platform.h>
Magnus Damm55d9fab2013-03-28 00:49:44 +090025#include <linux/serial_sci.h>
Magnus Damm8f5ec0a2013-03-28 00:49:54 +090026#include <linux/platform_data/irq-renesas-irqc.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090027#include <mach/common.h>
28#include <mach/irqs.h>
29#include <mach/r8a7790.h>
30#include <asm/mach/arch.h>
31
Magnus Damm69e351d2013-03-28 00:50:03 +090032static const struct resource pfc_resources[] = {
33 DEFINE_RES_MEM(0xe6060000, 0x250),
34};
35
36void __init r8a7790_pinmux_init(void)
37{
38 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
39 ARRAY_SIZE(pfc_resources));
40}
41
Magnus Damm55d9fab2013-03-28 00:49:44 +090042#define SCIF_COMMON(scif_type, baseaddr, irq) \
43 .type = scif_type, \
44 .mapbase = baseaddr, \
45 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
46 .irqs = SCIx_IRQ_MUXED(irq)
47
48#define SCIFA_DATA(index, baseaddr, irq) \
49[index] = { \
50 SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
51 .scbrr_algo_id = SCBRR_ALGO_4, \
52 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
53}
54
55#define SCIFB_DATA(index, baseaddr, irq) \
56[index] = { \
57 SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
58 .scbrr_algo_id = SCBRR_ALGO_4, \
59 .scscr = SCSCR_RE | SCSCR_TE, \
60}
61
62#define SCIF_DATA(index, baseaddr, irq) \
63[index] = { \
64 SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
65 .scbrr_algo_id = SCBRR_ALGO_2, \
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
67}
68
69enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 };
70
71static const struct plat_sci_port scif[] = {
72 SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
73 SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
74 SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
75 SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
76 SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
77 SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
78 SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
79 SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
80};
81
82static inline void r8a7790_register_scif(int idx)
83{
84 platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
85 sizeof(struct plat_sci_port));
86}
87
Magnus Damm8f5ec0a2013-03-28 00:49:54 +090088static struct renesas_irqc_config irqc0_data = {
89 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
90};
91
92static struct resource irqc0_resources[] = {
93 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
94 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
95 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
96 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
97 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
98};
99
100#define r8a7790_register_irqc(idx) \
101 platform_device_register_resndata(&platform_bus, "renesas_irqc", \
102 idx, irqc##idx##_resources, \
103 ARRAY_SIZE(irqc##idx##_resources), \
104 &irqc##idx##_data, \
105 sizeof(struct renesas_irqc_config))
106
Magnus Damm0468b2d2013-03-28 00:49:34 +0900107void __init r8a7790_add_standard_devices(void)
108{
Magnus Damm55d9fab2013-03-28 00:49:44 +0900109 r8a7790_register_scif(SCIFA0);
110 r8a7790_register_scif(SCIFA1);
111 r8a7790_register_scif(SCIFB0);
112 r8a7790_register_scif(SCIFB1);
113 r8a7790_register_scif(SCIFB2);
114 r8a7790_register_scif(SCIFA2);
115 r8a7790_register_scif(SCIF0);
116 r8a7790_register_scif(SCIF1);
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900117 r8a7790_register_irqc(0);
Magnus Damm0468b2d2013-03-28 00:49:34 +0900118}
119
120#ifdef CONFIG_USE_OF
121void __init r8a7790_add_standard_devices_dt(void)
122{
123 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
124}
125
126static const char *r8a7790_boards_compat_dt[] __initdata = {
127 "renesas,r8a7790",
128 NULL,
129};
130
131DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
132 .init_irq = irqchip_init,
133 .init_machine = r8a7790_add_standard_devices_dt,
134 .init_time = shmobile_timer_init,
135 .dt_compat = r8a7790_boards_compat_dt,
136MACHINE_END
137#endif /* CONFIG_USE_OF */