Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/vfpmacros.h |
| 3 | * |
| 4 | * Assembler-only file containing VFP macros and register definitions. |
| 5 | */ |
| 6 | #include "vfp.h" |
| 7 | |
| 8 | @ Macros to allow building with old toolkits (with no VFP support) |
| 9 | .macro VFPFMRX, rd, sysreg, cond |
| 10 | MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg |
| 11 | .endm |
| 12 | |
| 13 | .macro VFPFMXR, sysreg, rd, cond |
| 14 | MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd |
| 15 | .endm |
| 16 | |
| 17 | @ read all the working registers back into the VFP |
Catalin Marinas | 25ebee0 | 2007-09-25 15:22:24 +0100 | [diff] [blame] | 18 | .macro VFPFLDMIA, base, tmp |
Catalin Marinas | bb54a33 | 2006-04-10 21:32:42 +0100 | [diff] [blame] | 19 | #if __LINUX_ARM_ARCH__ < 6 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} |
Catalin Marinas | bb54a33 | 2006-04-10 21:32:42 +0100 | [diff] [blame] | 21 | #else |
| 22 | LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} |
| 23 | #endif |
Catalin Marinas | 25ebee0 | 2007-09-25 15:22:24 +0100 | [diff] [blame] | 24 | #ifdef CONFIG_VFPv3 |
| 25 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
| 26 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
| 27 | cmp \tmp, #2 @ 32 x 64bit registers? |
| 28 | ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
| 29 | addne \base, \base, #32*4 @ step over unused register space |
| 30 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | .endm |
| 32 | |
| 33 | @ write all the working registers out of the VFP |
Catalin Marinas | 25ebee0 | 2007-09-25 15:22:24 +0100 | [diff] [blame] | 34 | .macro VFPFSTMIA, base, tmp |
Catalin Marinas | bb54a33 | 2006-04-10 21:32:42 +0100 | [diff] [blame] | 35 | #if __LINUX_ARM_ARCH__ < 6 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} |
Catalin Marinas | bb54a33 | 2006-04-10 21:32:42 +0100 | [diff] [blame] | 37 | #else |
| 38 | STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} |
| 39 | #endif |
Catalin Marinas | 25ebee0 | 2007-09-25 15:22:24 +0100 | [diff] [blame] | 40 | #ifdef CONFIG_VFPv3 |
| 41 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
| 42 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
| 43 | cmp \tmp, #2 @ 32 x 64bit registers? |
| 44 | stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
| 45 | addne \base, \base, #32*4 @ step over unused register space |
| 46 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | .endm |