Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology |
| 3 | * Author: Yanhua, yanh@lemote.com |
| 4 | * |
| 5 | * This file is subject to the terms and conditions of the GNU General Public |
| 6 | * License. See the file "COPYING" in the main directory of this archive |
| 7 | * for more details. |
| 8 | */ |
Ralf Baechle | 95cf146 | 2012-08-01 17:15:32 +0200 | [diff] [blame] | 9 | #include <linux/clk.h> |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 10 | #include <linux/cpufreq.h> |
Ralf Baechle | 95cf146 | 2012-08-01 17:15:32 +0200 | [diff] [blame] | 11 | #include <linux/errno.h> |
| 12 | #include <linux/export.h> |
Ralf Baechle | 95cf146 | 2012-08-01 17:15:32 +0200 | [diff] [blame] | 13 | #include <linux/list.h> |
| 14 | #include <linux/mutex.h> |
| 15 | #include <linux/spinlock.h> |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 16 | |
| 17 | #include <asm/clock.h> |
Ralf Baechle | 95cf146 | 2012-08-01 17:15:32 +0200 | [diff] [blame] | 18 | #include <asm/mach-loongson/loongson.h> |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 19 | |
| 20 | static LIST_HEAD(clock_list); |
| 21 | static DEFINE_SPINLOCK(clock_lock); |
| 22 | static DEFINE_MUTEX(clock_list_sem); |
| 23 | |
| 24 | /* Minimum CLK support */ |
| 25 | enum { |
| 26 | DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT, |
| 27 | DC_87PT, DC_DISABLE, DC_RESV |
| 28 | }; |
| 29 | |
| 30 | struct cpufreq_frequency_table loongson2_clockmod_table[] = { |
Viresh Kumar | 7f4b046 | 2014-03-28 19:11:47 +0530 | [diff] [blame] | 31 | {0, DC_RESV, CPUFREQ_ENTRY_INVALID}, |
| 32 | {0, DC_ZERO, CPUFREQ_ENTRY_INVALID}, |
| 33 | {0, DC_25PT, 0}, |
| 34 | {0, DC_37PT, 0}, |
| 35 | {0, DC_50PT, 0}, |
| 36 | {0, DC_62PT, 0}, |
| 37 | {0, DC_75PT, 0}, |
| 38 | {0, DC_87PT, 0}, |
| 39 | {0, DC_DISABLE, 0}, |
| 40 | {0, DC_RESV, CPUFREQ_TABLE_END}, |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 41 | }; |
| 42 | EXPORT_SYMBOL_GPL(loongson2_clockmod_table); |
| 43 | |
| 44 | static struct clk cpu_clk = { |
| 45 | .name = "cpu_clk", |
| 46 | .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES, |
| 47 | .rate = 800000000, |
| 48 | }; |
| 49 | |
| 50 | struct clk *clk_get(struct device *dev, const char *id) |
| 51 | { |
| 52 | return &cpu_clk; |
| 53 | } |
| 54 | EXPORT_SYMBOL(clk_get); |
| 55 | |
| 56 | static void propagate_rate(struct clk *clk) |
| 57 | { |
| 58 | struct clk *clkp; |
| 59 | |
| 60 | list_for_each_entry(clkp, &clock_list, node) { |
| 61 | if (likely(clkp->parent != clk)) |
| 62 | continue; |
| 63 | if (likely(clkp->ops && clkp->ops->recalc)) |
| 64 | clkp->ops->recalc(clkp); |
| 65 | if (unlikely(clkp->flags & CLK_RATE_PROPAGATES)) |
| 66 | propagate_rate(clkp); |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | int clk_enable(struct clk *clk) |
| 71 | { |
| 72 | return 0; |
| 73 | } |
| 74 | EXPORT_SYMBOL(clk_enable); |
| 75 | |
| 76 | void clk_disable(struct clk *clk) |
| 77 | { |
| 78 | } |
| 79 | EXPORT_SYMBOL(clk_disable); |
| 80 | |
| 81 | unsigned long clk_get_rate(struct clk *clk) |
| 82 | { |
| 83 | return (unsigned long)clk->rate; |
| 84 | } |
| 85 | EXPORT_SYMBOL(clk_get_rate); |
| 86 | |
| 87 | void clk_put(struct clk *clk) |
| 88 | { |
| 89 | } |
| 90 | EXPORT_SYMBOL(clk_put); |
| 91 | |
| 92 | int clk_set_rate(struct clk *clk, unsigned long rate) |
| 93 | { |
Stratos Karafotis | 4966ee4 | 2014-04-25 23:16:25 +0300 | [diff] [blame] | 94 | struct cpufreq_frequency_table *pos; |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 95 | int ret = 0; |
| 96 | int regval; |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 97 | |
| 98 | if (likely(clk->ops && clk->ops->set_rate)) { |
| 99 | unsigned long flags; |
| 100 | |
| 101 | spin_lock_irqsave(&clock_lock, flags); |
Ralf Baechle | 95cf146 | 2012-08-01 17:15:32 +0200 | [diff] [blame] | 102 | ret = clk->ops->set_rate(clk, rate, 0); |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 103 | spin_unlock_irqrestore(&clock_lock, flags); |
| 104 | } |
| 105 | |
| 106 | if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) |
| 107 | propagate_rate(clk); |
| 108 | |
Stratos Karafotis | 4966ee4 | 2014-04-25 23:16:25 +0300 | [diff] [blame] | 109 | cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table) |
| 110 | if (rate == pos->frequency) |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 111 | break; |
Stratos Karafotis | 4966ee4 | 2014-04-25 23:16:25 +0300 | [diff] [blame] | 112 | if (rate != pos->frequency) |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 113 | return -ENOTSUPP; |
| 114 | |
| 115 | clk->rate = rate; |
| 116 | |
Huacai Chen | 140e39c | 2014-06-26 11:41:27 +0800 | [diff] [blame] | 117 | regval = LOONGSON_CHIPCFG(0); |
Stratos Karafotis | 4966ee4 | 2014-04-25 23:16:25 +0300 | [diff] [blame] | 118 | regval = (regval & ~0x7) | (pos->driver_data - 1); |
Huacai Chen | 140e39c | 2014-06-26 11:41:27 +0800 | [diff] [blame] | 119 | LOONGSON_CHIPCFG(0) = regval; |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 120 | |
| 121 | return ret; |
| 122 | } |
Ralf Baechle | 95cf146 | 2012-08-01 17:15:32 +0200 | [diff] [blame] | 123 | EXPORT_SYMBOL_GPL(clk_set_rate); |
Wu Zhangjin | f8ede0f | 2009-11-17 01:32:59 +0800 | [diff] [blame] | 124 | |
| 125 | long clk_round_rate(struct clk *clk, unsigned long rate) |
| 126 | { |
| 127 | if (likely(clk->ops && clk->ops->round_rate)) { |
| 128 | unsigned long flags, rounded; |
| 129 | |
| 130 | spin_lock_irqsave(&clock_lock, flags); |
| 131 | rounded = clk->ops->round_rate(clk, rate); |
| 132 | spin_unlock_irqrestore(&clock_lock, flags); |
| 133 | |
| 134 | return rounded; |
| 135 | } |
| 136 | |
| 137 | return rate; |
| 138 | } |
| 139 | EXPORT_SYMBOL_GPL(clk_round_rate); |