Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * BRIEF MODULE DESCRIPTION |
| 4 | * Cogent CSB250 board setup. |
| 5 | * |
| 6 | * Copyright 2002 Cogent Computer Systems, Inc. |
| 7 | * dan@embeddededge.com |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License along |
| 26 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 28 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/init.h> |
| 30 | #include <linux/sched.h> |
| 31 | #include <linux/ioport.h> |
| 32 | #include <linux/mm.h> |
| 33 | #include <linux/console.h> |
| 34 | #include <linux/mc146818rtc.h> |
| 35 | #include <linux/delay.h> |
| 36 | |
| 37 | #include <asm/cpu.h> |
| 38 | #include <asm/bootinfo.h> |
| 39 | #include <asm/irq.h> |
| 40 | #include <asm/keyboard.h> |
| 41 | #include <asm/mipsregs.h> |
| 42 | #include <asm/reboot.h> |
| 43 | #include <asm/pgtable.h> |
| 44 | #include <asm/au1000.h> |
| 45 | #include <asm/csb250.h> |
| 46 | |
| 47 | extern int (*board_pci_idsel)(unsigned int devsel, int assert); |
| 48 | int csb250_pci_idsel(unsigned int devsel, int assert); |
| 49 | |
| 50 | void __init board_setup(void) |
| 51 | { |
| 52 | u32 pin_func, pin_val; |
| 53 | u32 sys_freqctrl, sys_clksrc; |
| 54 | |
| 55 | |
| 56 | // set AUX clock to 12MHz * 8 = 96 MHz |
| 57 | au_writel(8, SYS_AUXPLL); |
| 58 | au_writel(0, SYS_PINSTATERD); |
| 59 | udelay(100); |
| 60 | |
| 61 | #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) |
| 62 | |
| 63 | /* GPIO201 is input for PCMCIA card detect */ |
| 64 | /* GPIO203 is input for PCMCIA interrupt request */ |
| 65 | au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR); |
| 66 | |
| 67 | /* zero and disable FREQ2 */ |
| 68 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
| 69 | sys_freqctrl &= ~0xFFF00000; |
| 70 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
| 71 | |
| 72 | /* zero and disable USBH/USBD clocks */ |
| 73 | sys_clksrc = au_readl(SYS_CLKSRC); |
| 74 | sys_clksrc &= ~0x00007FE0; |
| 75 | au_writel(sys_clksrc, SYS_CLKSRC); |
| 76 | |
| 77 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
| 78 | sys_freqctrl &= ~0xFFF00000; |
| 79 | |
| 80 | sys_clksrc = au_readl(SYS_CLKSRC); |
| 81 | sys_clksrc &= ~0x00007FE0; |
| 82 | |
| 83 | // FREQ2 = aux/2 = 48 MHz |
| 84 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); |
| 85 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
| 86 | |
| 87 | /* |
| 88 | * Route 48MHz FREQ2 into USB Host and/or Device |
| 89 | */ |
| 90 | #ifdef CONFIG_USB_OHCI |
| 91 | sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); |
| 92 | #endif |
| 93 | #ifdef CONFIG_AU1X00_USB_DEVICE |
| 94 | sys_clksrc |= ((4<<7) | (0<<6) | (0<<5)); |
| 95 | #endif |
| 96 | au_writel(sys_clksrc, SYS_CLKSRC); |
| 97 | |
| 98 | |
| 99 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); |
| 100 | #ifndef CONFIG_AU1X00_USB_DEVICE |
| 101 | // 2nd USB port is USB host |
| 102 | pin_func |= 0x8000; |
| 103 | #endif |
| 104 | au_writel(pin_func, SYS_PINFUNC); |
| 105 | #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) |
| 106 | |
| 107 | /* Configure GPIO2....it's used by PCI among other things. |
| 108 | */ |
| 109 | |
| 110 | /* Make everything but GP200 (PCI RST) an input until we get |
| 111 | * the pins set correctly. |
| 112 | */ |
| 113 | au_writel(0x00000001, GPIO2_DIR); |
| 114 | |
| 115 | /* Set the pins used for output. |
| 116 | * A zero bit will leave PCI reset, LEDs off, power up USB, |
| 117 | * IDSEL disabled. |
| 118 | */ |
| 119 | pin_val = ((3 << 30) | (7 << 19) | (1 << 17) | (1 << 16)); |
| 120 | au_writel(pin_val, GPIO2_OUTPUT); |
| 121 | |
| 122 | /* Set the output direction. |
| 123 | */ |
| 124 | pin_val = ((3 << 14) | (7 << 3) | (1 << 1) | (1 << 0)); |
| 125 | au_writel(pin_val, GPIO2_DIR); |
| 126 | |
| 127 | #ifdef CONFIG_PCI |
| 128 | /* Use FREQ1 for the PCI output clock. We use the |
| 129 | * CPU clock of 384 MHz divided by 12 to get 32 MHz PCI. |
| 130 | * If Michael changes the CPU speed, we need to adjust |
| 131 | * that here as well :-). |
| 132 | */ |
| 133 | |
| 134 | /* zero and disable FREQ1 |
| 135 | */ |
| 136 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
| 137 | sys_freqctrl &= ~0x000ffc00; |
| 138 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
| 139 | |
| 140 | /* zero and disable PCI clock |
| 141 | */ |
| 142 | sys_clksrc = au_readl(SYS_CLKSRC); |
| 143 | sys_clksrc &= ~0x000f8000; |
| 144 | au_writel(sys_clksrc, SYS_CLKSRC); |
| 145 | |
| 146 | /* Get current values (which really should match above). |
| 147 | */ |
| 148 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
| 149 | sys_freqctrl &= ~0x000ffc00; |
| 150 | |
| 151 | sys_clksrc = au_readl(SYS_CLKSRC); |
| 152 | sys_clksrc &= ~0x000f8000; |
| 153 | |
| 154 | /* FREQ1 = cpu/12 = 32 MHz |
| 155 | */ |
| 156 | sys_freqctrl |= ((5<<12) | (1<<11) | (0<<10)); |
| 157 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
| 158 | |
| 159 | /* Just connect the clock without further dividing. |
| 160 | */ |
| 161 | sys_clksrc |= ((3<<17) | (0<<16) | (0<<15)); |
| 162 | au_writel(sys_clksrc, SYS_CLKSRC); |
| 163 | |
| 164 | udelay(1); |
| 165 | |
| 166 | /* Now that clocks should be running, take PCI out of reset. |
| 167 | */ |
| 168 | pin_val = au_readl(GPIO2_OUTPUT); |
| 169 | pin_val |= ((1 << 16) | 1); |
| 170 | au_writel(pin_val, GPIO2_OUTPUT); |
| 171 | |
| 172 | // Setup PCI bus controller |
| 173 | au_writel(0, Au1500_PCI_CMEM); |
| 174 | au_writel(0x00003fff, Au1500_CFG_BASE); |
| 175 | |
| 176 | /* We run big endian without any of the software byte swapping, |
| 177 | * so configure the PCI bridge to help us out. |
| 178 | */ |
| 179 | au_writel(0xf | (2<<6) | (1<<5) | (1<<4), Au1500_PCI_CFG); |
| 180 | |
| 181 | au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); |
| 182 | au_writel(0, Au1500_PCI_MWBASE_REV_CCL); |
| 183 | au_writel(0x02a00356, Au1500_PCI_STATCMD); |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 184 | au_writel(0x00003c04, Au1500_PCI_HDRTYPE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | au_writel(0x00000008, Au1500_PCI_MBAR); |
| 186 | au_sync(); |
| 187 | |
| 188 | board_pci_idsel = csb250_pci_idsel; |
| 189 | #endif |
| 190 | |
| 191 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ |
| 192 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); |
| 193 | |
| 194 | #ifdef CONFIG_RTC |
| 195 | // Enable the RTC if not already enabled |
| 196 | if (!(au_readl(0xac000028) & 0x20)) { |
| 197 | printk("enabling clock ...\n"); |
| 198 | au_writel((au_readl(0xac000028) | 0x20), 0xac000028); |
| 199 | } |
| 200 | // Put the clock in BCD mode |
| 201 | if (readl(0xac00002C) & 0x4) { /* reg B */ |
| 202 | au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); |
| 203 | au_sync(); |
| 204 | } |
| 205 | #endif |
| 206 | } |
| 207 | |
| 208 | /* The IDSEL is selected in the GPIO2 register. We will make device |
| 209 | * 12 appear in slot 0 and device 13 appear in slot 1. |
| 210 | */ |
| 211 | int |
| 212 | csb250_pci_idsel(unsigned int devsel, int assert) |
| 213 | { |
| 214 | int retval; |
| 215 | unsigned int gpio2_pins; |
| 216 | |
| 217 | retval = 1; |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 218 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | /* First, disable both selects, then assert the one requested. |
| 220 | */ |
| 221 | au_writel(0xc000c000, GPIO2_OUTPUT); |
| 222 | au_sync(); |
| 223 | |
| 224 | if (assert) { |
| 225 | if (devsel == 12) |
| 226 | gpio2_pins = 0x40000000; |
| 227 | else if (devsel == 13) |
| 228 | gpio2_pins = 0x80000000; |
| 229 | else { |
| 230 | gpio2_pins = 0xc000c000; |
| 231 | retval = 0; |
| 232 | } |
| 233 | au_writel(gpio2_pins, GPIO2_OUTPUT); |
| 234 | } |
| 235 | au_sync(); |
| 236 | |
| 237 | return retval; |
| 238 | } |