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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * BRIEF MODULE DESCRIPTION
3 * Galileo EV96100 rtc routines.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This file was derived from Carsten Langgaard's
10 * arch/mips/mips-boards/atlas/atlas_rtc.c.
11 *
12 * Carsten Langgaard, carstenl@mips.com
13 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <linux/init.h>
36#include <linux/kernel_stat.h>
37#include <linux/module.h>
38#include <linux/sched.h>
39#include <linux/spinlock.h>
40#include <linux/timex.h>
41
42#include <asm/mipsregs.h>
43#include <asm/ptrace.h>
44#include <asm/time.h>
45
46
47#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
48
49extern volatile unsigned long wall_jiffies;
50unsigned long missed_heart_beats = 0;
51
52static unsigned long r4k_offset; /* Amount to increment compare reg each time */
53static unsigned long r4k_cur; /* What counter should be at next timer irq */
54
55static inline void ack_r4ktimer(unsigned long newval)
56{
57 write_c0_compare(newval);
58}
59
60/*
61 * There are a lot of conceptually broken versions of the MIPS timer interrupt
62 * handler floating around. This one is rather different, but the algorithm
63 * is probably more robust.
64 */
65void mips_timer_interrupt(struct pt_regs *regs)
66{
67 int irq = 7; /* FIX ME */
68
69 if (r4k_offset == 0) {
70 goto null;
71 }
72
73 do {
74 kstat_this_cpu.irqs[irq]++;
75 do_timer(regs);
76#ifndef CONFIG_SMP
77 update_process_times(user_mode(regs));
78#endif
79 r4k_cur += r4k_offset;
80 ack_r4ktimer(r4k_cur);
81
82 } while (((unsigned long)read_c0_count()
83 - r4k_cur) < 0x7fffffff);
84 return;
85
86null:
87 ack_r4ktimer(0);
88}