Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2000,2001,2004 Broadcom Corporation |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation; either version 2 |
| 7 | * of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | * These are routines to set up and handle interrupts from the |
| 21 | * bcm1480 general purpose timer 0. We're using the timer as a |
| 22 | * system clock, so we set it up to run at 100 Hz. On every |
| 23 | * interrupt, we update our idea of what the time of day is, |
| 24 | * then call do_timer() in the architecture-independent kernel |
| 25 | * code to do general bookkeeping (e.g. update jiffies, run |
| 26 | * bottom halves, etc.) |
| 27 | */ |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/sched.h> |
| 30 | #include <linux/spinlock.h> |
| 31 | #include <linux/kernel_stat.h> |
| 32 | |
| 33 | #include <asm/irq.h> |
| 34 | #include <asm/ptrace.h> |
| 35 | #include <asm/addrspace.h> |
| 36 | #include <asm/time.h> |
| 37 | #include <asm/io.h> |
| 38 | |
| 39 | #include <asm/sibyte/bcm1480_regs.h> |
| 40 | #include <asm/sibyte/sb1250_regs.h> |
| 41 | #include <asm/sibyte/bcm1480_int.h> |
| 42 | #include <asm/sibyte/bcm1480_scd.h> |
| 43 | |
| 44 | #include <asm/sibyte/sb1250.h> |
| 45 | |
| 46 | |
| 47 | #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 |
| 48 | #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 |
| 49 | #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 |
| 50 | |
| 51 | extern int bcm1480_steal_irq(int irq); |
| 52 | |
| 53 | void bcm1480_time_init(void) |
| 54 | { |
| 55 | int cpu = smp_processor_id(); |
| 56 | int irq = K_BCM1480_INT_TIMER_0+cpu; |
| 57 | |
| 58 | /* Only have 4 general purpose timers */ |
| 59 | if (cpu > 3) { |
| 60 | BUG(); |
| 61 | } |
| 62 | |
| 63 | if (!cpu) { |
| 64 | /* Use our own gettimeoffset() routine */ |
| 65 | do_gettimeoffset = bcm1480_gettimeoffset; |
| 66 | } |
| 67 | |
| 68 | bcm1480_mask_irq(cpu, irq); |
| 69 | |
| 70 | /* Map the timer interrupt to ip[4] of this cpu */ |
| 71 | __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) |
| 72 | + (irq<<3))); |
| 73 | |
| 74 | /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */ |
| 75 | /* Disable the timer and set up the count */ |
| 76 | __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); |
| 77 | __raw_writeq( |
| 78 | #ifndef CONFIG_SIMULATION |
| 79 | 1000000/HZ |
| 80 | #else |
| 81 | 50000/HZ |
| 82 | #endif |
| 83 | , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); |
| 84 | |
| 85 | /* Set the timer running */ |
| 86 | __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, |
| 87 | IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); |
| 88 | |
| 89 | bcm1480_unmask_irq(cpu, irq); |
| 90 | bcm1480_steal_irq(irq); |
| 91 | /* |
| 92 | * This interrupt is "special" in that it doesn't use the request_irq |
| 93 | * way to hook the irq line. The timer interrupt is initialized early |
| 94 | * enough to make this a major pain, and it's also firing enough to |
| 95 | * warrant a bit of special case code. bcm1480_timer_interrupt is |
| 96 | * called directly from irq_handler.S when IP[4] is set during an |
| 97 | * interrupt |
| 98 | */ |
| 99 | } |
| 100 | |
| 101 | #include <asm/sibyte/sb1250.h> |
| 102 | |
| 103 | void bcm1480_timer_interrupt(struct pt_regs *regs) |
| 104 | { |
| 105 | int cpu = smp_processor_id(); |
| 106 | int irq = K_BCM1480_INT_TIMER_0+cpu; |
| 107 | |
| 108 | /* Reset the timer */ |
| 109 | __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, |
| 110 | IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); |
| 111 | |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 112 | if (cpu == 0) { |
[MIPS] James E Wilson | e1701fb | 2006-02-27 15:04:38 -0800 | [diff] [blame] | 113 | /* |
| 114 | * CPU 0 handles the global timer interrupt job |
| 115 | */ |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 116 | ll_timer_interrupt(irq, regs); |
| 117 | } |
[MIPS] James E Wilson | e1701fb | 2006-02-27 15:04:38 -0800 | [diff] [blame] | 118 | else { |
| 119 | /* |
| 120 | * other CPUs should just do profiling and process accounting |
| 121 | */ |
| 122 | ll_local_timer_interrupt(irq, regs); |
| 123 | } |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | /* |
| 127 | * We use our own do_gettimeoffset() instead of the generic one, |
| 128 | * because the generic one does not work for SMP case. |
| 129 | * In addition, since we use general timer 0 for system time, |
| 130 | * we can get accurate intra-jiffy offset without calibration. |
| 131 | */ |
| 132 | unsigned long bcm1480_gettimeoffset(void) |
| 133 | { |
| 134 | unsigned long count = |
| 135 | __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); |
| 136 | |
| 137 | return 1000000/HZ - count; |
| 138 | } |