Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/sh/boards/se/73180/irq.c |
| 3 | * |
| 4 | * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> |
| 5 | * Based on arch/sh/boards/se/7300/irq.c |
| 6 | * |
| 7 | * Modified for SH-Mobile SolutionEngine 73180 Support |
| 8 | * by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp> |
| 9 | * |
| 10 | * |
| 11 | */ |
| 12 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | #include <linux/init.h> |
| 14 | #include <linux/irq.h> |
| 15 | #include <asm/irq.h> |
| 16 | #include <asm/io.h> |
| 17 | #include <asm/mach/se73180.h> |
| 18 | |
| 19 | static int |
| 20 | intreq2irq(int i) |
| 21 | { |
| 22 | if (i == 5) |
| 23 | return 10; |
| 24 | return 32 + 7 - i; |
| 25 | } |
| 26 | |
| 27 | static int |
| 28 | irq2intreq(int irq) |
| 29 | { |
| 30 | if (irq == 10) |
| 31 | return 5; |
| 32 | return 7 - (irq - 32); |
| 33 | } |
| 34 | |
| 35 | static void |
| 36 | disable_intreq_irq(unsigned int irq) |
| 37 | { |
| 38 | ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSK0); |
| 39 | } |
| 40 | |
| 41 | static void |
| 42 | enable_intreq_irq(unsigned int irq) |
| 43 | { |
| 44 | ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSKCLR0); |
| 45 | } |
| 46 | |
| 47 | static void |
| 48 | mask_and_ack_intreq_irq(unsigned int irq) |
| 49 | { |
| 50 | disable_intreq_irq(irq); |
| 51 | } |
| 52 | |
| 53 | static unsigned int |
| 54 | startup_intreq_irq(unsigned int irq) |
| 55 | { |
| 56 | enable_intreq_irq(irq); |
| 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | static void |
| 61 | shutdown_intreq_irq(unsigned int irq) |
| 62 | { |
| 63 | disable_intreq_irq(irq); |
| 64 | } |
| 65 | |
| 66 | static void |
| 67 | end_intreq_irq(unsigned int irq) |
| 68 | { |
| 69 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
| 70 | enable_intreq_irq(irq); |
| 71 | } |
| 72 | |
| 73 | static struct hw_interrupt_type intreq_irq_type = { |
| 74 | .typename = "intreq", |
| 75 | .startup = startup_intreq_irq, |
| 76 | .shutdown = shutdown_intreq_irq, |
| 77 | .enable = enable_intreq_irq, |
| 78 | .disable = disable_intreq_irq, |
| 79 | .ack = mask_and_ack_intreq_irq, |
| 80 | .end = end_intreq_irq |
| 81 | }; |
| 82 | |
| 83 | void |
| 84 | make_intreq_irq(unsigned int irq) |
| 85 | { |
| 86 | disable_irq_nosync(irq); |
Ingo Molnar | d1bef4e | 2006-06-29 02:24:36 -0700 | [diff] [blame] | 87 | irq_desc[irq].chip = &intreq_irq_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | disable_intreq_irq(irq); |
| 89 | } |
| 90 | |
| 91 | int |
| 92 | shmse_irq_demux(int irq) |
| 93 | { |
| 94 | if (irq == IRQ5_IRQ) |
| 95 | return 10; |
| 96 | return irq; |
| 97 | } |
| 98 | |
| 99 | /* |
| 100 | * Initialize IRQ setting |
| 101 | */ |
| 102 | void __init |
| 103 | init_73180se_IRQ(void) |
| 104 | { |
| 105 | make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY); |
| 106 | |
| 107 | ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ |
| 108 | ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */ |
| 109 | ctrl_outl(3 << ((7 - 5) * 4), INTC_INTPRI0); /* irq5 pri=3 */ |
| 110 | ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */ |
| 111 | make_intreq_irq(10); |
| 112 | |
| 113 | make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8); |
| 114 | |
| 115 | ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */ |
| 116 | |
| 117 | make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); |
| 118 | make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); |
| 119 | make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY); |
| 120 | make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY); |
| 121 | make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, |
| 122 | IIC0_PRIORITY); |
| 123 | make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, |
| 124 | IIC0_PRIORITY); |
| 125 | make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY); |
| 126 | make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY); |
| 127 | make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY); |
| 128 | |
| 129 | /* VIO interrupt */ |
| 130 | make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); |
| 131 | make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); |
| 132 | make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); |
| 133 | |
| 134 | make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY); |
| 135 | ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ |
| 136 | } |