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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: include/asm-blackfin/cacheflush.h
3 * Based on: include/asm-m68knommu/cacheflush.h
4 * Author: LG Soft India
5 * Copyright (C) 2004 Analog Devices Inc.
6 * Created: Tue Sep 21 2004
7 * Description: Blackfin low-level cache routines adapted from the i386
8 * and PPC versions by Greg Ungerer (gerg@snapgear.com)
9 *
10 * Modified:
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; see the file COPYING.
26 * If not, write to the Free Software Foundation,
27 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
28 */
29
30#ifndef _BLACKFIN_CACHEFLUSH_H
31#define _BLACKFIN_CACHEFLUSH_H
32
Mike Frysinger8fb4f8f2008-10-16 23:39:12 +080033extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address);
34extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
35extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
36extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
37extern void blackfin_dflush_page(void *page);
Graf Yang6b3087c2009-01-07 23:14:39 +080038extern void blackfin_invalidate_entire_dcache(void);
Bryan Wu1394f032007-05-06 14:50:22 -070039
40#define flush_dcache_mmap_lock(mapping) do { } while (0)
41#define flush_dcache_mmap_unlock(mapping) do { } while (0)
42#define flush_cache_mm(mm) do { } while (0)
43#define flush_cache_range(vma, start, end) do { } while (0)
44#define flush_cache_page(vma, vmaddr) do { } while (0)
45#define flush_cache_vmap(start, end) do { } while (0)
46#define flush_cache_vunmap(start, end) do { } while (0)
47
Graf Yang6b3087c2009-01-07 23:14:39 +080048#ifdef CONFIG_SMP
49#define flush_icache_range_others(start, end) \
50 smp_icache_flush_range_others((start), (end))
51#else
52#define flush_icache_range_others(start, end) do { } while (0)
53#endif
54
Bryan Wu1394f032007-05-06 14:50:22 -070055static inline void flush_icache_range(unsigned start, unsigned end)
56{
Robin Getz3bebca22007-10-10 23:55:26 +080057#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE)
Bryan Wu1394f032007-05-06 14:50:22 -070058
Robin Getz3bebca22007-10-10 23:55:26 +080059# if defined(CONFIG_BFIN_WT)
Bryan Wu1394f032007-05-06 14:50:22 -070060 blackfin_icache_flush_range((start), (end));
Graf Yang6b3087c2009-01-07 23:14:39 +080061 flush_icache_range_others(start, end);
Bryan Wu1394f032007-05-06 14:50:22 -070062# else
63 blackfin_icache_dcache_flush_range((start), (end));
64# endif
65
66#else
67
Robin Getz3bebca22007-10-10 23:55:26 +080068# if defined(CONFIG_BFIN_ICACHE)
Bryan Wu1394f032007-05-06 14:50:22 -070069 blackfin_icache_flush_range((start), (end));
Graf Yang6b3087c2009-01-07 23:14:39 +080070 flush_icache_range_others(start, end);
Bryan Wu1394f032007-05-06 14:50:22 -070071# endif
Robin Getz3bebca22007-10-10 23:55:26 +080072# if defined(CONFIG_BFIN_DCACHE)
Bryan Wu1394f032007-05-06 14:50:22 -070073 blackfin_dcache_flush_range((start), (end));
74# endif
75
76#endif
77}
78
Graf Yang6b3087c2009-01-07 23:14:39 +080079#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
80do { memcpy(dst, src, len); \
81 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
82 flush_icache_range_others((unsigned long) (dst), (unsigned long) (dst) + (len));\
Bryan Wu1394f032007-05-06 14:50:22 -070083} while (0)
Graf Yang6b3087c2009-01-07 23:14:39 +080084
Bryan Wu1394f032007-05-06 14:50:22 -070085#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
86
Robin Getz3bebca22007-10-10 23:55:26 +080087#if defined(CONFIG_BFIN_DCACHE)
Bryan Wu1394f032007-05-06 14:50:22 -070088# define invalidate_dcache_range(start,end) blackfin_dcache_invalidate_range((start), (end))
89#else
90# define invalidate_dcache_range(start,end) do { } while (0)
91#endif
Robin Getz3bebca22007-10-10 23:55:26 +080092#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_WB)
Bryan Wu1394f032007-05-06 14:50:22 -070093# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end))
94# define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
95#else
96# define flush_dcache_range(start,end) do { } while (0)
Graf Yang6b3087c2009-01-07 23:14:39 +080097# define flush_dcache_page(page) do { } while (0)
Bryan Wu1394f032007-05-06 14:50:22 -070098#endif
99
Mike Frysinger04be80e2008-10-16 23:33:53 +0800100extern unsigned long reserved_mem_dcache_on;
101extern unsigned long reserved_mem_icache_on;
102
103static inline int bfin_addr_dcachable(unsigned long addr)
104{
105#ifdef CONFIG_BFIN_DCACHE
106 if (addr < (_ramend - DMA_UNCACHED_REGION))
107 return 1;
108#endif
109
110 if (reserved_mem_dcache_on &&
111 addr >= _ramend && addr < physical_mem_end)
112 return 1;
113
114 return 0;
115}
116
Robin Getz3bebca22007-10-10 23:55:26 +0800117#endif /* _BLACKFIN_ICACHEFLUSH_H */