David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle |
Justin P. Mattock | 79add62 | 2011-04-04 14:15:29 -0700 | [diff] [blame] | 7 | * Copyright (C) 1996 David S. Miller (davem@davemloft.net) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 8 | * Copyright (C) 1994, 1995, 1996, by Andreas Busse |
| 9 | * Copyright (C) 1999 Silicon Graphics, Inc. |
| 10 | * Copyright (C) 2000 MIPS Technologies, Inc. |
| 11 | * written by Carsten Langgaard, carstenl@mips.com |
| 12 | */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 13 | |
David Daney | a36d822 | 2014-05-28 23:52:04 +0200 | [diff] [blame] | 14 | #define USE_ALTERNATE_RESUME_IMPL 1 |
| 15 | .set push |
| 16 | .set arch=mips64r2 |
| 17 | #include "r4k_switch.S" |
| 18 | .set pop |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 19 | /* |
| 20 | * task_struct *resume(task_struct *prev, task_struct *next, |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 21 | * struct thread_info *next_ti, int usedfpu) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 22 | */ |
| 23 | .align 7 |
| 24 | LEAF(resume) |
| 25 | .set arch=octeon |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 26 | mfc0 t1, CP0_STATUS |
| 27 | LONG_S t1, THREAD_STATUS(a0) |
| 28 | cpu_save_nonscratch a0 |
| 29 | LONG_S ra, THREAD_REG31(a0) |
| 30 | |
David Daney | a36d822 | 2014-05-28 23:52:04 +0200 | [diff] [blame] | 31 | /* |
| 32 | * check if we need to save FPU registers |
| 33 | */ |
David Daney | d6e4152 | 2015-01-15 16:11:06 +0300 | [diff] [blame] | 34 | .set push |
| 35 | .set noreorder |
| 36 | beqz a3, 1f |
| 37 | PTR_L t3, TASK_THREAD_INFO(a0) |
| 38 | .set pop |
David Daney | a36d822 | 2014-05-28 23:52:04 +0200 | [diff] [blame] | 39 | |
| 40 | /* |
| 41 | * clear saved user stack CU1 bit |
| 42 | */ |
| 43 | LONG_L t0, ST_OFF(t3) |
| 44 | li t1, ~ST0_CU1 |
| 45 | and t0, t0, t1 |
| 46 | LONG_S t0, ST_OFF(t3) |
| 47 | |
| 48 | .set push |
| 49 | .set arch=mips64r2 |
| 50 | fpu_save_double a0 t0 t1 # c0_status passed in t0 |
| 51 | # clobbers t1 |
| 52 | .set pop |
| 53 | 1: |
| 54 | |
| 55 | /* check if we need to save COP2 registers */ |
David Daney | d6e4152 | 2015-01-15 16:11:06 +0300 | [diff] [blame] | 56 | LONG_L t0, ST_OFF(t3) |
David Daney | a36d822 | 2014-05-28 23:52:04 +0200 | [diff] [blame] | 57 | bbit0 t0, 30, 1f |
| 58 | |
| 59 | /* Disable COP2 in the stored process state */ |
| 60 | li t1, ST0_CU2 |
| 61 | xor t0, t1 |
David Daney | d6e4152 | 2015-01-15 16:11:06 +0300 | [diff] [blame] | 62 | LONG_S t0, ST_OFF(t3) |
David Daney | a36d822 | 2014-05-28 23:52:04 +0200 | [diff] [blame] | 63 | |
| 64 | /* Enable COP2 so we can save it */ |
| 65 | mfc0 t0, CP0_STATUS |
| 66 | or t0, t1 |
| 67 | mtc0 t0, CP0_STATUS |
| 68 | |
| 69 | /* Save COP2 */ |
| 70 | daddu a0, THREAD_CP2 |
| 71 | jal octeon_cop2_save |
| 72 | dsubu a0, THREAD_CP2 |
| 73 | |
| 74 | /* Disable COP2 now that we are done */ |
| 75 | mfc0 t0, CP0_STATUS |
| 76 | li t1, ST0_CU2 |
| 77 | xor t0, t1 |
| 78 | mtc0 t0, CP0_STATUS |
| 79 | |
| 80 | 1: |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 81 | #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0 |
| 82 | /* Check if we need to store CVMSEG state */ |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 83 | mfc0 t0, $11,7 /* CvmMemCtl */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 84 | bbit0 t0, 6, 3f /* Is user access enabled? */ |
| 85 | |
| 86 | /* Store the CVMSEG state */ |
| 87 | /* Extract the size of CVMSEG */ |
| 88 | andi t0, 0x3f |
| 89 | /* Multiply * (cache line size/sizeof(long)/2) */ |
| 90 | sll t0, 7-LONGLOG-1 |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 91 | li t1, -32768 /* Base address of CVMSEG */ |
| 92 | LONG_ADDI t2, a0, THREAD_CVMSEG /* Where to store CVMSEG to */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 93 | synciobdma |
| 94 | 2: |
| 95 | .set noreorder |
| 96 | LONG_L t8, 0(t1) /* Load from CVMSEG */ |
| 97 | subu t0, 1 /* Decrement loop var */ |
| 98 | LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */ |
| 99 | LONG_ADDU t1, LONGSIZE*2 /* Increment loc in CVMSEG */ |
| 100 | LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */ |
| 101 | LONG_ADDU t2, LONGSIZE*2 /* Increment loc in thread storage */ |
| 102 | bnez t0, 2b /* Loop until we've copied it all */ |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 103 | LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 104 | .set reorder |
| 105 | |
| 106 | /* Disable access to CVMSEG */ |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 107 | mfc0 t0, $11,7 /* CvmMemCtl */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 108 | xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */ |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 109 | mtc0 t0, $11,7 /* CvmMemCtl */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 110 | #endif |
| 111 | 3: |
Gregory Fong | 1400eb6 | 2013-06-17 19:36:07 +0000 | [diff] [blame] | 112 | |
| 113 | #if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP) |
James Hogan | 8b3c569 | 2013-10-07 12:14:26 +0100 | [diff] [blame] | 114 | PTR_LA t8, __stack_chk_guard |
Gregory Fong | 1400eb6 | 2013-06-17 19:36:07 +0000 | [diff] [blame] | 115 | LONG_L t9, TASK_STACK_CANARY(a1) |
| 116 | LONG_S t9, 0(t8) |
| 117 | #endif |
| 118 | |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 119 | /* |
| 120 | * The order of restoring the registers takes care of the race |
| 121 | * updating $28, $29 and kernelsp without disabling ints. |
| 122 | */ |
| 123 | move $28, a2 |
| 124 | cpu_restore_nonscratch a1 |
| 125 | |
David Daney | a36d822 | 2014-05-28 23:52:04 +0200 | [diff] [blame] | 126 | PTR_ADDU t0, $28, _THREAD_SIZE - 32 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 127 | set_saved_sp t0, t1, t2 |
| 128 | |
| 129 | mfc0 t1, CP0_STATUS /* Do we really need this? */ |
| 130 | li a3, 0xff01 |
| 131 | and t1, a3 |
| 132 | LONG_L a2, THREAD_STATUS(a1) |
| 133 | nor a3, $0, a3 |
| 134 | and a2, a3 |
| 135 | or a2, t1 |
| 136 | mtc0 a2, CP0_STATUS |
| 137 | move v0, a0 |
| 138 | jr ra |
| 139 | END(resume) |
| 140 | |
| 141 | /* |
| 142 | * void octeon_cop2_save(struct octeon_cop2_state *a0) |
| 143 | */ |
| 144 | .align 7 |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 145 | .set push |
| 146 | .set noreorder |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 147 | LEAF(octeon_cop2_save) |
| 148 | |
| 149 | dmfc0 t9, $9,7 /* CvmCtl register. */ |
| 150 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 151 | /* Save the COP2 CRC state */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 152 | dmfc2 t0, 0x0201 |
| 153 | dmfc2 t1, 0x0202 |
| 154 | dmfc2 t2, 0x0200 |
| 155 | sd t0, OCTEON_CP2_CRC_IV(a0) |
| 156 | sd t1, OCTEON_CP2_CRC_LENGTH(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 157 | /* Skip next instructions if CvmCtl[NODFA_CP2] set */ |
| 158 | bbit1 t9, 28, 1f |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 159 | sd t2, OCTEON_CP2_CRC_POLY(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 160 | |
| 161 | /* Save the LLM state */ |
| 162 | dmfc2 t0, 0x0402 |
| 163 | dmfc2 t1, 0x040A |
| 164 | sd t0, OCTEON_CP2_LLM_DAT(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 165 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 166 | 1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */ |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 167 | sd t1, OCTEON_CP2_LLM_DAT+8(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 168 | |
| 169 | /* Save the COP2 crypto state */ |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 170 | /* this part is mostly common to both pass 1 and later revisions */ |
| 171 | dmfc2 t0, 0x0084 |
| 172 | dmfc2 t1, 0x0080 |
| 173 | dmfc2 t2, 0x0081 |
| 174 | dmfc2 t3, 0x0082 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 175 | sd t0, OCTEON_CP2_3DES_IV(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 176 | dmfc2 t0, 0x0088 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 177 | sd t1, OCTEON_CP2_3DES_KEY(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 178 | dmfc2 t1, 0x0111 /* only necessary for pass 1 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 179 | sd t2, OCTEON_CP2_3DES_KEY+8(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 180 | dmfc2 t2, 0x0102 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 181 | sd t3, OCTEON_CP2_3DES_KEY+16(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 182 | dmfc2 t3, 0x0103 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 183 | sd t0, OCTEON_CP2_3DES_RESULT(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 184 | dmfc2 t0, 0x0104 |
| 185 | sd t1, OCTEON_CP2_AES_INP0(a0) /* only necessary for pass 1 */ |
| 186 | dmfc2 t1, 0x0105 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 187 | sd t2, OCTEON_CP2_AES_IV(a0) |
| 188 | dmfc2 t2, 0x0106 |
| 189 | sd t3, OCTEON_CP2_AES_IV+8(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 190 | dmfc2 t3, 0x0107 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 191 | sd t0, OCTEON_CP2_AES_KEY(a0) |
| 192 | dmfc2 t0, 0x0110 |
| 193 | sd t1, OCTEON_CP2_AES_KEY+8(a0) |
| 194 | dmfc2 t1, 0x0100 |
| 195 | sd t2, OCTEON_CP2_AES_KEY+16(a0) |
| 196 | dmfc2 t2, 0x0101 |
| 197 | sd t3, OCTEON_CP2_AES_KEY+24(a0) |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 198 | mfc0 v0, $15,0 /* Get the processor ID register */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 199 | sd t0, OCTEON_CP2_AES_KEYLEN(a0) |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 200 | li v1, 0x000d0000 /* This is the processor ID of Octeon Pass1 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 201 | sd t1, OCTEON_CP2_AES_RESULT(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 202 | /* Skip to the Pass1 version of the remainder of the COP2 state */ |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 203 | beq v0, v1, 2f |
| 204 | sd t2, OCTEON_CP2_AES_RESULT+8(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 205 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 206 | /* the non-pass1 state when !CvmCtl[NOCRYPTO] */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 207 | dmfc2 t1, 0x0240 |
| 208 | dmfc2 t2, 0x0241 |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 209 | ori v1, v1, 0x9500 /* lowest OCTEON III PrId*/ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 210 | dmfc2 t3, 0x0242 |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 211 | subu v1, v0, v1 /* prid - lowest OCTEON III PrId */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 212 | dmfc2 t0, 0x0243 |
| 213 | sd t1, OCTEON_CP2_HSH_DATW(a0) |
| 214 | dmfc2 t1, 0x0244 |
| 215 | sd t2, OCTEON_CP2_HSH_DATW+8(a0) |
| 216 | dmfc2 t2, 0x0245 |
| 217 | sd t3, OCTEON_CP2_HSH_DATW+16(a0) |
| 218 | dmfc2 t3, 0x0246 |
| 219 | sd t0, OCTEON_CP2_HSH_DATW+24(a0) |
| 220 | dmfc2 t0, 0x0247 |
| 221 | sd t1, OCTEON_CP2_HSH_DATW+32(a0) |
| 222 | dmfc2 t1, 0x0248 |
| 223 | sd t2, OCTEON_CP2_HSH_DATW+40(a0) |
| 224 | dmfc2 t2, 0x0249 |
| 225 | sd t3, OCTEON_CP2_HSH_DATW+48(a0) |
| 226 | dmfc2 t3, 0x024A |
| 227 | sd t0, OCTEON_CP2_HSH_DATW+56(a0) |
| 228 | dmfc2 t0, 0x024B |
| 229 | sd t1, OCTEON_CP2_HSH_DATW+64(a0) |
| 230 | dmfc2 t1, 0x024C |
| 231 | sd t2, OCTEON_CP2_HSH_DATW+72(a0) |
| 232 | dmfc2 t2, 0x024D |
| 233 | sd t3, OCTEON_CP2_HSH_DATW+80(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 234 | dmfc2 t3, 0x024E |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 235 | sd t0, OCTEON_CP2_HSH_DATW+88(a0) |
| 236 | dmfc2 t0, 0x0250 |
| 237 | sd t1, OCTEON_CP2_HSH_DATW+96(a0) |
| 238 | dmfc2 t1, 0x0251 |
| 239 | sd t2, OCTEON_CP2_HSH_DATW+104(a0) |
| 240 | dmfc2 t2, 0x0252 |
| 241 | sd t3, OCTEON_CP2_HSH_DATW+112(a0) |
| 242 | dmfc2 t3, 0x0253 |
| 243 | sd t0, OCTEON_CP2_HSH_IVW(a0) |
| 244 | dmfc2 t0, 0x0254 |
| 245 | sd t1, OCTEON_CP2_HSH_IVW+8(a0) |
| 246 | dmfc2 t1, 0x0255 |
| 247 | sd t2, OCTEON_CP2_HSH_IVW+16(a0) |
| 248 | dmfc2 t2, 0x0256 |
| 249 | sd t3, OCTEON_CP2_HSH_IVW+24(a0) |
| 250 | dmfc2 t3, 0x0257 |
| 251 | sd t0, OCTEON_CP2_HSH_IVW+32(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 252 | dmfc2 t0, 0x0258 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 253 | sd t1, OCTEON_CP2_HSH_IVW+40(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 254 | dmfc2 t1, 0x0259 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 255 | sd t2, OCTEON_CP2_HSH_IVW+48(a0) |
| 256 | dmfc2 t2, 0x025E |
| 257 | sd t3, OCTEON_CP2_HSH_IVW+56(a0) |
| 258 | dmfc2 t3, 0x025A |
| 259 | sd t0, OCTEON_CP2_GFM_MULT(a0) |
| 260 | dmfc2 t0, 0x025B |
| 261 | sd t1, OCTEON_CP2_GFM_MULT+8(a0) |
| 262 | sd t2, OCTEON_CP2_GFM_POLY(a0) |
| 263 | sd t3, OCTEON_CP2_GFM_RESULT(a0) |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 264 | bltz v1, 4f |
| 265 | sd t0, OCTEON_CP2_GFM_RESULT+8(a0) |
| 266 | /* OCTEON III things*/ |
| 267 | dmfc2 t0, 0x024F |
| 268 | dmfc2 t1, 0x0050 |
| 269 | sd t0, OCTEON_CP2_SHA3(a0) |
| 270 | sd t1, OCTEON_CP2_SHA3+8(a0) |
| 271 | 4: |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 272 | jr ra |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 273 | nop |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 274 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 275 | 2: /* pass 1 special stuff when !CvmCtl[NOCRYPTO] */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 276 | dmfc2 t3, 0x0040 |
| 277 | dmfc2 t0, 0x0041 |
| 278 | dmfc2 t1, 0x0042 |
| 279 | dmfc2 t2, 0x0043 |
| 280 | sd t3, OCTEON_CP2_HSH_DATW(a0) |
| 281 | dmfc2 t3, 0x0044 |
| 282 | sd t0, OCTEON_CP2_HSH_DATW+8(a0) |
| 283 | dmfc2 t0, 0x0045 |
| 284 | sd t1, OCTEON_CP2_HSH_DATW+16(a0) |
| 285 | dmfc2 t1, 0x0046 |
| 286 | sd t2, OCTEON_CP2_HSH_DATW+24(a0) |
| 287 | dmfc2 t2, 0x0048 |
| 288 | sd t3, OCTEON_CP2_HSH_DATW+32(a0) |
| 289 | dmfc2 t3, 0x0049 |
| 290 | sd t0, OCTEON_CP2_HSH_DATW+40(a0) |
| 291 | dmfc2 t0, 0x004A |
| 292 | sd t1, OCTEON_CP2_HSH_DATW+48(a0) |
| 293 | sd t2, OCTEON_CP2_HSH_IVW(a0) |
| 294 | sd t3, OCTEON_CP2_HSH_IVW+8(a0) |
| 295 | sd t0, OCTEON_CP2_HSH_IVW+16(a0) |
| 296 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 297 | 3: /* pass 1 or CvmCtl[NOCRYPTO] set */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 298 | jr ra |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 299 | nop |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 300 | END(octeon_cop2_save) |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 301 | .set pop |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 302 | |
| 303 | /* |
| 304 | * void octeon_cop2_restore(struct octeon_cop2_state *a0) |
| 305 | */ |
| 306 | .align 7 |
| 307 | .set push |
| 308 | .set noreorder |
| 309 | LEAF(octeon_cop2_restore) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 310 | /* First cache line was prefetched before the call */ |
| 311 | pref 4, 128(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 312 | dmfc0 t9, $9,7 /* CvmCtl register. */ |
| 313 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 314 | pref 4, 256(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 315 | ld t0, OCTEON_CP2_CRC_IV(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 316 | pref 4, 384(a0) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 317 | ld t1, OCTEON_CP2_CRC_LENGTH(a0) |
| 318 | ld t2, OCTEON_CP2_CRC_POLY(a0) |
| 319 | |
| 320 | /* Restore the COP2 CRC state */ |
| 321 | dmtc2 t0, 0x0201 |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 322 | dmtc2 t1, 0x1202 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 323 | bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */ |
| 324 | dmtc2 t2, 0x4200 |
| 325 | |
| 326 | /* Restore the LLM state */ |
| 327 | ld t0, OCTEON_CP2_LLM_DAT(a0) |
| 328 | ld t1, OCTEON_CP2_LLM_DAT+8(a0) |
| 329 | dmtc2 t0, 0x0402 |
| 330 | dmtc2 t1, 0x040A |
| 331 | |
| 332 | 2: |
| 333 | bbit1 t9, 26, done_restore /* done if CvmCtl[NOCRYPTO] set */ |
| 334 | nop |
| 335 | |
| 336 | /* Restore the COP2 crypto state common to pass 1 and pass 2 */ |
| 337 | ld t0, OCTEON_CP2_3DES_IV(a0) |
| 338 | ld t1, OCTEON_CP2_3DES_KEY(a0) |
| 339 | ld t2, OCTEON_CP2_3DES_KEY+8(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 340 | dmtc2 t0, 0x0084 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 341 | ld t0, OCTEON_CP2_3DES_KEY+16(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 342 | dmtc2 t1, 0x0080 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 343 | ld t1, OCTEON_CP2_3DES_RESULT(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 344 | dmtc2 t2, 0x0081 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 345 | ld t2, OCTEON_CP2_AES_INP0(a0) /* only really needed for pass 1 */ |
| 346 | dmtc2 t0, 0x0082 |
| 347 | ld t0, OCTEON_CP2_AES_IV(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 348 | dmtc2 t1, 0x0098 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 349 | ld t1, OCTEON_CP2_AES_IV+8(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 350 | dmtc2 t2, 0x010A /* only really needed for pass 1 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 351 | ld t2, OCTEON_CP2_AES_KEY(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 352 | dmtc2 t0, 0x0102 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 353 | ld t0, OCTEON_CP2_AES_KEY+8(a0) |
| 354 | dmtc2 t1, 0x0103 |
| 355 | ld t1, OCTEON_CP2_AES_KEY+16(a0) |
| 356 | dmtc2 t2, 0x0104 |
| 357 | ld t2, OCTEON_CP2_AES_KEY+24(a0) |
| 358 | dmtc2 t0, 0x0105 |
| 359 | ld t0, OCTEON_CP2_AES_KEYLEN(a0) |
| 360 | dmtc2 t1, 0x0106 |
| 361 | ld t1, OCTEON_CP2_AES_RESULT(a0) |
| 362 | dmtc2 t2, 0x0107 |
| 363 | ld t2, OCTEON_CP2_AES_RESULT+8(a0) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 364 | mfc0 t3, $15,0 /* Get the processor ID register */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 365 | dmtc2 t0, 0x0110 |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 366 | li v0, 0x000d0000 /* This is the processor ID of Octeon Pass1 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 367 | dmtc2 t1, 0x0100 |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 368 | bne v0, t3, 3f /* Skip the next stuff for non-pass1 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 369 | dmtc2 t2, 0x0101 |
| 370 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 371 | /* this code is specific for pass 1 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 372 | ld t0, OCTEON_CP2_HSH_DATW(a0) |
| 373 | ld t1, OCTEON_CP2_HSH_DATW+8(a0) |
| 374 | ld t2, OCTEON_CP2_HSH_DATW+16(a0) |
| 375 | dmtc2 t0, 0x0040 |
| 376 | ld t0, OCTEON_CP2_HSH_DATW+24(a0) |
| 377 | dmtc2 t1, 0x0041 |
| 378 | ld t1, OCTEON_CP2_HSH_DATW+32(a0) |
| 379 | dmtc2 t2, 0x0042 |
| 380 | ld t2, OCTEON_CP2_HSH_DATW+40(a0) |
| 381 | dmtc2 t0, 0x0043 |
| 382 | ld t0, OCTEON_CP2_HSH_DATW+48(a0) |
| 383 | dmtc2 t1, 0x0044 |
| 384 | ld t1, OCTEON_CP2_HSH_IVW(a0) |
| 385 | dmtc2 t2, 0x0045 |
| 386 | ld t2, OCTEON_CP2_HSH_IVW+8(a0) |
| 387 | dmtc2 t0, 0x0046 |
| 388 | ld t0, OCTEON_CP2_HSH_IVW+16(a0) |
| 389 | dmtc2 t1, 0x0048 |
| 390 | dmtc2 t2, 0x0049 |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 391 | b done_restore /* unconditional branch */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 392 | dmtc2 t0, 0x004A |
| 393 | |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 394 | 3: /* this is post-pass1 code */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 395 | ld t2, OCTEON_CP2_HSH_DATW(a0) |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 396 | ori v0, v0, 0x9500 /* lowest OCTEON III PrId*/ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 397 | ld t0, OCTEON_CP2_HSH_DATW+8(a0) |
| 398 | ld t1, OCTEON_CP2_HSH_DATW+16(a0) |
| 399 | dmtc2 t2, 0x0240 |
| 400 | ld t2, OCTEON_CP2_HSH_DATW+24(a0) |
| 401 | dmtc2 t0, 0x0241 |
| 402 | ld t0, OCTEON_CP2_HSH_DATW+32(a0) |
| 403 | dmtc2 t1, 0x0242 |
| 404 | ld t1, OCTEON_CP2_HSH_DATW+40(a0) |
| 405 | dmtc2 t2, 0x0243 |
| 406 | ld t2, OCTEON_CP2_HSH_DATW+48(a0) |
| 407 | dmtc2 t0, 0x0244 |
| 408 | ld t0, OCTEON_CP2_HSH_DATW+56(a0) |
| 409 | dmtc2 t1, 0x0245 |
| 410 | ld t1, OCTEON_CP2_HSH_DATW+64(a0) |
| 411 | dmtc2 t2, 0x0246 |
| 412 | ld t2, OCTEON_CP2_HSH_DATW+72(a0) |
| 413 | dmtc2 t0, 0x0247 |
| 414 | ld t0, OCTEON_CP2_HSH_DATW+80(a0) |
| 415 | dmtc2 t1, 0x0248 |
| 416 | ld t1, OCTEON_CP2_HSH_DATW+88(a0) |
| 417 | dmtc2 t2, 0x0249 |
| 418 | ld t2, OCTEON_CP2_HSH_DATW+96(a0) |
| 419 | dmtc2 t0, 0x024A |
| 420 | ld t0, OCTEON_CP2_HSH_DATW+104(a0) |
| 421 | dmtc2 t1, 0x024B |
| 422 | ld t1, OCTEON_CP2_HSH_DATW+112(a0) |
| 423 | dmtc2 t2, 0x024C |
| 424 | ld t2, OCTEON_CP2_HSH_IVW(a0) |
| 425 | dmtc2 t0, 0x024D |
| 426 | ld t0, OCTEON_CP2_HSH_IVW+8(a0) |
| 427 | dmtc2 t1, 0x024E |
| 428 | ld t1, OCTEON_CP2_HSH_IVW+16(a0) |
| 429 | dmtc2 t2, 0x0250 |
| 430 | ld t2, OCTEON_CP2_HSH_IVW+24(a0) |
| 431 | dmtc2 t0, 0x0251 |
| 432 | ld t0, OCTEON_CP2_HSH_IVW+32(a0) |
| 433 | dmtc2 t1, 0x0252 |
| 434 | ld t1, OCTEON_CP2_HSH_IVW+40(a0) |
| 435 | dmtc2 t2, 0x0253 |
| 436 | ld t2, OCTEON_CP2_HSH_IVW+48(a0) |
| 437 | dmtc2 t0, 0x0254 |
| 438 | ld t0, OCTEON_CP2_HSH_IVW+56(a0) |
| 439 | dmtc2 t1, 0x0255 |
| 440 | ld t1, OCTEON_CP2_GFM_MULT(a0) |
| 441 | dmtc2 t2, 0x0256 |
| 442 | ld t2, OCTEON_CP2_GFM_MULT+8(a0) |
| 443 | dmtc2 t0, 0x0257 |
| 444 | ld t0, OCTEON_CP2_GFM_POLY(a0) |
| 445 | dmtc2 t1, 0x0258 |
| 446 | ld t1, OCTEON_CP2_GFM_RESULT(a0) |
| 447 | dmtc2 t2, 0x0259 |
| 448 | ld t2, OCTEON_CP2_GFM_RESULT+8(a0) |
| 449 | dmtc2 t0, 0x025E |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 450 | subu v0, t3, v0 /* prid - lowest OCTEON III PrId */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 451 | dmtc2 t1, 0x025A |
David Daney | 6b3a287 | 2015-01-15 16:11:07 +0300 | [diff] [blame^] | 452 | bltz v0, done_restore |
| 453 | dmtc2 t2, 0x025B |
| 454 | /* OCTEON III things*/ |
| 455 | ld t0, OCTEON_CP2_SHA3(a0) |
| 456 | ld t1, OCTEON_CP2_SHA3+8(a0) |
| 457 | dmtc2 t0, 0x0051 |
| 458 | dmtc2 t1, 0x0050 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 459 | done_restore: |
| 460 | jr ra |
| 461 | nop |
| 462 | END(octeon_cop2_restore) |
| 463 | .set pop |
| 464 | |
| 465 | /* |
| 466 | * void octeon_mult_save() |
| 467 | * sp is assumed to point to a struct pt_regs |
| 468 | * |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 469 | * NOTE: This is called in SAVE_TEMP in stackframe.h. It can |
| 470 | * safely modify v1,k0, k1,$10-$15, and $24. It will |
| 471 | * be overwritten with a processor specific version of the code. |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 472 | */ |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 473 | .p2align 7 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 474 | .set push |
| 475 | .set noreorder |
| 476 | LEAF(octeon_mult_save) |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 477 | jr ra |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 478 | nop |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 479 | .space 30 * 4, 0 |
| 480 | octeon_mult_save_end: |
| 481 | EXPORT(octeon_mult_save_end) |
| 482 | END(octeon_mult_save) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 483 | |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 484 | LEAF(octeon_mult_save2) |
| 485 | /* Save the multiplier state OCTEON II and earlier*/ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 486 | v3mulu k0, $0, $0 |
| 487 | v3mulu k1, $0, $0 |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 488 | sd k0, PT_MTP(sp) /* PT_MTP has P0 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 489 | v3mulu k0, $0, $0 |
| 490 | sd k1, PT_MTP+8(sp) /* PT_MTP+8 has P1 */ |
| 491 | ori k1, $0, 1 |
| 492 | v3mulu k1, k1, $0 |
| 493 | sd k0, PT_MTP+16(sp) /* PT_MTP+16 has P2 */ |
| 494 | v3mulu k0, $0, $0 |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 495 | sd k1, PT_MPL(sp) /* PT_MPL has MPL0 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 496 | v3mulu k1, $0, $0 |
| 497 | sd k0, PT_MPL+8(sp) /* PT_MPL+8 has MPL1 */ |
| 498 | jr ra |
| 499 | sd k1, PT_MPL+16(sp) /* PT_MPL+16 has MPL2 */ |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 500 | octeon_mult_save2_end: |
| 501 | EXPORT(octeon_mult_save2_end) |
| 502 | END(octeon_mult_save2) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 503 | |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 504 | LEAF(octeon_mult_save3) |
| 505 | /* Save the multiplier state OCTEON III */ |
| 506 | v3mulu $10, $0, $0 /* read P0 */ |
| 507 | v3mulu $11, $0, $0 /* read P1 */ |
| 508 | v3mulu $12, $0, $0 /* read P2 */ |
| 509 | sd $10, PT_MTP+(0*8)(sp) /* store P0 */ |
| 510 | v3mulu $10, $0, $0 /* read P3 */ |
| 511 | sd $11, PT_MTP+(1*8)(sp) /* store P1 */ |
| 512 | v3mulu $11, $0, $0 /* read P4 */ |
| 513 | sd $12, PT_MTP+(2*8)(sp) /* store P2 */ |
| 514 | ori $13, $0, 1 |
| 515 | v3mulu $12, $0, $0 /* read P5 */ |
| 516 | sd $10, PT_MTP+(3*8)(sp) /* store P3 */ |
| 517 | v3mulu $13, $13, $0 /* P4-P0 = MPL5-MPL1, $13 = MPL0 */ |
| 518 | sd $11, PT_MTP+(4*8)(sp) /* store P4 */ |
| 519 | v3mulu $10, $0, $0 /* read MPL1 */ |
| 520 | sd $12, PT_MTP+(5*8)(sp) /* store P5 */ |
| 521 | v3mulu $11, $0, $0 /* read MPL2 */ |
| 522 | sd $13, PT_MPL+(0*8)(sp) /* store MPL0 */ |
| 523 | v3mulu $12, $0, $0 /* read MPL3 */ |
| 524 | sd $10, PT_MPL+(1*8)(sp) /* store MPL1 */ |
| 525 | v3mulu $10, $0, $0 /* read MPL4 */ |
| 526 | sd $11, PT_MPL+(2*8)(sp) /* store MPL2 */ |
| 527 | v3mulu $11, $0, $0 /* read MPL5 */ |
| 528 | sd $12, PT_MPL+(3*8)(sp) /* store MPL3 */ |
| 529 | sd $10, PT_MPL+(4*8)(sp) /* store MPL4 */ |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 530 | jr ra |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 531 | sd $11, PT_MPL+(5*8)(sp) /* store MPL5 */ |
| 532 | octeon_mult_save3_end: |
| 533 | EXPORT(octeon_mult_save3_end) |
| 534 | END(octeon_mult_save3) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 535 | .set pop |
| 536 | |
| 537 | /* |
| 538 | * void octeon_mult_restore() |
| 539 | * sp is assumed to point to a struct pt_regs |
| 540 | * |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 541 | * NOTE: This is called in RESTORE_TEMP in stackframe.h. |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 542 | */ |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 543 | .p2align 7 |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 544 | .set push |
| 545 | .set noreorder |
| 546 | LEAF(octeon_mult_restore) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 547 | jr ra |
| 548 | nop |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 549 | .space 30 * 4, 0 |
| 550 | octeon_mult_restore_end: |
| 551 | EXPORT(octeon_mult_restore_end) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 552 | END(octeon_mult_restore) |
David Daney | ac655fb | 2015-01-15 16:11:05 +0300 | [diff] [blame] | 553 | |
| 554 | LEAF(octeon_mult_restore2) |
| 555 | ld v0, PT_MPL(sp) /* MPL0 */ |
| 556 | ld v1, PT_MPL+8(sp) /* MPL1 */ |
| 557 | ld k0, PT_MPL+16(sp) /* MPL2 */ |
| 558 | /* Restore the multiplier state */ |
| 559 | ld k1, PT_MTP+16(sp) /* P2 */ |
| 560 | mtm0 v0 /* MPL0 */ |
| 561 | ld v0, PT_MTP+8(sp) /* P1 */ |
| 562 | mtm1 v1 /* MPL1 */ |
| 563 | ld v1, PT_MTP(sp) /* P0 */ |
| 564 | mtm2 k0 /* MPL2 */ |
| 565 | mtp2 k1 /* P2 */ |
| 566 | mtp1 v0 /* P1 */ |
| 567 | jr ra |
| 568 | mtp0 v1 /* P0 */ |
| 569 | octeon_mult_restore2_end: |
| 570 | EXPORT(octeon_mult_restore2_end) |
| 571 | END(octeon_mult_restore2) |
| 572 | |
| 573 | LEAF(octeon_mult_restore3) |
| 574 | ld $12, PT_MPL+(0*8)(sp) /* read MPL0 */ |
| 575 | ld $13, PT_MPL+(3*8)(sp) /* read MPL3 */ |
| 576 | ld $10, PT_MPL+(1*8)(sp) /* read MPL1 */ |
| 577 | ld $11, PT_MPL+(4*8)(sp) /* read MPL4 */ |
| 578 | .word 0x718d0008 |
| 579 | /* mtm0 $12, $13 restore MPL0 and MPL3 */ |
| 580 | ld $12, PT_MPL+(2*8)(sp) /* read MPL2 */ |
| 581 | .word 0x714b000c |
| 582 | /* mtm1 $10, $11 restore MPL1 and MPL4 */ |
| 583 | ld $13, PT_MPL+(5*8)(sp) /* read MPL5 */ |
| 584 | ld $10, PT_MTP+(0*8)(sp) /* read P0 */ |
| 585 | ld $11, PT_MTP+(3*8)(sp) /* read P3 */ |
| 586 | .word 0x718d000d |
| 587 | /* mtm2 $12, $13 restore MPL2 and MPL5 */ |
| 588 | ld $12, PT_MTP+(1*8)(sp) /* read P1 */ |
| 589 | .word 0x714b0009 |
| 590 | /* mtp0 $10, $11 restore P0 and P3 */ |
| 591 | ld $13, PT_MTP+(4*8)(sp) /* read P4 */ |
| 592 | ld $10, PT_MTP+(2*8)(sp) /* read P2 */ |
| 593 | ld $11, PT_MTP+(5*8)(sp) /* read P5 */ |
| 594 | .word 0x718d000a |
| 595 | /* mtp1 $12, $13 restore P1 and P4 */ |
| 596 | jr ra |
| 597 | .word 0x714b000b |
| 598 | /* mtp2 $10, $11 restore P2 and P5 */ |
| 599 | |
| 600 | octeon_mult_restore3_end: |
| 601 | EXPORT(octeon_mult_restore3_end) |
| 602 | END(octeon_mult_restore3) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 603 | .set pop |