blob: 60ba50b956f22c9478318d4fa3a54e20de86b179 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080029#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "intel_drv.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
40
Chris Wilsonea5b2132010-08-04 13:50:23 +010041static const struct intel_dvo_device intel_dvo_devices[] = {
Jesse Barnes79e53942008-11-07 14:24:08 -080042 {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
48 },
49 {
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
55 },
56 {
57 .type = INTEL_DVO_CHIP_LVDS,
58 .name = "ivch",
59 .dvo_reg = DVOA,
60 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61 .dev_ops = &ivch_ops,
62 },
63 {
64 .type = INTEL_DVO_CHIP_TMDS,
65 .name = "tfp410",
66 .dvo_reg = DVOC,
67 .slave_addr = TFP410_ADDR,
68 .dev_ops = &tfp410_ops,
69 },
70 {
71 .type = INTEL_DVO_CHIP_LVDS,
72 .name = "ch7017",
73 .dvo_reg = DVOC,
74 .slave_addr = 0x75,
Chris Wilsona6b17b42010-09-21 12:34:25 +010075 .gpio = GMBUS_PORT_DPB,
Jesse Barnes79e53942008-11-07 14:24:08 -080076 .dev_ops = &ch7017_ops,
77 }
78};
79
Chris Wilsonea5b2132010-08-04 13:50:23 +010080struct intel_dvo {
81 struct intel_encoder base;
82
83 struct intel_dvo_device dev;
84
85 struct drm_display_mode *panel_fixed_mode;
86 bool panel_wants_dither;
87};
88
89static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
90{
Chris Wilson4ef69c72010-09-09 15:14:28 +010091 return container_of(encoder, struct intel_dvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +010092}
93
Chris Wilsondf0e9242010-09-09 16:20:55 +010094static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
95{
96 return container_of(intel_attached_encoder(connector),
97 struct intel_dvo, base);
98}
99
Jesse Barnes79e53942008-11-07 14:24:08 -0800100static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
101{
102 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100103 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
104 u32 dvo_reg = intel_dvo->dev.dvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800105 u32 temp = I915_READ(dvo_reg);
106
107 if (mode == DRM_MODE_DPMS_ON) {
108 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
109 I915_READ(dvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100110 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800111 } else {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100112 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800113 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
114 I915_READ(dvo_reg);
115 }
116}
117
Jesse Barnes79e53942008-11-07 14:24:08 -0800118static int intel_dvo_mode_valid(struct drm_connector *connector,
119 struct drm_display_mode *mode)
120{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100121 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800122
123 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
124 return MODE_NO_DBLESCAN;
125
126 /* XXX: Validate clock range */
127
Chris Wilsonea5b2132010-08-04 13:50:23 +0100128 if (intel_dvo->panel_fixed_mode) {
129 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
Jesse Barnes79e53942008-11-07 14:24:08 -0800130 return MODE_PANEL;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100131 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
Jesse Barnes79e53942008-11-07 14:24:08 -0800132 return MODE_PANEL;
133 }
134
Chris Wilsonea5b2132010-08-04 13:50:23 +0100135 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800136}
137
138static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
139 struct drm_display_mode *mode,
140 struct drm_display_mode *adjusted_mode)
141{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100142 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800143
144 /* If we have timings from the BIOS for the panel, put them in
145 * to the adjusted mode. The CRTC will be set up for this mode,
146 * with the panel scaling set up to source from the H/VDisplay
147 * of the original mode.
148 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100149 if (intel_dvo->panel_fixed_mode != NULL) {
150#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
Jesse Barnes79e53942008-11-07 14:24:08 -0800151 C(hdisplay);
152 C(hsync_start);
153 C(hsync_end);
154 C(htotal);
155 C(vdisplay);
156 C(vsync_start);
157 C(vsync_end);
158 C(vtotal);
159 C(clock);
Jesse Barnes79e53942008-11-07 14:24:08 -0800160#undef C
161 }
162
Chris Wilsonea5b2132010-08-04 13:50:23 +0100163 if (intel_dvo->dev.dev_ops->mode_fixup)
164 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800165
166 return true;
167}
168
169static void intel_dvo_mode_set(struct drm_encoder *encoder,
170 struct drm_display_mode *mode,
171 struct drm_display_mode *adjusted_mode)
172{
173 struct drm_device *dev = encoder->dev;
174 struct drm_i915_private *dev_priv = dev->dev_private;
175 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100176 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800177 int pipe = intel_crtc->pipe;
178 u32 dvo_val;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100179 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800180 int dpll_reg = DPLL(pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -0800181
182 switch (dvo_reg) {
183 case DVOA:
184 default:
185 dvo_srcdim_reg = DVOA_SRCDIM;
186 break;
187 case DVOB:
188 dvo_srcdim_reg = DVOB_SRCDIM;
189 break;
190 case DVOC:
191 dvo_srcdim_reg = DVOC_SRCDIM;
192 break;
193 }
194
Chris Wilsonea5b2132010-08-04 13:50:23 +0100195 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800196
197 /* Save the data order, since I don't know what it should be set to. */
198 dvo_val = I915_READ(dvo_reg) &
199 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
200 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
201 DVO_BLANK_ACTIVE_HIGH;
202
203 if (pipe == 1)
204 dvo_val |= DVO_PIPE_B_SELECT;
205 dvo_val |= DVO_PIPE_STALL;
206 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
207 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
208 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
209 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
210
211 I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
212
213 /*I915_WRITE(DVOB_SRCDIM,
214 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
215 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
216 I915_WRITE(dvo_srcdim_reg,
217 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
218 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
219 /*I915_WRITE(DVOB, dvo_val);*/
220 I915_WRITE(dvo_reg, dvo_val);
221}
222
223/**
224 * Detect the output connection on our DVO device.
225 *
226 * Unimplemented.
227 */
Chris Wilson7b334fc2010-09-09 23:51:02 +0100228static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100229intel_dvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800230{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100231 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100232 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800233}
234
235static int intel_dvo_get_modes(struct drm_connector *connector)
236{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100237 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilsonf899fc62010-07-20 15:44:45 -0700238 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800239
240 /* We should probably have an i2c driver get_modes function for those
241 * devices which will have a fixed set of modes determined by the chip
242 * (TV-out, for example), but for now with just TMDS and LVDS,
243 * that's not the case.
244 */
Chris Wilsonf899fc62010-07-20 15:44:45 -0700245 intel_ddc_get_modes(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800246 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
Jesse Barnes79e53942008-11-07 14:24:08 -0800247 if (!list_empty(&connector->probed_modes))
248 return 1;
249
Chris Wilsonea5b2132010-08-04 13:50:23 +0100250 if (intel_dvo->panel_fixed_mode != NULL) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800251 struct drm_display_mode *mode;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100252 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800253 if (mode) {
254 drm_mode_probed_add(connector, mode);
255 return 1;
256 }
257 }
Chris Wilsonea5b2132010-08-04 13:50:23 +0100258
Jesse Barnes79e53942008-11-07 14:24:08 -0800259 return 0;
260}
261
Chris Wilsonea5b2132010-08-04 13:50:23 +0100262static void intel_dvo_destroy(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800263{
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 drm_sysfs_connector_remove(connector);
265 drm_connector_cleanup(connector);
Zhenyu Wang599be162010-03-29 16:17:31 +0800266 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800267}
268
Jesse Barnes79e53942008-11-07 14:24:08 -0800269static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
270 .dpms = intel_dvo_dpms,
271 .mode_fixup = intel_dvo_mode_fixup,
272 .prepare = intel_encoder_prepare,
273 .mode_set = intel_dvo_mode_set,
274 .commit = intel_encoder_commit,
275};
276
277static const struct drm_connector_funcs intel_dvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -0700278 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 .detect = intel_dvo_detect,
280 .destroy = intel_dvo_destroy,
281 .fill_modes = drm_helper_probe_single_connector_modes,
282};
283
284static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
285 .mode_valid = intel_dvo_mode_valid,
286 .get_modes = intel_dvo_get_modes,
Chris Wilsondf0e9242010-09-09 16:20:55 +0100287 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -0800288};
289
Hannes Ederb358d0a2008-12-18 21:18:47 +0100290static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800291{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100292 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
Zhenyu Wang599be162010-03-29 16:17:31 +0800293
Chris Wilsonea5b2132010-08-04 13:50:23 +0100294 if (intel_dvo->dev.dev_ops->destroy)
295 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
296
297 kfree(intel_dvo->panel_fixed_mode);
298
299 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800300}
301
302static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
303 .destroy = intel_dvo_enc_destroy,
304};
305
Jesse Barnes79e53942008-11-07 14:24:08 -0800306/**
307 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
308 *
309 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
310 * chip being on DVOB/C and having multiple pipes.
311 */
312static struct drm_display_mode *
Chris Wilsonea5b2132010-08-04 13:50:23 +0100313intel_dvo_get_current_mode(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800314{
315 struct drm_device *dev = connector->dev;
316 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsondf0e9242010-09-09 16:20:55 +0100317 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100318 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -0800319 struct drm_display_mode *mode = NULL;
320
321 /* If the DVO port is active, that'll be the LVDS, so we can pull out
322 * its timings to get how the BIOS set up the panel.
323 */
324 if (dvo_val & DVO_ENABLE) {
325 struct drm_crtc *crtc;
326 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
327
Chris Wilsonf875c152010-09-09 15:44:14 +0100328 crtc = intel_get_crtc_for_pipe(dev, pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -0800329 if (crtc) {
330 mode = intel_crtc_mode_get(dev, crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -0800331 if (mode) {
332 mode->type |= DRM_MODE_TYPE_PREFERRED;
333 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
334 mode->flags |= DRM_MODE_FLAG_PHSYNC;
335 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
336 mode->flags |= DRM_MODE_FLAG_PVSYNC;
337 }
338 }
339 }
Chris Wilsonea5b2132010-08-04 13:50:23 +0100340
Jesse Barnes79e53942008-11-07 14:24:08 -0800341 return mode;
342}
343
344void intel_dvo_init(struct drm_device *dev)
345{
Chris Wilsonf899fc62010-07-20 15:44:45 -0700346 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -0700347 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100348 struct intel_dvo *intel_dvo;
Zhenyu Wang599be162010-03-29 16:17:31 +0800349 struct intel_connector *intel_connector;
Jesse Barnes79e53942008-11-07 14:24:08 -0800350 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800351 int encoder_type = DRM_MODE_ENCODER_NONE;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100352
353 intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
354 if (!intel_dvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800355 return;
356
Zhenyu Wang599be162010-03-29 16:17:31 +0800357 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
358 if (!intel_connector) {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100359 kfree(intel_dvo);
Zhenyu Wang599be162010-03-29 16:17:31 +0800360 return;
361 }
362
Chris Wilsonea5b2132010-08-04 13:50:23 +0100363 intel_encoder = &intel_dvo->base;
Chris Wilson373a3cf2010-09-15 12:03:59 +0100364 drm_encoder_init(dev, &intel_encoder->base,
365 &intel_dvo_enc_funcs, encoder_type);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100366
Jesse Barnes79e53942008-11-07 14:24:08 -0800367 /* Now, try to find a controller */
368 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
Zhenyu Wang599be162010-03-29 16:17:31 +0800369 struct drm_connector *connector = &intel_connector->base;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100370 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
Chris Wilsonf899fc62010-07-20 15:44:45 -0700371 struct i2c_adapter *i2c;
Jesse Barnes79e53942008-11-07 14:24:08 -0800372 int gpio;
373
Jesse Barnes79e53942008-11-07 14:24:08 -0800374 /* Allow the I2C driver info to specify the GPIO to be used in
375 * special cases, but otherwise default to what's defined
376 * in the spec.
377 */
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800378 if (intel_gmbus_is_port_valid(dvo->gpio))
Jesse Barnes79e53942008-11-07 14:24:08 -0800379 gpio = dvo->gpio;
380 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
Chris Wilsonf573c662010-09-28 23:34:44 +0100381 gpio = GMBUS_PORT_SSC;
Jesse Barnes79e53942008-11-07 14:24:08 -0800382 else
Chris Wilsona6b17b42010-09-21 12:34:25 +0100383 gpio = GMBUS_PORT_DPB;
Jesse Barnes79e53942008-11-07 14:24:08 -0800384
385 /* Set up the I2C bus necessary for the chip we're probing.
386 * It appears that everything is on GPIOE except for panels
387 * on i830 laptops, which are on GPIOB (DVOA).
388 */
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800389 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
Jesse Barnes79e53942008-11-07 14:24:08 -0800390
Chris Wilsonea5b2132010-08-04 13:50:23 +0100391 intel_dvo->dev = *dvo;
Chris Wilsonf573c662010-09-28 23:34:44 +0100392 if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
Jesse Barnes79e53942008-11-07 14:24:08 -0800393 continue;
394
Eric Anholt21d40d32010-03-25 11:11:14 -0700395 intel_encoder->type = INTEL_OUTPUT_DVO;
396 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800397 switch (dvo->type) {
398 case INTEL_DVO_CHIP_TMDS:
Eric Anholt21d40d32010-03-25 11:11:14 -0700399 intel_encoder->clone_mask =
Ma Lingf8aed702009-08-24 13:50:24 +0800400 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
401 (1 << INTEL_ANALOG_CLONE_BIT);
Jesse Barnes79e53942008-11-07 14:24:08 -0800402 drm_connector_init(dev, connector,
403 &intel_dvo_connector_funcs,
404 DRM_MODE_CONNECTOR_DVII);
405 encoder_type = DRM_MODE_ENCODER_TMDS;
406 break;
407 case INTEL_DVO_CHIP_LVDS:
Eric Anholt21d40d32010-03-25 11:11:14 -0700408 intel_encoder->clone_mask =
Ma Lingf8aed702009-08-24 13:50:24 +0800409 (1 << INTEL_DVO_LVDS_CLONE_BIT);
Jesse Barnes79e53942008-11-07 14:24:08 -0800410 drm_connector_init(dev, connector,
411 &intel_dvo_connector_funcs,
412 DRM_MODE_CONNECTOR_LVDS);
413 encoder_type = DRM_MODE_ENCODER_LVDS;
414 break;
415 }
416
417 drm_connector_helper_add(connector,
418 &intel_dvo_connector_helper_funcs);
419 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
420 connector->interlace_allowed = false;
421 connector->doublescan_allowed = false;
422
Chris Wilson4ef69c72010-09-09 15:14:28 +0100423 drm_encoder_helper_add(&intel_encoder->base,
Jesse Barnes79e53942008-11-07 14:24:08 -0800424 &intel_dvo_helper_funcs);
425
Chris Wilsondf0e9242010-09-09 16:20:55 +0100426 intel_connector_attach_encoder(intel_connector, intel_encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800427 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
428 /* For our LVDS chipsets, we should hopefully be able
429 * to dig the fixed panel mode out of the BIOS data.
430 * However, it's in a different format from the BIOS
431 * data on chipsets with integrated LVDS (stored in AIM
432 * headers, likely), so for now, just get the current
433 * mode being output through DVO.
434 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100435 intel_dvo->panel_fixed_mode =
Jesse Barnes79e53942008-11-07 14:24:08 -0800436 intel_dvo_get_current_mode(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100437 intel_dvo->panel_wants_dither = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800438 }
439
440 drm_sysfs_connector_add(connector);
441 return;
442 }
443
Chris Wilson373a3cf2010-09-15 12:03:59 +0100444 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100445 kfree(intel_dvo);
Zhenyu Wang599be162010-03-29 16:17:31 +0800446 kfree(intel_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800447}