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Bryan Wu1394f032007-05-06 14:50:22 -07001#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
Aubrey Lie3defff2007-05-21 18:09:11 +080028config ZONE_DMA
29 bool
30 default y
31
Bryan Wu1394f032007-05-06 14:50:22 -070032config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
53 bool
54 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
60config GENERIC_CALIBRATE_DELAY
61 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
74 default y
75
76source "init/Kconfig"
77source "kernel/Kconfig.preempt"
78
79menu "Blackfin Processor Options"
80
81comment "Processor and Board Settings"
82
83choice
84 prompt "CPU"
85 default BF533
86
87config BF531
88 bool "BF531"
89 help
90 BF531 Processor Support.
91
92config BF532
93 bool "BF532"
94 help
95 BF532 Processor Support.
96
97config BF533
98 bool "BF533"
99 help
100 BF533 Processor Support.
101
102config BF534
103 bool "BF534"
104 help
105 BF534 Processor Support.
106
107config BF536
108 bool "BF536"
109 help
110 BF536 Processor Support.
111
112config BF537
113 bool "BF537"
114 help
115 BF537 Processor Support.
116
117config BF561
118 bool "BF561"
119 help
120 Not Supported Yet - Work in progress - BF561 Processor Support.
121
122endchoice
123
124choice
125 prompt "Silicon Rev"
126 default BF_REV_0_2 if BF537
127 default BF_REV_0_3 if BF533
128
129config BF_REV_0_2
130 bool "0.2"
131 depends on (BF537 || BF536 || BF534)
132
133config BF_REV_0_3
134 bool "0.3"
135 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
136
137config BF_REV_0_4
138 bool "0.4"
139 depends on (BF561 || BF533 || BF532 || BF531)
140
141config BF_REV_0_5
142 bool "0.5"
143 depends on (BF561 || BF533 || BF532 || BF531)
144
145endchoice
146
147config BFIN_DUAL_CORE
148 bool
149 depends on (BF561)
150 default y
151
152config BFIN_SINGLE_CORE
153 bool
154 depends on !BFIN_DUAL_CORE
155 default y
156
157choice
158 prompt "System type"
159 default BFIN533_STAMP
160 help
161 Do NOT change the board here. Please use the top level
162 configuration to ensure that all the other settings are
163 correct.
164
165config BFIN533_EZKIT
166 bool "BF533-EZKIT"
167 depends on (BF533 || BF532 || BF531)
168 help
169 BF533-EZKIT-LITE board Support.
170
171config BFIN533_STAMP
172 bool "BF533-STAMP"
173 depends on (BF533 || BF532 || BF531)
174 help
175 BF533-STAMP board Support.
176
177config BFIN537_STAMP
178 bool "BF537-STAMP"
179 depends on (BF537 || BF536 || BF534)
180 help
181 BF537-STAMP board Support.
182
183config BFIN533_BLUETECHNIX_CM
184 bool "Bluetechnix CM-BF533"
185 depends on (BF533)
186 help
187 CM-BF533 support for EVAL- and DEV-Board.
188
189config BFIN537_BLUETECHNIX_CM
190 bool "Bluetechnix CM-BF537"
191 depends on (BF537)
192 help
193 CM-BF537 support for EVAL- and DEV-Board.
194
195config BFIN561_BLUETECHNIX_CM
Mike Frysinger0a290592007-05-21 18:09:21 +0800196 bool "Bluetechnix CM-BF561"
Bryan Wu1394f032007-05-06 14:50:22 -0700197 depends on (BF561)
198 help
199 CM-BF561 support for EVAL- and DEV-Board.
200
201config BFIN561_EZKIT
202 bool "BF561-EZKIT"
203 depends on (BF561)
204 help
205 BF561-EZKIT-LITE board Support.
206
Mike Frysinger0a290592007-05-21 18:09:21 +0800207config BFIN561_TEPLA
208 bool "BF561-TEPLA"
209 depends on (BF561)
210 help
211 BF561-TEPLA board Support.
212
Bryan Wu1394f032007-05-06 14:50:22 -0700213config PNAV10
214 bool "PNAV 1.0 board"
215 depends on (BF537)
216 help
217 PNAV 1.0 board Support.
218
219config GENERIC_BOARD
220 bool "Custom"
221 depends on (BF537 || BF536 \
222 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
223 help
224 GENERIC or Custom board Support.
225
226endchoice
227
228config MEM_GENERIC_BOARD
229 bool
230 depends on GENERIC_BOARD
231 default y
232
233config MEM_MT48LC64M4A2FB_7E
234 bool
235 depends on (BFIN533_STAMP)
236 default y
237
238config MEM_MT48LC16M16A2TG_75
239 bool
240 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
241 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
242 default y
243
244config MEM_MT48LC32M8A2_75
245 bool
246 depends on (BFIN537_STAMP || PNAV10)
247 default y
248
249config MEM_MT48LC8M32B2B5_7
250 bool
251 depends on (BFIN561_BLUETECHNIX_CM)
252 default y
253
254config BFIN_SHARED_FLASH_ENET
255 bool
256 depends on (BFIN533_STAMP)
257 default y
258
259source "arch/blackfin/mach-bf533/Kconfig"
260source "arch/blackfin/mach-bf561/Kconfig"
261source "arch/blackfin/mach-bf537/Kconfig"
262
263menu "Board customizations"
264
265config CMDLINE_BOOL
266 bool "Default bootloader kernel arguments"
267
268config CMDLINE
269 string "Initial kernel command string"
270 depends on CMDLINE_BOOL
271 default "console=ttyBF0,57600"
272 help
273 If you don't have a boot loader capable of passing a command line string
274 to the kernel, you may specify one here. As a minimum, you should specify
275 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
276
277comment "Board Setup"
278
279config CLKIN_HZ
280 int "Crystal Frequency in Hz"
281 default "11059200" if BFIN533_STAMP
282 default "27000000" if BFIN533_EZKIT
283 default "25000000" if BFIN537_STAMP
284 default "30000000" if BFIN561_EZKIT
285 default "24576000" if PNAV10
286 help
287 The frequency of CLKIN crystal oscillator on the board in Hz.
288
289config MEM_SIZE
290 int "SDRAM Memory Size in MBytes"
291 default 32 if BFIN533_EZKIT
292 default 64 if BFIN537_STAMP
293 default 64 if BFIN561_EZKIT
294 default 128 if BFIN533_STAMP
295 default 64 if PNAV10
296
297config MEM_ADD_WIDTH
298 int "SDRAM Memory Address Width"
299 default 9 if BFIN533_EZKIT
300 default 9 if BFIN561_EZKIT
301 default 10 if BFIN537_STAMP
302 default 11 if BFIN533_STAMP
303 default 10 if PNAV10
304
305config ENET_FLASH_PIN
306 int "PF port/pin used for flash and ethernet sharing"
307 depends on (BFIN533_STAMP)
308 default 0
309 help
310 PF port/pin used for flash and ethernet sharing to allow other PF
311 pins to be used on other platforms without having to touch common
312 code.
313 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
314
315config BOOT_LOAD
316 hex "Kernel load address for booting"
317 default "0x1000"
318 help
319 This option allows you to set the load address of the kernel.
320 This can be useful if you are on a board which has a small amount
321 of memory or you wish to reserve some memory at the beginning of
322 the address space.
323
324 Note that you generally want to keep this value at or above 4k
325 (0x1000) as this will allow the kernel to capture NULL pointer
326 references.
327
328comment "LED Status Indicators"
329 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
330
331config BFIN_ALIVE_LED
332 bool "Enable Board Alive"
333 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
334 default n
335 help
336 Blink the LEDs you select when the kernel is running. Helps detect
337 a hung kernel.
338
339config BFIN_ALIVE_LED_NUM
340 int "LED"
341 depends on BFIN_ALIVE_LED
342 range 1 3 if BFIN533_STAMP
343 default "3" if BFIN533_STAMP
344 help
345 Select the LED (marked on the board) for you to blink.
346
347config BFIN_IDLE_LED
348 bool "Enable System Load/Idle LED"
349 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
350 default n
351 help
352 Blinks the LED you select when to determine kernel load.
353
354config BFIN_IDLE_LED_NUM
355 int "LED"
356 depends on BFIN_IDLE_LED
357 range 1 3 if BFIN533_STAMP
358 default "2" if BFIN533_STAMP
359 help
360 Select the LED (marked on the board) for you to blink.
361
362#
363# Sorry - but you need to put the hex address here -
364#
365
366# Flag Data register
367config BFIN_ALIVE_LED_PORT
368 hex
369 default 0xFFC00700 if (BFIN533_STAMP)
370
371# Peripheral Flag Direction Register
372config BFIN_ALIVE_LED_DPORT
373 hex
374 default 0xFFC00730 if (BFIN533_STAMP)
375
376config BFIN_ALIVE_LED_PIN
377 hex
378 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
379 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
380 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
381
382config BFIN_IDLE_LED_PORT
383 hex
384 default 0xFFC00700 if (BFIN533_STAMP)
385
386# Peripheral Flag Direction Register
387config BFIN_IDLE_LED_DPORT
388 hex
389 default 0xFFC00730 if (BFIN533_STAMP)
390
391config BFIN_IDLE_LED_PIN
392 hex
393 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
394 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
395 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
396
397comment "Console UART Setup"
398
399choice
400 prompt "Baud Rate"
401 default BAUD_57600
402config BAUD_9600
403 bool "9600"
404config BAUD_19200
405 bool "19200"
406config BAUD_38400
407 bool "38400"
408config BAUD_57600
409 bool "57600"
410config BAUD_115200
411 bool "115200"
412endchoice
413
414choice
415 prompt "Parity"
416 default BAUD_NO_PARITY
417config BAUD_NO_PARITY
418 bool "No Parity"
419config BAUD_PARITY
420 bool "Parity"
421endchoice
422
423choice
424 prompt "Stop Bits"
425 default BAUD_1_STOPBIT
426config BAUD_1_STOPBIT
427 bool "1"
428config BAUD_2_STOPBIT
429 bool "2"
430endchoice
431
432endmenu
433
434
435menu "Blackfin Kernel Optimizations"
436
437comment "Timer Tick"
438
439source kernel/Kconfig.hz
440
441comment "Memory Optimizations"
442
443config I_ENTRY_L1
444 bool "Locate interrupt entry code in L1 Memory"
445 default y
446 help
447 If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
448 into L1 instruction memory.(less latency)
449
450config EXCPT_IRQ_SYSC_L1
451 bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
452 default y
453 help
454 If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
455 into L1 instruction memory.(less latency)
456
457config DO_IRQ_L1
458 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
459 default y
460 help
461 If enabled frequently called do_irq dispatcher function is linked
462 into L1 instruction memory.(less latency)
463
464config CORE_TIMER_IRQ_L1
465 bool "Locate frequently called timer_interrupt() function in L1 Memory"
466 default y
467 help
468 If enabled frequently called timer_interrupt() function is linked
469 into L1 instruction memory.(less latency)
470
471config IDLE_L1
472 bool "Locate frequently idle function in L1 Memory"
473 default y
474 help
475 If enabled frequently called idle function is linked
476 into L1 instruction memory.(less latency)
477
478config SCHEDULE_L1
479 bool "Locate kernel schedule function in L1 Memory"
480 default y
481 help
482 If enabled frequently called kernel schedule is linked
483 into L1 instruction memory.(less latency)
484
485config ARITHMETIC_OPS_L1
486 bool "Locate kernel owned arithmetic functions in L1 Memory"
487 default y
488 help
489 If enabled arithmetic functions are linked
490 into L1 instruction memory.(less latency)
491
492config ACCESS_OK_L1
493 bool "Locate access_ok function in L1 Memory"
494 default y
495 help
496 If enabled access_ok function is linked
497 into L1 instruction memory.(less latency)
498
499config MEMSET_L1
500 bool "Locate memset function in L1 Memory"
501 default y
502 help
503 If enabled memset function is linked
504 into L1 instruction memory.(less latency)
505
506config MEMCPY_L1
507 bool "Locate memcpy function in L1 Memory"
508 default y
509 help
510 If enabled memcpy function is linked
511 into L1 instruction memory.(less latency)
512
513config SYS_BFIN_SPINLOCK_L1
514 bool "Locate sys_bfin_spinlock function in L1 Memory"
515 default y
516 help
517 If enabled sys_bfin_spinlock function is linked
518 into L1 instruction memory.(less latency)
519
520config IP_CHECKSUM_L1
521 bool "Locate IP Checksum function in L1 Memory"
522 default n
523 help
524 If enabled IP Checksum function is linked
525 into L1 instruction memory.(less latency)
526
527config CACHELINE_ALIGNED_L1
528 bool "Locate cacheline_aligned data to L1 Data Memory"
529 default y
530 depends on !BF531
531 help
532 If enabled cacheline_anligned data is linked
533 into L1 data memory.(less latency)
534
535config SYSCALL_TAB_L1
536 bool "Locate Syscall Table L1 Data Memory"
537 default n
538 depends on !BF531
539 help
540 If enabled the Syscall LUT is linked
541 into L1 data memory.(less latency)
542
543config CPLB_SWITCH_TAB_L1
544 bool "Locate CPLB Switch Tables L1 Data Memory"
545 default n
546 depends on !BF531
547 help
548 If enabled the CPLB Switch Tables are linked
549 into L1 data memory.(less latency)
550
551endmenu
552
553
554choice
555 prompt "Kernel executes from"
556 help
557 Choose the memory type that the kernel will be running in.
558
559config RAMKERNEL
560 bool "RAM"
561 help
562 The kernel will be resident in RAM when running.
563
564config ROMKERNEL
565 bool "ROM"
566 help
567 The kernel will be resident in FLASH/ROM when running.
568
569endchoice
570
571source "mm/Kconfig"
572
Bryan Wu1394f032007-05-06 14:50:22 -0700573config BFIN_DMA_5XX
574 bool "Enable DMA Support"
575 depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561)
576 default y
577 help
578 DMA driver for BF5xx.
579
580choice
581 prompt "Uncached SDRAM region"
582 default DMA_UNCACHED_1M
583 depends BFIN_DMA_5XX
584config DMA_UNCACHED_2M
585 bool "Enable 2M DMA region"
586config DMA_UNCACHED_1M
587 bool "Enable 1M DMA region"
588config DMA_UNCACHED_NONE
589 bool "Disable DMA region"
590endchoice
591
592
593comment "Cache Support"
594config BLKFIN_CACHE
595 bool "Enable ICACHE"
596config BLKFIN_DCACHE
597 bool "Enable DCACHE"
598config BLKFIN_DCACHE_BANKA
599 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
600 depends on BLKFIN_DCACHE && !BF531
601 default n
602config BLKFIN_CACHE_LOCK
603 bool "Enable Cache Locking"
604
605choice
606 prompt "Policy"
607 depends on BLKFIN_DCACHE
608 default BLKFIN_WB
609config BLKFIN_WB
610 bool "Write back"
611 help
612 Write Back Policy:
613 Cached data will be written back to SDRAM only when needed.
614 This can give a nice increase in performance, but beware of
615 broken drivers that do not properly invalidate/flush their
616 cache.
617
618 Write Through Policy:
619 Cached data will always be written back to SDRAM when the
620 cache is updated. This is a completely safe setting, but
621 performance is worse than Write Back.
622
623 If you are unsure of the options and you want to be safe,
624 then go with Write Through.
625
626config BLKFIN_WT
627 bool "Write through"
628 help
629 Write Back Policy:
630 Cached data will be written back to SDRAM only when needed.
631 This can give a nice increase in performance, but beware of
632 broken drivers that do not properly invalidate/flush their
633 cache.
634
635 Write Through Policy:
636 Cached data will always be written back to SDRAM when the
637 cache is updated. This is a completely safe setting, but
638 performance is worse than Write Back.
639
640 If you are unsure of the options and you want to be safe,
641 then go with Write Through.
642
643endchoice
644
645config L1_MAX_PIECE
646 int "Set the max L1 SRAM pieces"
647 default 16
648 help
649 Set the max memory pieces for the L1 SRAM allocation algorithm.
650 Min value is 16. Max value is 1024.
651
652menu "Clock Settings"
653
654
655config BFIN_KERNEL_CLOCK
656 bool "Re-program Clocks while Kernel boots?"
657 default n
658 help
659 This option decides if kernel clocks are re-programed from the
660 bootloader settings. If the clocks are not set, the SDRAM settings
661 are also not changed, and the Bootloader does 100% of the hardware
662 configuration.
663
664config VCO_MULT
665 int "VCO Multiplier"
666 depends on BFIN_KERNEL_CLOCK
667 default "22" if BFIN533_EZKIT
668 default "45" if BFIN533_STAMP
669 default "20" if BFIN537_STAMP
670 default "22" if BFIN533_BLUETECHNIX_CM
671 default "20" if BFIN537_BLUETECHNIX_CM
672 default "20" if BFIN561_BLUETECHNIX_CM
673 default "20" if BFIN561_EZKIT
674
675config CCLK_DIV
676 int "Core Clock Divider"
677 depends on BFIN_KERNEL_CLOCK
678 default 1 if BFIN533_EZKIT
679 default 1 if BFIN533_STAMP
680 default 1 if BFIN537_STAMP
681 default 1 if BFIN533_BLUETECHNIX_CM
682 default 1 if BFIN537_BLUETECHNIX_CM
683 default 1 if BFIN561_BLUETECHNIX_CM
684 default 1 if BFIN561_EZKIT
685
686config SCLK_DIV
687 int "System Clock Divider"
688 depends on BFIN_KERNEL_CLOCK
689 default 5 if BFIN533_EZKIT
690 default 5 if BFIN533_STAMP
691 default 4 if BFIN537_STAMP
692 default 5 if BFIN533_BLUETECHNIX_CM
693 default 4 if BFIN537_BLUETECHNIX_CM
694 default 4 if BFIN561_BLUETECHNIX_CM
695 default 5 if BFIN561_EZKIT
696
697config CLKIN_HALF
698 bool "Half ClockIn"
699 depends on BFIN_KERNEL_CLOCK
700 default n
701
702config PLL_BYPASS
703 bool "Bypass PLL"
704 depends on BFIN_KERNEL_CLOCK
705 default n
706
707endmenu
708
709comment "Asynchonous Memory Configuration"
710
711menu "EBIU_AMBCTL Global Control"
712config C_AMCKEN
713 bool "Enable CLKOUT"
714 default y
715
716config C_CDPRIO
717 bool "DMA has priority over core for ext. accesses"
718 default n
719
720config C_B0PEN
721 depends on BF561
722 bool "Bank 0 16 bit packing enable"
723 default y
724
725config C_B1PEN
726 depends on BF561
727 bool "Bank 1 16 bit packing enable"
728 default y
729
730config C_B2PEN
731 depends on BF561
732 bool "Bank 2 16 bit packing enable"
733 default y
734
735config C_B3PEN
736 depends on BF561
737 bool "Bank 3 16 bit packing enable"
738 default n
739
740choice
741 prompt"Enable Asynchonous Memory Banks"
742 default C_AMBEN_ALL
743
744config C_AMBEN
745 bool "Disable All Banks"
746
747config C_AMBEN_B0
748 bool "Enable Bank 0"
749
750config C_AMBEN_B0_B1
751 bool "Enable Bank 0 & 1"
752
753config C_AMBEN_B0_B1_B2
754 bool "Enable Bank 0 & 1 & 2"
755
756config C_AMBEN_ALL
757 bool "Enable All Banks"
758endchoice
759endmenu
760
761menu "EBIU_AMBCTL Control"
762config BANK_0
763 hex "Bank 0"
764 default 0x7BB0
765
766config BANK_1
767 hex "Bank 1"
768 default 0x7BB0
769
770config BANK_2
771 hex "Bank 2"
772 default 0x7BB0
773
774config BANK_3
775 hex "Bank 3"
776 default 0x99B3
777endmenu
778
779endmenu
780
781#############################################################################
782menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
783
784config PCI
785 bool "PCI support"
786 help
787 Support for PCI bus.
788
789source "drivers/pci/Kconfig"
790
791config HOTPLUG
792 bool "Support for hot-pluggable device"
793 help
794 Say Y here if you want to plug devices into your computer while
795 the system is running, and be able to use them quickly. In many
796 cases, the devices can likewise be unplugged at any time too.
797
798 One well known example of this is PCMCIA- or PC-cards, credit-card
799 size devices such as network cards, modems or hard drives which are
800 plugged into slots found on all modern laptop computers. Another
801 example, used on modern desktops as well as laptops, is USB.
802
803 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
804 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
805 Then your kernel will automatically call out to a user mode "policy
806 agent" (/sbin/hotplug) to load modules and set up software needed
807 to use devices as you hotplug them.
808
809source "drivers/pcmcia/Kconfig"
810
811source "drivers/pci/hotplug/Kconfig"
812
813endmenu
814
815menu "Executable file formats"
816
817source "fs/Kconfig.binfmt"
818
819endmenu
820
821menu "Power management options"
822source "kernel/power/Kconfig"
823
824choice
825 prompt "Select PM Wakeup Event Source"
826 default PM_WAKEUP_GPIO_BY_SIC_IWR
827 depends on PM
828 help
829 If you have a GPIO already configured as input with the corresponding PORTx_MASK
830 bit set - "Specify Wakeup Event by SIC_IWR value"
831
832config PM_WAKEUP_GPIO_BY_SIC_IWR
833 bool "Specify Wakeup Event by SIC_IWR value"
834config PM_WAKEUP_BY_GPIO
835 bool "Cause Wakeup Event by GPIO"
836config PM_WAKEUP_GPIO_API
837 bool "Configure Wakeup Event by PM GPIO API"
838
839endchoice
840
841config PM_WAKEUP_SIC_IWR
842 hex "Wakeup Events (SIC_IWR)"
843 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
844 default 0x80000000 if (BF537 || BF536 || BF534)
845 default 0x100000 if (BF533 || BF532 || BF531)
846
847config PM_WAKEUP_GPIO_NUMBER
848 int "Wakeup GPIO number"
849 range 0 47
850 depends on PM_WAKEUP_BY_GPIO
851 default 2 if BFIN537_STAMP
852
853choice
854 prompt "GPIO Polarity"
855 depends on PM_WAKEUP_BY_GPIO
856 default PM_WAKEUP_GPIO_POLAR_H
857config PM_WAKEUP_GPIO_POLAR_H
858 bool "Active High"
859config PM_WAKEUP_GPIO_POLAR_L
860 bool "Active Low"
861config PM_WAKEUP_GPIO_POLAR_EDGE_F
862 bool "Falling EDGE"
863config PM_WAKEUP_GPIO_POLAR_EDGE_R
864 bool "Rising EDGE"
865config PM_WAKEUP_GPIO_POLAR_EDGE_B
866 bool "Both EDGE"
867endchoice
868
869endmenu
870
871if (BF537 || BF533)
872
873menu "CPU Frequency scaling"
874
875source "drivers/cpufreq/Kconfig"
876
877config CPU_FREQ
878 bool
879 default n
880 help
881 If you want to enable this option, you should select the
882 DPMC driver from Character Devices.
883endmenu
884
885endif
886
887source "net/Kconfig"
888
889source "drivers/Kconfig"
890
891source "fs/Kconfig"
892
893source "arch/blackfin/oprofile/Kconfig"
894
895menu "Kernel hacking"
896
897source "lib/Kconfig.debug"
898
899config DEBUG_HWERR
900 bool "Hardware error interrupt debugging"
901 depends on DEBUG_KERNEL
902 help
903 When enabled, the hardware error interrupt is never disabled, and
904 will happen immediately when an error condition occurs. This comes
905 at a slight cost in code size, but is necessary if you are getting
906 hardware error interrupts and need to know where they are coming
907 from.
908
909config DEBUG_ICACHE_CHECK
910 bool "Check Instruction cache coherancy"
911 depends on DEBUG_KERNEL
912 depends on DEBUG_HWERR
913 help
914 Say Y here if you are getting wierd unexplained errors. This will
915 ensure that icache is what SDRAM says it should be, by doing a
916 byte wise comparision between SDRAM and instruction cache. This
917 also relocates the irq_panic() function to L1 memory, (which is
918 un-cached).
919
920config DEBUG_KERNEL_START
921 bool "Debug Kernel Startup"
922 depends on DEBUG_KERNEL
923 help
924 Say Y here to put in an mini-execption handler before the kernel
925 replaces the bootloader exception handler. This will stop kernels
926 from dieing at startup with no visible error messages.
927
928config DEBUG_SERIAL_EARLY_INIT
929 bool "Initialize serial driver early"
930 default n
931 depends on SERIAL_BFIN
932 help
933 Say Y here if you want to get kernel output early when kernel
934 crashes before the normal console initialization. If this option
935 is enable, console output will always go to the ttyBF0, no matter
936 what kernel boot paramters you set.
937
938config DEBUG_HUNT_FOR_ZERO
939 bool "Catch NULL pointer reads/writes"
940 default y
941 help
942 Say Y here to catch reads/writes to anywhere in the memory range
943 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
944 catching common programming errors such as NULL pointer dereferences.
945
946 Misbehaving applications will be killed (generate a SEGV) while the
947 kernel will trigger a panic.
948
949 Enabling this option will take up an extra entry in CPLB table.
950 Otherwise, there is no extra overhead.
951
952config DEBUG_BFIN_NO_KERN_HWTRACE
953 bool "Trace user apps (turn off hwtrace in kernel)"
954 default n
955 help
956 Some pieces of the kernel contain a lot of flow changes which can
957 quickly fill up the hardware trace buffer. When debugging crashes,
958 the hardware trace may indicate that the problem lies in kernel
959 space when in reality an application is buggy.
960
961 Say Y here to disable hardware tracing in some known "jumpy" pieces
962 of code so that the trace buffer will extend further back.
963
964config DUAL_CORE_TEST_MODULE
965 tristate "Dual Core Test Module"
966 depends on (BF561)
967 default n
968 help
969 Say Y here to build-in dual core test module for dual core test.
970
971config CPLB_INFO
972 bool "Display the CPLB information"
973 help
974 Display the CPLB information.
975
976config ACCESS_CHECK
977 bool "Check the user pointer address"
978 default y
979 help
980 Usually the pointer transfer from user space is checked to see if its
981 address is in the kernel space.
982
983 Say N here to disable that check to improve the performance.
984
985endmenu
986
987source "security/Kconfig"
988
989source "crypto/Kconfig"
990
991source "lib/Kconfig"