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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _I386_PGTABLE_3LEVEL_H
2#define _I386_PGTABLE_3LEVEL_H
3
Linus Torvalds1da177e2005-04-16 15:20:36 -07004/*
5 * Intel Physical Address Extension (PAE) Mode - three-level page
6 * tables on PPro+ CPUs.
7 *
8 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
9 */
10
11#define pte_ERROR(e) \
12 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
13#define pmd_ERROR(e) \
14 printk("%s:%d: bad pmd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
15#define pgd_ERROR(e) \
16 printk("%s:%d: bad pgd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
17
18#define pud_none(pud) 0
19#define pud_bad(pud) 0
20#define pud_present(pud) 1
21
22/*
23 * Is the pte executable?
24 */
25static inline int pte_x(pte_t pte)
26{
27 return !(pte_val(pte) & _PAGE_NX);
28}
29
30/*
31 * All present user-pages with !NX bit are user-executable:
32 */
33static inline int pte_exec(pte_t pte)
34{
35 return pte_user(pte) && pte_x(pte);
36}
37/*
38 * All present pages with !NX bit are kernel-executable:
39 */
40static inline int pte_exec_kernel(pte_t pte)
41{
42 return pte_x(pte);
43}
44
45/* Rules for using set_pte: the pte being assigned *must* be
46 * either not present or in a state where the hardware will
47 * not attempt to update the pte. In places where this is
48 * not possible, use pte_get_and_clear to obtain the old pte
49 * value and then use set_pte to update it. -ben
50 */
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +020051static inline void native_set_pte(pte_t *ptep, pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -070052{
53 ptep->pte_high = pte.pte_high;
54 smp_wmb();
55 ptep->pte_low = pte.pte_low;
56}
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +020057static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
58 pte_t *ptep , pte_t pte)
59{
60 native_set_pte(ptep, pte);
61}
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
Zachary Amsdend6d861e2006-09-30 23:29:36 -070063/*
64 * Since this is only called on user PTEs, and the page fault handler
65 * must handle the already racy situation of simultaneous page faults,
66 * we are justified in merely clearing the PTE present bit, followed
67 * by a set. The ordering here is important.
68 */
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +020069static inline void native_set_pte_present(struct mm_struct *mm, unsigned long addr,
70 pte_t *ptep, pte_t pte)
Zachary Amsdend6d861e2006-09-30 23:29:36 -070071{
72 ptep->pte_low = 0;
73 smp_wmb();
74 ptep->pte_high = pte.pte_high;
75 smp_wmb();
76 ptep->pte_low = pte.pte_low;
77}
78
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +020079static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
80{
81 set_64bit((unsigned long long *)(ptep),native_pte_val(pte));
82}
83static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
84{
85 set_64bit((unsigned long long *)(pmdp),native_pmd_val(pmd));
86}
87static inline void native_set_pud(pud_t *pudp, pud_t pud)
88{
89 *pudp = pud;
90}
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
92/*
Zachary Amsden6e5882c2006-04-27 11:32:29 -070093 * For PTEs and PDEs, we must clear the P-bit first when clearing a page table
94 * entry, so clear the bottom half first and enforce ordering with a compiler
95 * barrier.
96 */
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +020097static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
Zachary Amsden6e5882c2006-04-27 11:32:29 -070098{
99 ptep->pte_low = 0;
100 smp_wmb();
101 ptep->pte_high = 0;
102}
103
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +0200104static inline void native_pmd_clear(pmd_t *pmd)
Zachary Amsden6e5882c2006-04-27 11:32:29 -0700105{
106 u32 *tmp = (u32 *)pmd;
107 *tmp = 0;
108 smp_wmb();
109 *(tmp + 1) = 0;
110}
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +0200111
112#ifndef CONFIG_PARAVIRT
113#define set_pte(ptep, pte) native_set_pte(ptep, pte)
114#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
115#define set_pte_present(mm, addr, ptep, pte) native_set_pte_present(mm, addr, ptep, pte)
116#define set_pte_atomic(ptep, pte) native_set_pte_atomic(ptep, pte)
117#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
118#define set_pud(pudp, pud) native_set_pud(pudp, pud)
119#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
120#define pmd_clear(pmd) native_pmd_clear(pmd)
Rusty Russellda181a82006-12-07 02:14:08 +0100121#endif
122
123/*
124 * Pentium-II erratum A13: in PAE mode we explicitly have to flush
125 * the TLB via cr3 if the top-level pgd is changed...
126 * We do not let the generic code free and clear pgd entries due to
127 * this erratum.
128 */
129static inline void pud_clear (pud_t * pud) { }
130
131#define pud_page(pud) \
132((struct page *) __va(pud_val(pud) & PAGE_MASK))
133
134#define pud_page_vaddr(pud) \
135((unsigned long) __va(pud_val(pud) & PAGE_MASK))
136
137
138/* Find an entry in the second-level page table.. */
139#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
140 pmd_index(address))
Zachary Amsden6e5882c2006-04-27 11:32:29 -0700141
Zachary Amsden142dd972007-05-02 19:27:19 +0200142#ifdef CONFIG_SMP
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +0200143static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144{
145 pte_t res;
146
147 /* xchg acts as a barrier before the setting of the high bits */
148 res.pte_low = xchg(&ptep->pte_low, 0);
149 res.pte_high = ptep->pte_high;
150 ptep->pte_high = 0;
151
152 return res;
153}
Zachary Amsden142dd972007-05-02 19:27:19 +0200154#else
155#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
156#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157
Rusty Russell60497422006-09-25 23:32:30 -0700158#define __HAVE_ARCH_PTE_SAME
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159static inline int pte_same(pte_t a, pte_t b)
160{
161 return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
162}
163
164#define pte_page(x) pfn_to_page(pte_pfn(x))
165
166static inline int pte_none(pte_t pte)
167{
168 return !pte.pte_low && !pte.pte_high;
169}
170
171static inline unsigned long pte_pfn(pte_t pte)
172{
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +0200173 return pte_val(pte) >> PAGE_SHIFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174}
175
176extern unsigned long long __supported_pte_mask;
177
178static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
179{
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +0200180 return __pte((((unsigned long long)page_nr << PAGE_SHIFT) |
181 pgprot_val(pgprot)) & __supported_pte_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182}
183
184static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
185{
Jeremy Fitzhardinge3dc494e2007-05-02 19:27:13 +0200186 return __pmd((((unsigned long long)page_nr << PAGE_SHIFT) |
187 pgprot_val(pgprot)) & __supported_pte_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188}
189
190/*
191 * Bits 0, 6 and 7 are taken in the low part of the pte,
192 * put the 32 bits of offset into the high part.
193 */
194#define pte_to_pgoff(pte) ((pte).pte_high)
195#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
196#define PTE_FILE_MAX_BITS 32
197
198/* Encode and de-code a swap entry */
199#define __swp_type(x) (((x).val) & 0x1f)
200#define __swp_offset(x) ((x).val >> 5)
201#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) << 5})
202#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
203#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
204
205#define __pmd_free_tlb(tlb, x) do { } while (0)
206
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207#endif /* _I386_PGTABLE_3LEVEL_H */