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Mark Brownf2644a22009-04-07 19:20:14 +01001/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
Mark Brown656baae2012-05-23 12:39:07 +01004 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
Mark Brownf2644a22009-04-07 19:20:14 +01006 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
Zidan Wang75aa8862015-01-07 15:31:44 +080018#include <linux/clk.h>
Mark Brownf2644a22009-04-07 19:20:14 +010019#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090020#include <linux/slab.h>
Mark Brownf2644a22009-04-07 19:20:14 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Brownf2644a22009-04-07 19:20:14 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
Mark Brownb6877a42010-03-03 11:43:38 +000027#include <sound/wm8960.h>
Mark Brownf2644a22009-04-07 19:20:14 +010028
29#include "wm8960.h"
30
Mark Brownf2644a22009-04-07 19:20:14 +010031/* R25 - Power 1 */
Mark Brown913d7b42010-03-03 13:47:03 +000032#define WM8960_VMID_MASK 0x180
Mark Brownf2644a22009-04-07 19:20:14 +010033#define WM8960_VREF 0x40
34
Mark Brown913d7b42010-03-03 13:47:03 +000035/* R26 - Power 2 */
36#define WM8960_PWR2_LOUT1 0x40
37#define WM8960_PWR2_ROUT1 0x20
38#define WM8960_PWR2_OUT3 0x02
39
Mark Brownf2644a22009-04-07 19:20:14 +010040/* R28 - Anti-pop 1 */
41#define WM8960_POBCTRL 0x80
42#define WM8960_BUFDCOPEN 0x10
43#define WM8960_BUFIOEN 0x08
44#define WM8960_SOFT_ST 0x04
45#define WM8960_HPSTBY 0x01
46
47/* R29 - Anti-pop 2 */
48#define WM8960_DISOP 0x40
Mark Brown913d7b42010-03-03 13:47:03 +000049#define WM8960_DRES_MASK 0x30
Mark Brownf2644a22009-04-07 19:20:14 +010050
Zidan Wang3176bf22015-08-11 19:25:15 +080051static bool is_pll_freq_available(unsigned int source, unsigned int target);
52static int wm8960_set_pll(struct snd_soc_codec *codec,
53 unsigned int freq_in, unsigned int freq_out);
Mark Brownf2644a22009-04-07 19:20:14 +010054/*
55 * wm8960 register cache
56 * We can't read the WM8960 register space when we are
57 * using 2 wire for device control, so we cache them instead.
58 */
Mark Brown0ebe36c2012-09-10 19:23:57 +080059static const struct reg_default wm8960_reg_defaults[] = {
Mark Brownb3df0262013-02-26 23:35:46 +000060 { 0x0, 0x00a7 },
61 { 0x1, 0x00a7 },
Mark Brown0ebe36c2012-09-10 19:23:57 +080062 { 0x2, 0x0000 },
63 { 0x3, 0x0000 },
64 { 0x4, 0x0000 },
65 { 0x5, 0x0008 },
66 { 0x6, 0x0000 },
67 { 0x7, 0x000a },
68 { 0x8, 0x01c0 },
69 { 0x9, 0x0000 },
70 { 0xa, 0x00ff },
71 { 0xb, 0x00ff },
72
73 { 0x10, 0x0000 },
74 { 0x11, 0x007b },
75 { 0x12, 0x0100 },
76 { 0x13, 0x0032 },
77 { 0x14, 0x0000 },
78 { 0x15, 0x00c3 },
79 { 0x16, 0x00c3 },
80 { 0x17, 0x01c0 },
81 { 0x18, 0x0000 },
82 { 0x19, 0x0000 },
83 { 0x1a, 0x0000 },
84 { 0x1b, 0x0000 },
85 { 0x1c, 0x0000 },
86 { 0x1d, 0x0000 },
87
88 { 0x20, 0x0100 },
89 { 0x21, 0x0100 },
90 { 0x22, 0x0050 },
91
92 { 0x25, 0x0050 },
93 { 0x26, 0x0000 },
94 { 0x27, 0x0000 },
95 { 0x28, 0x0000 },
96 { 0x29, 0x0000 },
97 { 0x2a, 0x0040 },
98 { 0x2b, 0x0000 },
99 { 0x2c, 0x0000 },
100 { 0x2d, 0x0050 },
101 { 0x2e, 0x0050 },
102 { 0x2f, 0x0000 },
103 { 0x30, 0x0002 },
104 { 0x31, 0x0037 },
105
106 { 0x33, 0x0080 },
107 { 0x34, 0x0008 },
108 { 0x35, 0x0031 },
109 { 0x36, 0x0026 },
110 { 0x37, 0x00e9 },
Mark Brownf2644a22009-04-07 19:20:14 +0100111};
112
Mark Brown0ebe36c2012-09-10 19:23:57 +0800113static bool wm8960_volatile(struct device *dev, unsigned int reg)
114{
115 switch (reg) {
116 case WM8960_RESET:
117 return true;
118 default:
119 return false;
120 }
121}
122
Mark Brownf2644a22009-04-07 19:20:14 +0100123struct wm8960_priv {
Zidan Wang75aa8862015-01-07 15:31:44 +0800124 struct clk *mclk;
Mark Brown0ebe36c2012-09-10 19:23:57 +0800125 struct regmap *regmap;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000126 int (*set_bias_level)(struct snd_soc_codec *,
127 enum snd_soc_bias_level level);
Mark Brown913d7b42010-03-03 13:47:03 +0000128 struct snd_soc_dapm_widget *lout1;
129 struct snd_soc_dapm_widget *rout1;
130 struct snd_soc_dapm_widget *out3;
Mark Brownafd6d362010-07-05 13:58:16 +0900131 bool deemph;
Zidan Wang3176bf22015-08-11 19:25:15 +0800132 int lrclk;
Zidan Wang0e50b512015-05-12 14:58:08 +0800133 int bclk;
134 int sysclk;
Zidan Wang3176bf22015-08-11 19:25:15 +0800135 int clk_id;
136 int freq_in;
137 bool is_stream_in_use[2];
Zidan Wange2280c902014-11-20 19:07:48 +0800138 struct wm8960_data pdata;
Mark Brownf2644a22009-04-07 19:20:14 +0100139};
140
Zidan Wang3ad5e862014-11-27 16:53:08 +0800141#define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
Mark Brownf2644a22009-04-07 19:20:14 +0100142
143/* enumerated controls */
Mark Brownf2644a22009-04-07 19:20:14 +0100144static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
145 "Right Inverted", "Stereo Inversion"};
146static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
147static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
148static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
149static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
150
151static const struct soc_enum wm8960_enum[] = {
Mark Brownf2644a22009-04-07 19:20:14 +0100152 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
153 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
154 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
155 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
156 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
157 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
158};
159
Mark Brownafd6d362010-07-05 13:58:16 +0900160static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
161
162static int wm8960_set_deemph(struct snd_soc_codec *codec)
163{
164 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
165 int val, i, best;
166
167 /* If we're using deemphasis select the nearest available sample
168 * rate.
169 */
170 if (wm8960->deemph) {
171 best = 1;
172 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
Zidan Wang3176bf22015-08-11 19:25:15 +0800173 if (abs(deemph_settings[i] - wm8960->lrclk) <
174 abs(deemph_settings[best] - wm8960->lrclk))
Mark Brownafd6d362010-07-05 13:58:16 +0900175 best = i;
176 }
177
178 val = best << 1;
179 } else {
180 val = 0;
181 }
182
183 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
184
185 return snd_soc_update_bits(codec, WM8960_DACCTL1,
186 0x6, val);
187}
188
189static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
190 struct snd_ctl_elem_value *ucontrol)
191{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100192 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownafd6d362010-07-05 13:58:16 +0900193 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
194
Takashi Iwaib4a18c82015-03-10 12:39:14 +0100195 ucontrol->value.integer.value[0] = wm8960->deemph;
Dmitry Artamonow3f343f82010-12-08 23:36:17 +0300196 return 0;
Mark Brownafd6d362010-07-05 13:58:16 +0900197}
198
199static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
200 struct snd_ctl_elem_value *ucontrol)
201{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100202 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownafd6d362010-07-05 13:58:16 +0900203 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Dan Carpenterc1fe81f2015-10-13 10:09:19 +0300204 unsigned int deemph = ucontrol->value.integer.value[0];
Mark Brownafd6d362010-07-05 13:58:16 +0900205
206 if (deemph > 1)
207 return -EINVAL;
208
209 wm8960->deemph = deemph;
210
211 return wm8960_set_deemph(codec);
212}
213
Zidan Wang3758ff52015-09-09 19:29:10 +0800214static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800215static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
Zidan Wang3758ff52015-09-09 19:29:10 +0800216static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
Mark Brownf2644a22009-04-07 19:20:14 +0100217static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
218static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800219static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
220static const unsigned int micboost_tlv[] = {
221 TLV_DB_RANGE_HEAD(2),
222 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
223 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
224};
Mark Brownf2644a22009-04-07 19:20:14 +0100225
226static const struct snd_kcontrol_new wm8960_snd_controls[] = {
227SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800228 0, 63, 0, inpga_tlv),
Mark Brownf2644a22009-04-07 19:20:14 +0100229SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
230 6, 1, 0),
231SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
JongHo Kim41a59ca2015-11-03 11:06:32 +0900232 7, 1, 1),
Mark Brownf2644a22009-04-07 19:20:14 +0100233
Mark Brown21eb2692013-02-26 23:36:37 +0000234SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
Stuart Henderson95826a32016-01-19 13:09:08 +0000235 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000236SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
Stuart Henderson95826a32016-01-19 13:09:08 +0000237 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
238SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
239 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
240SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800241 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
242SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
Zidan Wang8524bb02015-09-18 17:19:43 +0800243 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800244SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
Zidan Wang8524bb02015-09-18 17:19:43 +0800245 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000246
Mark Brownf2644a22009-04-07 19:20:14 +0100247SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
248 0, 255, 0, dac_tlv),
249
250SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
251 0, 127, 0, out_tlv),
252SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
253 7, 1, 0),
254
255SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
256 0, 127, 0, out_tlv),
257SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
258 7, 1, 0),
259SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
260SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
261
262SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
Mark Brown4faaa8d2010-07-05 13:54:32 +0900263SOC_ENUM("ADC Polarity", wm8960_enum[0]),
Mark Brownf2644a22009-04-07 19:20:14 +0100264SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
265
Zidan Wanga077e812015-06-11 19:14:36 +0800266SOC_ENUM("DAC Polarity", wm8960_enum[1]),
Mark Brownafd6d362010-07-05 13:58:16 +0900267SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
268 wm8960_get_deemph, wm8960_put_deemph),
Mark Brownf2644a22009-04-07 19:20:14 +0100269
Mark Brown4faaa8d2010-07-05 13:54:32 +0900270SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
271SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
Mark Brownf2644a22009-04-07 19:20:14 +0100272SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
273SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
274
Mark Brown4faaa8d2010-07-05 13:54:32 +0900275SOC_ENUM("ALC Function", wm8960_enum[4]),
Mark Brownf2644a22009-04-07 19:20:14 +0100276SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
277SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
278SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
279SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
Mark Brown4faaa8d2010-07-05 13:54:32 +0900280SOC_ENUM("ALC Mode", wm8960_enum[5]),
Mark Brownf2644a22009-04-07 19:20:14 +0100281SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
282SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
283
284SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
285SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
286
Ma Haijunc324aac2013-08-14 09:15:38 +0800287SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
288 0, 255, 0, adc_tlv),
Mark Brownf2644a22009-04-07 19:20:14 +0100289
290SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
291 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
292SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
293 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
294SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
295 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
296SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
297 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
298};
299
300static const struct snd_kcontrol_new wm8960_lin_boost[] = {
301SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
302SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
303SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
304};
305
306static const struct snd_kcontrol_new wm8960_lin[] = {
307SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
308};
309
310static const struct snd_kcontrol_new wm8960_rin_boost[] = {
311SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
312SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
313SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
314};
315
316static const struct snd_kcontrol_new wm8960_rin[] = {
317SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
318};
319
320static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
321SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
322SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
323SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
324};
325
326static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
327SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
328SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
329SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
330};
331
332static const struct snd_kcontrol_new wm8960_mono_out[] = {
333SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
334SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
335};
336
337static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
338SND_SOC_DAPM_INPUT("LINPUT1"),
339SND_SOC_DAPM_INPUT("RINPUT1"),
340SND_SOC_DAPM_INPUT("LINPUT2"),
341SND_SOC_DAPM_INPUT("RINPUT2"),
342SND_SOC_DAPM_INPUT("LINPUT3"),
343SND_SOC_DAPM_INPUT("RINPUT3"),
344
Mark Brown187774c2011-10-27 09:46:17 +0200345SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
Mark Brownf2644a22009-04-07 19:20:14 +0100346
347SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
348 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
349SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
350 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
351
352SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
353 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
354SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
355 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
356
Mark Brown44426de2013-02-26 23:36:48 +0000357SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
358SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
Mark Brownf2644a22009-04-07 19:20:14 +0100359
360SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
361SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
362
363SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
364 &wm8960_loutput_mixer[0],
365 ARRAY_SIZE(wm8960_loutput_mixer)),
366SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
367 &wm8960_routput_mixer[0],
368 ARRAY_SIZE(wm8960_routput_mixer)),
369
Mark Brownf2644a22009-04-07 19:20:14 +0100370SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
371SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
372
373SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
374SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
375
376SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
377SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
378
379SND_SOC_DAPM_OUTPUT("SPK_LP"),
380SND_SOC_DAPM_OUTPUT("SPK_LN"),
381SND_SOC_DAPM_OUTPUT("HP_L"),
382SND_SOC_DAPM_OUTPUT("HP_R"),
383SND_SOC_DAPM_OUTPUT("SPK_RP"),
384SND_SOC_DAPM_OUTPUT("SPK_RN"),
385SND_SOC_DAPM_OUTPUT("OUT3"),
386};
387
Mark Brown913d7b42010-03-03 13:47:03 +0000388static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
389SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
390 &wm8960_mono_out[0],
391 ARRAY_SIZE(wm8960_mono_out)),
392};
393
394/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
395static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
396SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
397};
398
Mark Brownf2644a22009-04-07 19:20:14 +0100399static const struct snd_soc_dapm_route audio_paths[] = {
400 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
401 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
402 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
403
404 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
405 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
406 { "Left Input Mixer", NULL, "LINPUT2" },
407 { "Left Input Mixer", NULL, "LINPUT3" },
408
409 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
410 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
411 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
412
413 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
414 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
415 { "Right Input Mixer", NULL, "RINPUT2" },
Zidan Wang85e36a1f2015-05-12 14:58:36 +0800416 { "Right Input Mixer", NULL, "RINPUT3" },
Mark Brownf2644a22009-04-07 19:20:14 +0100417
418 { "Left ADC", NULL, "Left Input Mixer" },
419 { "Right ADC", NULL, "Right Input Mixer" },
420
421 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
422 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
423 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
424
425 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
426 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
427 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
428
Mark Brownf2644a22009-04-07 19:20:14 +0100429 { "LOUT1 PGA", NULL, "Left Output Mixer" },
430 { "ROUT1 PGA", NULL, "Right Output Mixer" },
431
432 { "HP_L", NULL, "LOUT1 PGA" },
433 { "HP_R", NULL, "ROUT1 PGA" },
434
435 { "Left Speaker PGA", NULL, "Left Output Mixer" },
436 { "Right Speaker PGA", NULL, "Right Output Mixer" },
437
438 { "Left Speaker Output", NULL, "Left Speaker PGA" },
439 { "Right Speaker Output", NULL, "Right Speaker PGA" },
440
441 { "SPK_LN", NULL, "Left Speaker Output" },
442 { "SPK_LP", NULL, "Left Speaker Output" },
443 { "SPK_RN", NULL, "Right Speaker Output" },
444 { "SPK_RP", NULL, "Right Speaker Output" },
Mark Brown913d7b42010-03-03 13:47:03 +0000445};
446
447static const struct snd_soc_dapm_route audio_paths_out3[] = {
448 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
449 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
Mark Brownf2644a22009-04-07 19:20:14 +0100450
451 { "OUT3", NULL, "Mono Output Mixer", }
452};
453
Mark Brown913d7b42010-03-03 13:47:03 +0000454static const struct snd_soc_dapm_route audio_paths_capless[] = {
455 { "HP_L", NULL, "OUT3 VMID" },
456 { "HP_R", NULL, "OUT3 VMID" },
457
458 { "OUT3 VMID", NULL, "Left Output Mixer" },
459 { "OUT3 VMID", NULL, "Right Output Mixer" },
460};
461
Mark Brownf2644a22009-04-07 19:20:14 +0100462static int wm8960_add_widgets(struct snd_soc_codec *codec)
463{
Mark Brownb2c812e2010-04-14 15:35:19 +0900464 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wange2280c902014-11-20 19:07:48 +0800465 struct wm8960_data *pdata = &wm8960->pdata;
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200466 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Mark Brown913d7b42010-03-03 13:47:03 +0000467 struct snd_soc_dapm_widget *w;
468
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200469 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
Mark Brownf2644a22009-04-07 19:20:14 +0100470 ARRAY_SIZE(wm8960_dapm_widgets));
471
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200472 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
Mark Brownf2644a22009-04-07 19:20:14 +0100473
Mark Brown913d7b42010-03-03 13:47:03 +0000474 /* In capless mode OUT3 is used to provide VMID for the
475 * headphone outputs, otherwise it is used as a mono mixer.
476 */
477 if (pdata && pdata->capless) {
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200478 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
Mark Brown913d7b42010-03-03 13:47:03 +0000479 ARRAY_SIZE(wm8960_dapm_widgets_capless));
480
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200481 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
Mark Brown913d7b42010-03-03 13:47:03 +0000482 ARRAY_SIZE(audio_paths_capless));
483 } else {
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200484 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
Mark Brown913d7b42010-03-03 13:47:03 +0000485 ARRAY_SIZE(wm8960_dapm_widgets_out3));
486
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200487 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
Mark Brown913d7b42010-03-03 13:47:03 +0000488 ARRAY_SIZE(audio_paths_out3));
489 }
490
491 /* We need to power up the headphone output stage out of
492 * sequence for capless mode. To save scanning the widget
493 * list each time to find the desired power state do so now
494 * and save the result.
495 */
Lars-Peter Clausen00200102014-07-17 22:01:07 +0200496 list_for_each_entry(w, &codec->component.card->widgets, list) {
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200497 if (w->dapm != dapm)
Jarkko Nikula97c866d2010-12-14 12:18:31 +0200498 continue;
Mark Brown913d7b42010-03-03 13:47:03 +0000499 if (strcmp(w->name, "LOUT1 PGA") == 0)
500 wm8960->lout1 = w;
501 if (strcmp(w->name, "ROUT1 PGA") == 0)
502 wm8960->rout1 = w;
503 if (strcmp(w->name, "OUT3 VMID") == 0)
504 wm8960->out3 = w;
505 }
506
Mark Brownf2644a22009-04-07 19:20:14 +0100507 return 0;
508}
509
510static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
511 unsigned int fmt)
512{
513 struct snd_soc_codec *codec = codec_dai->codec;
514 u16 iface = 0;
515
516 /* set master/slave audio interface */
517 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
518 case SND_SOC_DAIFMT_CBM_CFM:
519 iface |= 0x0040;
520 break;
521 case SND_SOC_DAIFMT_CBS_CFS:
522 break;
523 default:
524 return -EINVAL;
525 }
526
527 /* interface format */
528 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
529 case SND_SOC_DAIFMT_I2S:
530 iface |= 0x0002;
531 break;
532 case SND_SOC_DAIFMT_RIGHT_J:
533 break;
534 case SND_SOC_DAIFMT_LEFT_J:
535 iface |= 0x0001;
536 break;
537 case SND_SOC_DAIFMT_DSP_A:
538 iface |= 0x0003;
539 break;
540 case SND_SOC_DAIFMT_DSP_B:
541 iface |= 0x0013;
542 break;
543 default:
544 return -EINVAL;
545 }
546
547 /* clock inversion */
548 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
549 case SND_SOC_DAIFMT_NB_NF:
550 break;
551 case SND_SOC_DAIFMT_IB_IF:
552 iface |= 0x0090;
553 break;
554 case SND_SOC_DAIFMT_IB_NF:
555 iface |= 0x0080;
556 break;
557 case SND_SOC_DAIFMT_NB_IF:
558 iface |= 0x0010;
559 break;
560 default:
561 return -EINVAL;
562 }
563
564 /* set iface */
Mark Brown17a52fd2009-07-05 17:24:50 +0100565 snd_soc_write(codec, WM8960_IFACE1, iface);
Mark Brownf2644a22009-04-07 19:20:14 +0100566 return 0;
567}
568
Mark Browndb059c02010-07-05 23:54:51 +0900569static struct {
570 int rate;
571 unsigned int val;
572} alc_rates[] = {
573 { 48000, 0 },
574 { 44100, 0 },
575 { 32000, 1 },
576 { 22050, 2 },
577 { 24000, 2 },
578 { 16000, 3 },
Zidan Wang22ee76d2014-12-31 11:39:14 +0800579 { 11025, 4 },
Mark Browndb059c02010-07-05 23:54:51 +0900580 { 12000, 4 },
581 { 8000, 5 },
582};
583
Zidan Wang3176bf22015-08-11 19:25:15 +0800584/* -1 for reserved value */
585static const int sysclk_divs[] = { 1, -1, 2, -1 };
586
Zidan Wang0e50b512015-05-12 14:58:08 +0800587/* Multiply 256 for internal 256 div */
588static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
589
590/* Multiply 10 to eliminate decimials */
591static const int bclk_divs[] = {
592 10, 15, 20, 30, 40, 55, 60, 80, 110,
593 120, 160, 220, 240, 320, 320, 320
594};
595
Zidan Wang3176bf22015-08-11 19:25:15 +0800596static int wm8960_configure_clocking(struct snd_soc_codec *codec)
Zidan Wang0e50b512015-05-12 14:58:08 +0800597{
598 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wang3176bf22015-08-11 19:25:15 +0800599 int sysclk, bclk, lrclk, freq_out, freq_in;
Zidan Wang0e50b512015-05-12 14:58:08 +0800600 u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
Zidan Wang3176bf22015-08-11 19:25:15 +0800601 int i, j, k;
Zidan Wang0e50b512015-05-12 14:58:08 +0800602
603 if (!(iface1 & (1<<6))) {
604 dev_dbg(codec->dev,
605 "Codec is slave mode, no need to configure clock\n");
Zidan Wang3176bf22015-08-11 19:25:15 +0800606 return 0;
Zidan Wang0e50b512015-05-12 14:58:08 +0800607 }
608
Zidan Wang3176bf22015-08-11 19:25:15 +0800609 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
610 dev_err(codec->dev, "No MCLK configured\n");
611 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800612 }
613
Zidan Wang3176bf22015-08-11 19:25:15 +0800614 freq_in = wm8960->freq_in;
615 bclk = wm8960->bclk;
616 lrclk = wm8960->lrclk;
617 /*
618 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
619 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
620 * directly. Otherwise, auto select a available pll out frequency
621 * and set PLL.
622 */
623 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
624 /* disable the PLL and using MCLK to provide sysclk */
625 wm8960_set_pll(codec, 0, 0);
626 freq_out = freq_in;
627 } else if (wm8960->sysclk) {
628 freq_out = wm8960->sysclk;
629 } else {
630 dev_err(codec->dev, "No SYSCLK configured\n");
631 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800632 }
633
Stuart Henderson6bb74512016-01-19 13:09:09 +0000634 if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
635 /* check if the sysclk frequency is available. */
636 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
637 if (sysclk_divs[i] == -1)
638 continue;
639 sysclk = freq_out / sysclk_divs[i];
640 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
641 if (sysclk != dac_divs[j] * lrclk)
642 continue;
Zidan Wang3176bf22015-08-11 19:25:15 +0800643 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
644 if (sysclk == bclk * bclk_divs[k] / 10)
645 break;
646 if (k != ARRAY_SIZE(bclk_divs))
Zidan Wang0e50b512015-05-12 14:58:08 +0800647 break;
648 }
Stuart Henderson6bb74512016-01-19 13:09:09 +0000649 if (j != ARRAY_SIZE(dac_divs))
650 break;
Zidan Wang3176bf22015-08-11 19:25:15 +0800651 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800652
Stuart Henderson6bb74512016-01-19 13:09:09 +0000653 if (i != ARRAY_SIZE(sysclk_divs)) {
654 goto configure_clock;
655 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
656 dev_err(codec->dev, "failed to configure clock\n");
657 return -EINVAL;
658 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800659 }
660 /* get a available pll out frequency and set pll */
661 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
662 if (sysclk_divs[i] == -1)
663 continue;
664 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
665 sysclk = lrclk * dac_divs[j];
666 freq_out = sysclk * sysclk_divs[i];
667
668 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
669 if (sysclk == bclk * bclk_divs[k] / 10 &&
670 is_pll_freq_available(freq_in, freq_out)) {
671 wm8960_set_pll(codec,
672 freq_in, freq_out);
673 break;
674 } else {
675 continue;
676 }
677 }
678 if (k != ARRAY_SIZE(bclk_divs))
Zidan Wang0e50b512015-05-12 14:58:08 +0800679 break;
680 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800681 if (j != ARRAY_SIZE(dac_divs))
682 break;
Zidan Wang0e50b512015-05-12 14:58:08 +0800683 }
684
Zidan Wang3176bf22015-08-11 19:25:15 +0800685 if (i == ARRAY_SIZE(sysclk_divs)) {
686 dev_err(codec->dev, "failed to configure clock\n");
687 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800688 }
689
Zidan Wang3176bf22015-08-11 19:25:15 +0800690configure_clock:
691 /* configure sysclk clock */
692 snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
693
694 /* configure frame clock */
695 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 3, j << 3);
696 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6);
Zidan Wang0e50b512015-05-12 14:58:08 +0800697
698 /* configure bit clock */
Zidan Wang3176bf22015-08-11 19:25:15 +0800699 snd_soc_update_bits(codec, WM8960_CLOCK2, 0xf, k);
700
701 return 0;
Zidan Wang0e50b512015-05-12 14:58:08 +0800702}
703
Mark Brownf2644a22009-04-07 19:20:14 +0100704static int wm8960_hw_params(struct snd_pcm_substream *substream,
705 struct snd_pcm_hw_params *params,
706 struct snd_soc_dai *dai)
707{
Mark Browne6968a12012-04-04 15:58:16 +0100708 struct snd_soc_codec *codec = dai->codec;
Mark Brownafd6d362010-07-05 13:58:16 +0900709 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Mark Brown17a52fd2009-07-05 17:24:50 +0100710 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
Zidan Wang0e50b512015-05-12 14:58:08 +0800711 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
Mark Browndb059c02010-07-05 23:54:51 +0900712 int i;
Mark Brownf2644a22009-04-07 19:20:14 +0100713
Zidan Wang0e50b512015-05-12 14:58:08 +0800714 wm8960->bclk = snd_soc_params_to_bclk(params);
715 if (params_channels(params) == 1)
716 wm8960->bclk *= 2;
717
Mark Brownf2644a22009-04-07 19:20:14 +0100718 /* bit size */
Mark Brown39e9cc42014-07-31 12:53:23 +0100719 switch (params_width(params)) {
720 case 16:
Mark Brownf2644a22009-04-07 19:20:14 +0100721 break;
Mark Brown39e9cc42014-07-31 12:53:23 +0100722 case 20:
Mark Brownf2644a22009-04-07 19:20:14 +0100723 iface |= 0x0004;
724 break;
Mark Brown39e9cc42014-07-31 12:53:23 +0100725 case 24:
Mark Brownf2644a22009-04-07 19:20:14 +0100726 iface |= 0x0008;
727 break;
Zidan Wang7a8c7862015-05-12 14:58:21 +0800728 case 32:
729 /* right justify mode does not support 32 word length */
730 if ((iface & 0x3) != 0) {
731 iface |= 0x000c;
732 break;
733 }
Timur Tabi4c2474c2012-09-14 16:14:37 -0500734 default:
Mark Brown39e9cc42014-07-31 12:53:23 +0100735 dev_err(codec->dev, "unsupported width %d\n",
736 params_width(params));
Timur Tabi4c2474c2012-09-14 16:14:37 -0500737 return -EINVAL;
Mark Brownf2644a22009-04-07 19:20:14 +0100738 }
739
Zidan Wang3176bf22015-08-11 19:25:15 +0800740 wm8960->lrclk = params_rate(params);
Mark Brownafd6d362010-07-05 13:58:16 +0900741 /* Update filters for the new rate */
Zidan Wang3176bf22015-08-11 19:25:15 +0800742 if (tx) {
Mark Brownafd6d362010-07-05 13:58:16 +0900743 wm8960_set_deemph(codec);
Mark Browndb059c02010-07-05 23:54:51 +0900744 } else {
745 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
746 if (alc_rates[i].rate == params_rate(params))
747 snd_soc_update_bits(codec,
748 WM8960_ADDCTL3, 0x7,
749 alc_rates[i].val);
Mark Brownafd6d362010-07-05 13:58:16 +0900750 }
751
Mark Brownf2644a22009-04-07 19:20:14 +0100752 /* set iface */
Mark Brown17a52fd2009-07-05 17:24:50 +0100753 snd_soc_write(codec, WM8960_IFACE1, iface);
Zidan Wang0e50b512015-05-12 14:58:08 +0800754
Zidan Wang3176bf22015-08-11 19:25:15 +0800755 wm8960->is_stream_in_use[tx] = true;
756
757 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON &&
758 !wm8960->is_stream_in_use[!tx])
759 return wm8960_configure_clocking(codec);
760
761 return 0;
762}
763
764static int wm8960_hw_free(struct snd_pcm_substream *substream,
765 struct snd_soc_dai *dai)
766{
767 struct snd_soc_codec *codec = dai->codec;
768 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
769 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
770
771 wm8960->is_stream_in_use[tx] = false;
Zidan Wang0e50b512015-05-12 14:58:08 +0800772
Mark Brownf2644a22009-04-07 19:20:14 +0100773 return 0;
774}
775
776static int wm8960_mute(struct snd_soc_dai *dai, int mute)
777{
778 struct snd_soc_codec *codec = dai->codec;
Mark Brownf2644a22009-04-07 19:20:14 +0100779
780 if (mute)
Axel Lin16b24882011-12-08 11:09:15 +0800781 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
Mark Brownf2644a22009-04-07 19:20:14 +0100782 else
Axel Lin16b24882011-12-08 11:09:15 +0800783 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
Mark Brownf2644a22009-04-07 19:20:14 +0100784 return 0;
785}
786
Mark Brown913d7b42010-03-03 13:47:03 +0000787static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
788 enum snd_soc_bias_level level)
Mark Brownf2644a22009-04-07 19:20:14 +0100789{
Mark Brown0ebe36c2012-09-10 19:23:57 +0800790 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wang3176bf22015-08-11 19:25:15 +0800791 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
Zidan Wang75aa8862015-01-07 15:31:44 +0800792 int ret;
Mark Brown0ebe36c2012-09-10 19:23:57 +0800793
Mark Brownf2644a22009-04-07 19:20:14 +0100794 switch (level) {
795 case SND_SOC_BIAS_ON:
796 break;
797
798 case SND_SOC_BIAS_PREPARE:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200799 switch (snd_soc_codec_get_bias_level(codec)) {
Zidan Wang75aa8862015-01-07 15:31:44 +0800800 case SND_SOC_BIAS_STANDBY:
801 if (!IS_ERR(wm8960->mclk)) {
802 ret = clk_prepare_enable(wm8960->mclk);
803 if (ret) {
804 dev_err(codec->dev,
805 "Failed to enable MCLK: %d\n",
806 ret);
807 return ret;
808 }
809 }
810
Zidan Wang3176bf22015-08-11 19:25:15 +0800811 ret = wm8960_configure_clocking(codec);
812 if (ret)
813 return ret;
814
Zidan Wang75aa8862015-01-07 15:31:44 +0800815 /* Set VMID to 2x50k */
816 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
817 break;
818
819 case SND_SOC_BIAS_ON:
Zidan Wang3176bf22015-08-11 19:25:15 +0800820 /*
821 * If it's sysclk auto mode, and the pll is enabled,
822 * disable the pll
823 */
824 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
825 wm8960_set_pll(codec, 0, 0);
826
Zidan Wang75aa8862015-01-07 15:31:44 +0800827 if (!IS_ERR(wm8960->mclk))
828 clk_disable_unprepare(wm8960->mclk);
829 break;
830
831 default:
832 break;
833 }
834
Mark Brownf2644a22009-04-07 19:20:14 +0100835 break;
836
837 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200838 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
Mark Brown0ebe36c2012-09-10 19:23:57 +0800839 regcache_sync(wm8960->regmap);
Axel Linbc45df22011-10-07 21:50:23 +0800840
Mark Brownf2644a22009-04-07 19:20:14 +0100841 /* Enable anti-pop features */
Mark Brown17a52fd2009-07-05 17:24:50 +0100842 snd_soc_write(codec, WM8960_APOP1,
Mark Brown913d7b42010-03-03 13:47:03 +0000843 WM8960_POBCTRL | WM8960_SOFT_ST |
844 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
Mark Brownf2644a22009-04-07 19:20:14 +0100845
846 /* Enable & ramp VMID at 2x50k */
Axel Lin16b24882011-12-08 11:09:15 +0800847 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
Mark Brownf2644a22009-04-07 19:20:14 +0100848 msleep(100);
849
850 /* Enable VREF */
Axel Lin16b24882011-12-08 11:09:15 +0800851 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
852 WM8960_VREF);
Mark Brownf2644a22009-04-07 19:20:14 +0100853
854 /* Disable anti-pop features */
Mark Brown17a52fd2009-07-05 17:24:50 +0100855 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
Mark Brownf2644a22009-04-07 19:20:14 +0100856 }
857
858 /* Set VMID to 2x250k */
Axel Lin16b24882011-12-08 11:09:15 +0800859 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
Mark Brownf2644a22009-04-07 19:20:14 +0100860 break;
861
862 case SND_SOC_BIAS_OFF:
863 /* Enable anti-pop features */
Mark Brown17a52fd2009-07-05 17:24:50 +0100864 snd_soc_write(codec, WM8960_APOP1,
Mark Brownf2644a22009-04-07 19:20:14 +0100865 WM8960_POBCTRL | WM8960_SOFT_ST |
866 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
867
868 /* Disable VMID and VREF, let them discharge */
Mark Brown17a52fd2009-07-05 17:24:50 +0100869 snd_soc_write(codec, WM8960_POWER1, 0);
Mark Brownf2644a22009-04-07 19:20:14 +0100870 msleep(600);
Mark Brown913d7b42010-03-03 13:47:03 +0000871 break;
872 }
Mark Brownf2644a22009-04-07 19:20:14 +0100873
Mark Brown913d7b42010-03-03 13:47:03 +0000874 return 0;
875}
876
877static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
878 enum snd_soc_bias_level level)
879{
Mark Brownb2c812e2010-04-14 15:35:19 +0900880 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wang3176bf22015-08-11 19:25:15 +0800881 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
Zidan Wang75aa8862015-01-07 15:31:44 +0800882 int reg, ret;
Mark Brown913d7b42010-03-03 13:47:03 +0000883
884 switch (level) {
885 case SND_SOC_BIAS_ON:
886 break;
887
888 case SND_SOC_BIAS_PREPARE:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200889 switch (snd_soc_codec_get_bias_level(codec)) {
Mark Brown913d7b42010-03-03 13:47:03 +0000890 case SND_SOC_BIAS_STANDBY:
891 /* Enable anti pop mode */
892 snd_soc_update_bits(codec, WM8960_APOP1,
893 WM8960_POBCTRL | WM8960_SOFT_ST |
894 WM8960_BUFDCOPEN,
895 WM8960_POBCTRL | WM8960_SOFT_ST |
896 WM8960_BUFDCOPEN);
897
898 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
899 reg = 0;
900 if (wm8960->lout1 && wm8960->lout1->power)
901 reg |= WM8960_PWR2_LOUT1;
902 if (wm8960->rout1 && wm8960->rout1->power)
903 reg |= WM8960_PWR2_ROUT1;
904 if (wm8960->out3 && wm8960->out3->power)
905 reg |= WM8960_PWR2_OUT3;
906 snd_soc_update_bits(codec, WM8960_POWER2,
907 WM8960_PWR2_LOUT1 |
908 WM8960_PWR2_ROUT1 |
909 WM8960_PWR2_OUT3, reg);
910
911 /* Enable VMID at 2*50k */
912 snd_soc_update_bits(codec, WM8960_POWER1,
913 WM8960_VMID_MASK, 0x80);
914
915 /* Ramp */
916 msleep(100);
917
918 /* Enable VREF */
919 snd_soc_update_bits(codec, WM8960_POWER1,
920 WM8960_VREF, WM8960_VREF);
921
922 msleep(100);
Zidan Wang75aa8862015-01-07 15:31:44 +0800923
924 if (!IS_ERR(wm8960->mclk)) {
925 ret = clk_prepare_enable(wm8960->mclk);
926 if (ret) {
927 dev_err(codec->dev,
928 "Failed to enable MCLK: %d\n",
929 ret);
930 return ret;
931 }
932 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800933
934 ret = wm8960_configure_clocking(codec);
935 if (ret)
936 return ret;
937
Mark Brown913d7b42010-03-03 13:47:03 +0000938 break;
939
940 case SND_SOC_BIAS_ON:
Zidan Wang3176bf22015-08-11 19:25:15 +0800941 /*
942 * If it's sysclk auto mode, and the pll is enabled,
943 * disable the pll
944 */
945 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
946 wm8960_set_pll(codec, 0, 0);
947
Zidan Wang75aa8862015-01-07 15:31:44 +0800948 if (!IS_ERR(wm8960->mclk))
949 clk_disable_unprepare(wm8960->mclk);
950
Mark Brown913d7b42010-03-03 13:47:03 +0000951 /* Enable anti-pop mode */
952 snd_soc_update_bits(codec, WM8960_APOP1,
953 WM8960_POBCTRL | WM8960_SOFT_ST |
954 WM8960_BUFDCOPEN,
955 WM8960_POBCTRL | WM8960_SOFT_ST |
956 WM8960_BUFDCOPEN);
957
958 /* Disable VMID and VREF */
959 snd_soc_update_bits(codec, WM8960_POWER1,
960 WM8960_VREF | WM8960_VMID_MASK, 0);
961 break;
962
Axel Linbc45df22011-10-07 21:50:23 +0800963 case SND_SOC_BIAS_OFF:
Mark Brown0ebe36c2012-09-10 19:23:57 +0800964 regcache_sync(wm8960->regmap);
Axel Linbc45df22011-10-07 21:50:23 +0800965 break;
Mark Brown913d7b42010-03-03 13:47:03 +0000966 default:
967 break;
968 }
969 break;
970
971 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200972 switch (snd_soc_codec_get_bias_level(codec)) {
Mark Brown913d7b42010-03-03 13:47:03 +0000973 case SND_SOC_BIAS_PREPARE:
974 /* Disable HP discharge */
975 snd_soc_update_bits(codec, WM8960_APOP2,
976 WM8960_DISOP | WM8960_DRES_MASK,
977 0);
978
979 /* Disable anti-pop features */
980 snd_soc_update_bits(codec, WM8960_APOP1,
981 WM8960_POBCTRL | WM8960_SOFT_ST |
982 WM8960_BUFDCOPEN,
983 WM8960_POBCTRL | WM8960_SOFT_ST |
984 WM8960_BUFDCOPEN);
985 break;
986
987 default:
988 break;
989 }
990 break;
991
992 case SND_SOC_BIAS_OFF:
Mark Brownf2644a22009-04-07 19:20:14 +0100993 break;
994 }
995
Mark Brownf2644a22009-04-07 19:20:14 +0100996 return 0;
997}
998
999/* PLL divisors */
1000struct _pll_div {
1001 u32 pre_div:1;
1002 u32 n:4;
1003 u32 k:24;
1004};
1005
Zidan Wang3176bf22015-08-11 19:25:15 +08001006static bool is_pll_freq_available(unsigned int source, unsigned int target)
1007{
1008 unsigned int Ndiv;
1009
1010 if (source == 0 || target == 0)
1011 return false;
1012
1013 /* Scale up target to PLL operating frequency */
1014 target *= 4;
1015 Ndiv = target / source;
1016
1017 if (Ndiv < 6) {
1018 source >>= 1;
1019 Ndiv = target / source;
1020 }
1021
1022 if ((Ndiv < 6) || (Ndiv > 12))
1023 return false;
1024
1025 return true;
1026}
1027
Mark Brownf2644a22009-04-07 19:20:14 +01001028/* The size in bits of the pll divide multiplied by 10
1029 * to allow rounding later */
1030#define FIXED_PLL_SIZE ((1 << 24) * 10)
1031
1032static int pll_factors(unsigned int source, unsigned int target,
1033 struct _pll_div *pll_div)
1034{
1035 unsigned long long Kpart;
1036 unsigned int K, Ndiv, Nmod;
1037
1038 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1039
1040 /* Scale up target to PLL operating frequency */
1041 target *= 4;
1042
1043 Ndiv = target / source;
1044 if (Ndiv < 6) {
1045 source >>= 1;
1046 pll_div->pre_div = 1;
1047 Ndiv = target / source;
1048 } else
1049 pll_div->pre_div = 0;
1050
1051 if ((Ndiv < 6) || (Ndiv > 12)) {
1052 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1053 return -EINVAL;
1054 }
1055
1056 pll_div->n = Ndiv;
1057 Nmod = target % source;
1058 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1059
1060 do_div(Kpart, source);
1061
1062 K = Kpart & 0xFFFFFFFF;
1063
1064 /* Check if we need to round */
1065 if ((K % 10) >= 5)
1066 K += 5;
1067
1068 /* Move down to proper range now rounding is done */
1069 K /= 10;
1070
1071 pll_div->k = K;
1072
1073 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1074 pll_div->n, pll_div->k, pll_div->pre_div);
1075
1076 return 0;
1077}
1078
Zidan Wang3176bf22015-08-11 19:25:15 +08001079static int wm8960_set_pll(struct snd_soc_codec *codec,
1080 unsigned int freq_in, unsigned int freq_out)
Mark Brownf2644a22009-04-07 19:20:14 +01001081{
Mark Brownf2644a22009-04-07 19:20:14 +01001082 u16 reg;
1083 static struct _pll_div pll_div;
1084 int ret;
1085
1086 if (freq_in && freq_out) {
1087 ret = pll_factors(freq_in, freq_out, &pll_div);
1088 if (ret != 0)
1089 return ret;
1090 }
1091
1092 /* Disable the PLL: even if we are changing the frequency the
1093 * PLL needs to be disabled while we do so. */
Axel Lin16b24882011-12-08 11:09:15 +08001094 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
1095 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
Mark Brownf2644a22009-04-07 19:20:14 +01001096
1097 if (!freq_in || !freq_out)
1098 return 0;
1099
Mark Brown17a52fd2009-07-05 17:24:50 +01001100 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
Mark Brownf2644a22009-04-07 19:20:14 +01001101 reg |= pll_div.pre_div << 4;
1102 reg |= pll_div.n;
1103
1104 if (pll_div.k) {
1105 reg |= 0x20;
1106
Mike Dyer85fa5322013-08-16 18:36:28 +01001107 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1108 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1109 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
Mark Brownf2644a22009-04-07 19:20:14 +01001110 }
Mark Brown17a52fd2009-07-05 17:24:50 +01001111 snd_soc_write(codec, WM8960_PLL1, reg);
Mark Brownf2644a22009-04-07 19:20:14 +01001112
1113 /* Turn it on */
Axel Lin16b24882011-12-08 11:09:15 +08001114 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
Mark Brownf2644a22009-04-07 19:20:14 +01001115 msleep(250);
Axel Lin16b24882011-12-08 11:09:15 +08001116 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
Mark Brownf2644a22009-04-07 19:20:14 +01001117
1118 return 0;
1119}
1120
Zidan Wang3176bf22015-08-11 19:25:15 +08001121static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1122 int source, unsigned int freq_in, unsigned int freq_out)
1123{
1124 struct snd_soc_codec *codec = codec_dai->codec;
1125 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1126
1127 wm8960->freq_in = freq_in;
1128
1129 if (pll_id == WM8960_SYSCLK_AUTO)
1130 return 0;
1131
1132 return wm8960_set_pll(codec, freq_in, freq_out);
1133}
1134
Mark Brownf2644a22009-04-07 19:20:14 +01001135static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1136 int div_id, int div)
1137{
1138 struct snd_soc_codec *codec = codec_dai->codec;
1139 u16 reg;
1140
1141 switch (div_id) {
Mark Brownf2644a22009-04-07 19:20:14 +01001142 case WM8960_SYSCLKDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001143 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
1144 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001145 break;
1146 case WM8960_DACDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001147 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
1148 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001149 break;
1150 case WM8960_OPCLKDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001151 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
1152 snd_soc_write(codec, WM8960_PLL1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001153 break;
1154 case WM8960_DCLKDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001155 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
1156 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001157 break;
1158 case WM8960_TOCLKSEL:
Mark Brown17a52fd2009-07-05 17:24:50 +01001159 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
1160 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001161 break;
1162 default:
1163 return -EINVAL;
1164 }
1165
1166 return 0;
1167}
1168
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001169static int wm8960_set_bias_level(struct snd_soc_codec *codec,
1170 enum snd_soc_bias_level level)
1171{
1172 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1173
1174 return wm8960->set_bias_level(codec, level);
1175}
1176
Zidan Wang0e50b512015-05-12 14:58:08 +08001177static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1178 unsigned int freq, int dir)
1179{
1180 struct snd_soc_codec *codec = dai->codec;
1181 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1182
1183 switch (clk_id) {
1184 case WM8960_SYSCLK_MCLK:
1185 snd_soc_update_bits(codec, WM8960_CLOCK1,
1186 0x1, WM8960_SYSCLK_MCLK);
1187 break;
1188 case WM8960_SYSCLK_PLL:
1189 snd_soc_update_bits(codec, WM8960_CLOCK1,
1190 0x1, WM8960_SYSCLK_PLL);
1191 break;
Zidan Wang3176bf22015-08-11 19:25:15 +08001192 case WM8960_SYSCLK_AUTO:
1193 break;
Zidan Wang0e50b512015-05-12 14:58:08 +08001194 default:
1195 return -EINVAL;
1196 }
1197
1198 wm8960->sysclk = freq;
Zidan Wang3176bf22015-08-11 19:25:15 +08001199 wm8960->clk_id = clk_id;
Zidan Wang0e50b512015-05-12 14:58:08 +08001200
1201 return 0;
1202}
1203
Mark Brownf2644a22009-04-07 19:20:14 +01001204#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1205
1206#define WM8960_FORMATS \
1207 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
Zidan Wang7a8c7862015-05-12 14:58:21 +08001208 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
Mark Brownf2644a22009-04-07 19:20:14 +01001209
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01001210static const struct snd_soc_dai_ops wm8960_dai_ops = {
Mark Brownf2644a22009-04-07 19:20:14 +01001211 .hw_params = wm8960_hw_params,
Zidan Wang3176bf22015-08-11 19:25:15 +08001212 .hw_free = wm8960_hw_free,
Mark Brownf2644a22009-04-07 19:20:14 +01001213 .digital_mute = wm8960_mute,
1214 .set_fmt = wm8960_set_dai_fmt,
1215 .set_clkdiv = wm8960_set_dai_clkdiv,
1216 .set_pll = wm8960_set_dai_pll,
Zidan Wang0e50b512015-05-12 14:58:08 +08001217 .set_sysclk = wm8960_set_dai_sysclk,
Mark Brownf2644a22009-04-07 19:20:14 +01001218};
1219
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001220static struct snd_soc_dai_driver wm8960_dai = {
1221 .name = "wm8960-hifi",
Mark Brownf2644a22009-04-07 19:20:14 +01001222 .playback = {
1223 .stream_name = "Playback",
1224 .channels_min = 1,
1225 .channels_max = 2,
1226 .rates = WM8960_RATES,
1227 .formats = WM8960_FORMATS,},
1228 .capture = {
1229 .stream_name = "Capture",
1230 .channels_min = 1,
1231 .channels_max = 2,
1232 .rates = WM8960_RATES,
1233 .formats = WM8960_FORMATS,},
1234 .ops = &wm8960_dai_ops,
1235 .symmetric_rates = 1,
1236};
Mark Brownf2644a22009-04-07 19:20:14 +01001237
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001238static int wm8960_probe(struct snd_soc_codec *codec)
Mark Brownf2644a22009-04-07 19:20:14 +01001239{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001240 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wange2280c902014-11-20 19:07:48 +08001241 struct wm8960_data *pdata = &wm8960->pdata;
Mark Brownf2644a22009-04-07 19:20:14 +01001242
Zidan Wange2280c902014-11-20 19:07:48 +08001243 if (pdata->capless)
1244 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1245 else
1246 wm8960->set_bias_level = wm8960_set_bias_level_out3;
Mark Brownf2644a22009-04-07 19:20:14 +01001247
Liam Girdwood022658b2012-02-03 17:43:09 +00001248 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001249 ARRAY_SIZE(wm8960_snd_controls));
1250 wm8960_add_widgets(codec);
Mark Brownf2644a22009-04-07 19:20:14 +01001251
1252 return 0;
1253}
1254
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001255static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
1256 .probe = wm8960_probe,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001257 .set_bias_level = wm8960_set_bias_level,
Lars-Peter Clausen0a87a6e2014-11-23 13:37:33 +01001258 .suspend_bias_off = true,
Mark Brown0ebe36c2012-09-10 19:23:57 +08001259};
1260
1261static const struct regmap_config wm8960_regmap = {
1262 .reg_bits = 7,
1263 .val_bits = 9,
1264 .max_register = WM8960_PLL4,
1265
1266 .reg_defaults = wm8960_reg_defaults,
1267 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1268 .cache_type = REGCACHE_RBTREE,
1269
1270 .volatile_reg = wm8960_volatile,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001271};
1272
Zidan Wange2280c902014-11-20 19:07:48 +08001273static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1274 struct wm8960_data *pdata)
1275{
1276 const struct device_node *np = i2c->dev.of_node;
1277
1278 if (of_property_read_bool(np, "wlf,capless"))
1279 pdata->capless = true;
1280
1281 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1282 pdata->shared_lrclk = true;
1283}
1284
Bill Pemberton7a79e942012-12-07 09:26:37 -05001285static int wm8960_i2c_probe(struct i2c_client *i2c,
1286 const struct i2c_device_id *id)
Mark Brownf2644a22009-04-07 19:20:14 +01001287{
Mark Brown37061632012-09-13 11:46:58 +08001288 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
Mark Brownf2644a22009-04-07 19:20:14 +01001289 struct wm8960_priv *wm8960;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001290 int ret;
Mark Brownf2644a22009-04-07 19:20:14 +01001291
Mark Brownb9791c02011-12-16 07:42:58 +01001292 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1293 GFP_KERNEL);
Mark Brownf2644a22009-04-07 19:20:14 +01001294 if (wm8960 == NULL)
1295 return -ENOMEM;
1296
Zidan Wang75aa8862015-01-07 15:31:44 +08001297 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1298 if (IS_ERR(wm8960->mclk)) {
1299 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1300 return -EPROBE_DEFER;
1301 }
1302
Sachin Kamatc5e6f5f2012-11-26 17:19:43 +05301303 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
Mark Brown0ebe36c2012-09-10 19:23:57 +08001304 if (IS_ERR(wm8960->regmap))
1305 return PTR_ERR(wm8960->regmap);
1306
Zidan Wange2280c902014-11-20 19:07:48 +08001307 if (pdata)
1308 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1309 else if (i2c->dev.of_node)
1310 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1311
Zidan Wang3ad5e862014-11-27 16:53:08 +08001312 ret = wm8960_reset(wm8960->regmap);
1313 if (ret != 0) {
1314 dev_err(&i2c->dev, "Failed to issue reset\n");
1315 return ret;
1316 }
1317
1318 if (wm8960->pdata.shared_lrclk) {
Mark Brown37061632012-09-13 11:46:58 +08001319 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1320 0x4, 0x4);
1321 if (ret != 0) {
1322 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1323 ret);
1324 return ret;
1325 }
1326 }
1327
Zidan Wang3ad5e862014-11-27 16:53:08 +08001328 /* Latch the update bits */
1329 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1330 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1331 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1332 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1333 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1334 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1335 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1336 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1337 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1338 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1339
Mark Brownf2644a22009-04-07 19:20:14 +01001340 i2c_set_clientdata(i2c, wm8960);
Mark Brownf2644a22009-04-07 19:20:14 +01001341
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001342 ret = snd_soc_register_codec(&i2c->dev,
1343 &soc_codec_dev_wm8960, &wm8960_dai, 1);
Mark Brownb9791c02011-12-16 07:42:58 +01001344
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001345 return ret;
Mark Brownf2644a22009-04-07 19:20:14 +01001346}
1347
Bill Pemberton7a79e942012-12-07 09:26:37 -05001348static int wm8960_i2c_remove(struct i2c_client *client)
Mark Brownf2644a22009-04-07 19:20:14 +01001349{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001350 snd_soc_unregister_codec(&client->dev);
Mark Brownf2644a22009-04-07 19:20:14 +01001351 return 0;
1352}
1353
1354static const struct i2c_device_id wm8960_i2c_id[] = {
1355 { "wm8960", 0 },
1356 { }
1357};
1358MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1359
Zidan Wange2280c902014-11-20 19:07:48 +08001360static const struct of_device_id wm8960_of_match[] = {
1361 { .compatible = "wlf,wm8960", },
1362 { }
1363};
1364MODULE_DEVICE_TABLE(of, wm8960_of_match);
1365
Mark Brownf2644a22009-04-07 19:20:14 +01001366static struct i2c_driver wm8960_i2c_driver = {
1367 .driver = {
Mark Brown091edcc2011-12-02 22:08:49 +00001368 .name = "wm8960",
Zidan Wange2280c902014-11-20 19:07:48 +08001369 .of_match_table = wm8960_of_match,
Mark Brownf2644a22009-04-07 19:20:14 +01001370 },
1371 .probe = wm8960_i2c_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -05001372 .remove = wm8960_i2c_remove,
Mark Brownf2644a22009-04-07 19:20:14 +01001373 .id_table = wm8960_i2c_id,
1374};
1375
Sachin Kamat3c010e62012-08-06 17:25:36 +05301376module_i2c_driver(wm8960_i2c_driver);
Mark Brownf2644a22009-04-07 19:20:14 +01001377
Mark Brownf2644a22009-04-07 19:20:14 +01001378MODULE_DESCRIPTION("ASoC WM8960 driver");
1379MODULE_AUTHOR("Liam Girdwood");
1380MODULE_LICENSE("GPL");