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Wu Zhangjin67b35e52009-07-02 23:25:46 +08001/*
2 * Loongson2 performance counter driver for oprofile
3 *
Wu Zhangjin937893c2009-11-06 18:45:06 +08004 * Copyright (C) 2009 Lemote Inc.
Wu Zhangjin67b35e52009-07-02 23:25:46 +08005 * Author: Yanhua <yanh@lemote.com>
Wu Zhangjinf7a904d2010-01-04 17:16:51 +08006 * Author: Wu Zhangjin <wuzhangjin@gmail.com>
Wu Zhangjin67b35e52009-07-02 23:25:46 +08007 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
Wu Zhangjin67b35e52009-07-02 23:25:46 +080011 */
12#include <linux/init.h>
13#include <linux/oprofile.h>
14#include <linux/interrupt.h>
15
16#include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */
17#include "op_impl.h"
18
Wu Zhangjin55f4e1d2009-10-21 22:51:46 +080019#define LOONGSON2_CPU_TYPE "mips/loongson2"
Wu Zhangjin67b35e52009-07-02 23:25:46 +080020
Ralf Baechle70342282013-01-22 12:59:30 +010021#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
Wu Zhangjin852151b2010-05-07 01:29:47 +080022
23#define LOONGSON2_PERFCTRL_EXL (1UL << 0)
Ralf Baechle70342282013-01-22 12:59:30 +010024#define LOONGSON2_PERFCTRL_KERNEL (1UL << 1)
25#define LOONGSON2_PERFCTRL_SUPERVISOR (1UL << 2)
26#define LOONGSON2_PERFCTRL_USER (1UL << 3)
27#define LOONGSON2_PERFCTRL_ENABLE (1UL << 4)
Wu Zhangjin86e5a522010-05-07 01:29:44 +080028#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
29 (((event) & 0x0f) << ((idx) ? 9 : 5))
Wu Zhangjin67b35e52009-07-02 23:25:46 +080030
Wu Zhangjin67b35e52009-07-02 23:25:46 +080031#define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
32#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
33#define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
34#define write_c0_perfcnt(val) __write_64bit_c0_register($25, 0, val)
35
36static struct loongson2_register_config {
37 unsigned int ctrl;
38 unsigned long long reset_counter1;
39 unsigned long long reset_counter2;
Uwe Kleine-König8813d332009-09-21 10:40:37 +020040 int cnt1_enabled, cnt2_enabled;
Wu Zhangjin67b35e52009-07-02 23:25:46 +080041} reg;
42
Wu Zhangjin67b35e52009-07-02 23:25:46 +080043static char *oprofid = "LoongsonPerf";
44static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
Wu Zhangjin67b35e52009-07-02 23:25:46 +080045
Wu Zhangjin1d842672010-05-07 01:03:49 +080046static void reset_counters(void *arg)
47{
48 write_c0_perfctrl(0);
49 write_c0_perfcnt(0);
50}
51
Wu Zhangjin67b35e52009-07-02 23:25:46 +080052static void loongson2_reg_setup(struct op_counter_config *cfg)
53{
54 unsigned int ctrl = 0;
55
56 reg.reset_counter1 = 0;
57 reg.reset_counter2 = 0;
Wu Zhangjin893556e2010-05-07 01:29:48 +080058
59 /*
60 * Compute the performance counter ctrl word.
61 * For now, count kernel and user mode.
62 */
Wu Zhangjin67b35e52009-07-02 23:25:46 +080063 if (cfg[0].enabled) {
Wu Zhangjin86e5a522010-05-07 01:29:44 +080064 ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
Wu Zhangjin67b35e52009-07-02 23:25:46 +080065 reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
66 }
67
68 if (cfg[1].enabled) {
Wu Zhangjin86e5a522010-05-07 01:29:44 +080069 ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event);
Wu Zhangjinc838abc2010-05-07 01:29:45 +080070 reg.reset_counter2 = 0x80000000ULL - cfg[1].count;
Wu Zhangjin67b35e52009-07-02 23:25:46 +080071 }
72
73 if (cfg[0].enabled || cfg[1].enabled) {
Wu Zhangjin852151b2010-05-07 01:29:47 +080074 ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE;
Wu Zhangjin67b35e52009-07-02 23:25:46 +080075 if (cfg[0].kernel || cfg[1].kernel)
Wu Zhangjin852151b2010-05-07 01:29:47 +080076 ctrl |= LOONGSON2_PERFCTRL_KERNEL;
Wu Zhangjin67b35e52009-07-02 23:25:46 +080077 if (cfg[0].user || cfg[1].user)
Wu Zhangjin852151b2010-05-07 01:29:47 +080078 ctrl |= LOONGSON2_PERFCTRL_USER;
Wu Zhangjin67b35e52009-07-02 23:25:46 +080079 }
80
81 reg.ctrl = ctrl;
82
Uwe Kleine-König8813d332009-09-21 10:40:37 +020083 reg.cnt1_enabled = cfg[0].enabled;
84 reg.cnt2_enabled = cfg[1].enabled;
Wu Zhangjin67b35e52009-07-02 23:25:46 +080085}
86
Wu Zhangjin67b35e52009-07-02 23:25:46 +080087static void loongson2_cpu_setup(void *args)
88{
Wu Zhangjin6d8c2872010-05-07 01:29:46 +080089 write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
Wu Zhangjin67b35e52009-07-02 23:25:46 +080090}
91
92static void loongson2_cpu_start(void *args)
93{
94 /* Start all counters on current CPU */
Uwe Kleine-König8813d332009-09-21 10:40:37 +020095 if (reg.cnt1_enabled || reg.cnt2_enabled)
Wu Zhangjin67b35e52009-07-02 23:25:46 +080096 write_c0_perfctrl(reg.ctrl);
97}
98
99static void loongson2_cpu_stop(void *args)
100{
101 /* Stop all counters on current CPU */
102 write_c0_perfctrl(0);
103 memset(&reg, 0, sizeof(reg));
104}
105
106static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
107{
108 uint64_t counter, counter1, counter2;
109 struct pt_regs *regs = get_irq_regs();
110 int enabled;
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800111
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800112 /* Check whether the irq belongs to me */
Wu Zhangjin852151b2010-05-07 01:29:47 +0800113 enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
Wu Zhangjin937893c2009-11-06 18:45:06 +0800114 if (!enabled)
115 return IRQ_NONE;
Uwe Kleine-König8813d332009-09-21 10:40:37 +0200116 enabled = reg.cnt1_enabled | reg.cnt2_enabled;
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800117 if (!enabled)
118 return IRQ_NONE;
119
120 counter = read_c0_perfcnt();
121 counter1 = counter & 0xffffffff;
122 counter2 = counter >> 32;
123
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800124 if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
Uwe Kleine-König8813d332009-09-21 10:40:37 +0200125 if (reg.cnt1_enabled)
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800126 oprofile_add_sample(regs, 0);
127 counter1 = reg.reset_counter1;
128 }
129 if (counter2 & LOONGSON2_PERFCNT_OVERFLOW) {
Uwe Kleine-König8813d332009-09-21 10:40:37 +0200130 if (reg.cnt2_enabled)
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800131 oprofile_add_sample(regs, 1);
132 counter2 = reg.reset_counter2;
133 }
134
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800135 write_c0_perfcnt((counter2 << 32) | counter1);
136
137 return IRQ_HANDLED;
138}
139
140static int __init loongson2_init(void)
141{
142 return request_irq(LOONGSON2_PERFCNT_IRQ, loongson2_perfcount_handler,
143 IRQF_SHARED, "Perfcounter", oprofid);
144}
145
146static void loongson2_exit(void)
147{
Wu Zhangjin1d842672010-05-07 01:03:49 +0800148 reset_counters(NULL);
Wu Zhangjin67b35e52009-07-02 23:25:46 +0800149 free_irq(LOONGSON2_PERFCNT_IRQ, oprofid);
150}
151
152struct op_mips_model op_model_loongson2_ops = {
153 .reg_setup = loongson2_reg_setup,
154 .cpu_setup = loongson2_cpu_setup,
155 .init = loongson2_init,
156 .exit = loongson2_exit,
157 .cpu_start = loongson2_cpu_start,
158 .cpu_stop = loongson2_cpu_stop,
159 .cpu_type = LOONGSON2_CPU_TYPE,
160 .num_counters = 2
161};