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Michal Simek89272a52009-03-27 14:25:22 +01001/*
2 * Early printk support for Microblaze.
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2003-2006 Yasushi SHOJI <yashi@atmark-techno.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/console.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/string.h>
17#include <linux/tty.h>
18#include <linux/io.h>
19#include <asm/processor.h>
20#include <linux/fcntl.h>
21#include <asm/setup.h>
22#include <asm/prom.h>
23
24static u32 early_console_initialized;
25static u32 base_addr;
26
Michal Simek51f5fa52010-09-28 16:40:00 +100027#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
Michal Simek2af9ebe2010-09-28 16:33:53 +100028static void early_printk_uartlite_putc(char c)
Michal Simek89272a52009-03-27 14:25:22 +010029{
30 /*
31 * Limit how many times we'll spin waiting for TX FIFO status.
32 * This will prevent lockups if the base address is incorrectly
33 * set, or any other issue on the UARTLITE.
34 * This limit is pretty arbitrary, unless we are at about 10 baud
35 * we'll never timeout on a working UART.
36 */
37
Michal Simekca12adc2011-04-06 13:06:45 +020038 unsigned retries = 1000000;
Michal Simek89272a52009-03-27 14:25:22 +010039 /* read status bit - 0x8 offset */
Roel Kluin6e60c142009-04-16 22:49:17 +020040 while (--retries && (in_be32(base_addr + 8) & (1 << 3)))
Michal Simek89272a52009-03-27 14:25:22 +010041 ;
42
43 /* Only attempt the iowrite if we didn't timeout */
44 /* write to TX_FIFO - 0x4 offset */
45 if (retries)
46 out_be32(base_addr + 4, c & 0xff);
47}
48
Michal Simek2af9ebe2010-09-28 16:33:53 +100049static void early_printk_uartlite_write(struct console *unused,
Michal Simek89272a52009-03-27 14:25:22 +010050 const char *s, unsigned n)
51{
52 while (*s && n-- > 0) {
Michal Simek89272a52009-03-27 14:25:22 +010053 if (*s == '\n')
Michal Simek2af9ebe2010-09-28 16:33:53 +100054 early_printk_uartlite_putc('\r');
Michal Simeka8c2e552011-11-10 13:40:08 +010055 early_printk_uartlite_putc(*s);
Michal Simek89272a52009-03-27 14:25:22 +010056 s++;
57 }
58}
59
Michal Simek2af9ebe2010-09-28 16:33:53 +100060static struct console early_serial_uartlite_console = {
Michal Simek89272a52009-03-27 14:25:22 +010061 .name = "earlyser",
Michal Simek2af9ebe2010-09-28 16:33:53 +100062 .write = early_printk_uartlite_write,
Michal Simeke721a452011-04-04 15:45:06 +020063 .flags = CON_PRINTBUFFER | CON_BOOT,
Michal Simek89272a52009-03-27 14:25:22 +010064 .index = -1,
65};
Michal Simek51f5fa52010-09-28 16:40:00 +100066#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
Michal Simek89272a52009-03-27 14:25:22 +010067
Michal Simek67f4aaa2010-09-28 16:17:03 +100068#ifdef CONFIG_SERIAL_8250_CONSOLE
69static void early_printk_uart16550_putc(char c)
70{
71 /*
72 * Limit how many times we'll spin waiting for TX FIFO status.
73 * This will prevent lockups if the base address is incorrectly
74 * set, or any other issue on the UARTLITE.
75 * This limit is pretty arbitrary, unless we are at about 10 baud
76 * we'll never timeout on a working UART.
77 */
78
79 #define UART_LSR_TEMT 0x40 /* Transmitter empty */
80 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
81 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
82
83 unsigned retries = 10000;
84
85 while (--retries &&
86 !((in_be32(base_addr + 0x14) & BOTH_EMPTY) == BOTH_EMPTY))
87 ;
88
89 if (retries)
90 out_be32(base_addr, c & 0xff);
91}
92
93static void early_printk_uart16550_write(struct console *unused,
94 const char *s, unsigned n)
95{
96 while (*s && n-- > 0) {
Michal Simek67f4aaa2010-09-28 16:17:03 +100097 if (*s == '\n')
98 early_printk_uart16550_putc('\r');
Michal Simeka8c2e552011-11-10 13:40:08 +010099 early_printk_uart16550_putc(*s);
Michal Simek67f4aaa2010-09-28 16:17:03 +1000100 s++;
101 }
102}
103
104static struct console early_serial_uart16550_console = {
105 .name = "earlyser",
106 .write = early_printk_uart16550_write,
Michal Simeke721a452011-04-04 15:45:06 +0200107 .flags = CON_PRINTBUFFER | CON_BOOT,
Michal Simek67f4aaa2010-09-28 16:17:03 +1000108 .index = -1,
109};
110#endif /* CONFIG_SERIAL_8250_CONSOLE */
111
Michal Simek9a7e8d82010-09-28 16:38:28 +1000112static struct console *early_console;
Michal Simek89272a52009-03-27 14:25:22 +0100113
114void early_printk(const char *fmt, ...)
115{
116 char buf[512];
117 int n;
118 va_list ap;
119
120 if (early_console_initialized) {
121 va_start(ap, fmt);
122 n = vscnprintf(buf, 512, fmt, ap);
123 early_console->write(early_console, buf, n);
124 va_end(ap);
125 }
126}
127
128int __init setup_early_printk(char *opt)
129{
Michal Simek2aa8e372011-04-14 11:48:43 +0200130 int version = 0;
131
Michal Simek89272a52009-03-27 14:25:22 +0100132 if (early_console_initialized)
133 return 1;
134
Michal Simek2aa8e372011-04-14 11:48:43 +0200135 base_addr = of_early_console(&version);
136 if (base_addr) {
137#ifdef CONFIG_MMU
138 early_console_reg_tlb_alloc(base_addr);
139#endif
140 switch (version) {
Michal Simek51f5fa52010-09-28 16:40:00 +1000141#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
Michal Simek2aa8e372011-04-14 11:48:43 +0200142 case UARTLITE:
Michal Simek6bd55f02012-12-27 10:40:38 +0100143 pr_info("Early console on uartlite at 0x%08x\n",
144 base_addr);
Michal Simek2aa8e372011-04-14 11:48:43 +0200145 early_console = &early_serial_uartlite_console;
146 break;
Michal Simeka43acfb2009-05-26 16:30:10 +0200147#endif
Michal Simek67f4aaa2010-09-28 16:17:03 +1000148#ifdef CONFIG_SERIAL_8250_CONSOLE
Michal Simek2aa8e372011-04-14 11:48:43 +0200149 case UART16550:
Michal Simek6bd55f02012-12-27 10:40:38 +0100150 pr_info("Early console on uart16650 at 0x%08x\n",
151 base_addr);
Michal Simek2aa8e372011-04-14 11:48:43 +0200152 early_console = &early_serial_uart16550_console;
153 break;
Michal Simek67f4aaa2010-09-28 16:17:03 +1000154#endif
Michal Simek2aa8e372011-04-14 11:48:43 +0200155 default:
Michal Simek6bd55f02012-12-27 10:40:38 +0100156 pr_info("Unsupported early console %d\n",
Michal Simek2aa8e372011-04-14 11:48:43 +0200157 version);
158 return 1;
159 }
Michal Simek67f4aaa2010-09-28 16:17:03 +1000160
Michal Simeke721a452011-04-04 15:45:06 +0200161 register_console(early_console);
Michal Simek2aa8e372011-04-14 11:48:43 +0200162 early_console_initialized = 1;
Michal Simek67f4aaa2010-09-28 16:17:03 +1000163 return 0;
164 }
Michal Simek51f5fa52010-09-28 16:40:00 +1000165 return 1;
Michal Simek89272a52009-03-27 14:25:22 +0100166}
167
Michal Simeke721a452011-04-04 15:45:06 +0200168/* Remap early console to virtual address and do not allocate one TLB
169 * only for early console because of performance degression */
170void __init remap_early_printk(void)
171{
172 if (!early_console_initialized || !early_console)
173 return;
Michal Simek6bd55f02012-12-27 10:40:38 +0100174 pr_info("early_printk_console remapping from 0x%x to ", base_addr);
Michal Simeke721a452011-04-04 15:45:06 +0200175 base_addr = (u32) ioremap(base_addr, PAGE_SIZE);
Michal Simek6bd55f02012-12-27 10:40:38 +0100176 pr_cont("0x%x\n", base_addr);
Michal Simeke02db0a2010-02-08 16:41:38 +0100177
Michal Simek0fc73742012-04-02 12:50:54 +0200178#ifdef CONFIG_MMU
Michal Simeke02db0a2010-02-08 16:41:38 +0100179 /*
180 * Early console is on the top of skipped TLB entries
181 * decrease tlb_skip size ensure that hardcoded TLB entry will be
182 * used by generic algorithm
183 * FIXME check if early console mapping is on the top by rereading
184 * TLB entry and compare baseaddr
185 * mts rtlbx, (tlb_skip - 1)
186 * nop
187 * mfs rX, rtlblo
188 * nop
189 * cmp rX, orig_base_addr
190 */
191 tlb_skip -= 1;
Michal Simek0fc73742012-04-02 12:50:54 +0200192#endif
Michal Simeke721a452011-04-04 15:45:06 +0200193}
194
Michal Simek89272a52009-03-27 14:25:22 +0100195void __init disable_early_printk(void)
196{
197 if (!early_console_initialized || !early_console)
198 return;
Michal Simek6bd55f02012-12-27 10:40:38 +0100199 pr_warn("disabling early console\n");
Michal Simek89272a52009-03-27 14:25:22 +0100200 unregister_console(early_console);
201 early_console_initialized = 0;
202}