Josef Gajdusek | 1fcbe42 | 2014-06-06 14:36:02 -0700 | [diff] [blame] | 1 | /* |
| 2 | * SPI Driver for Microchip MCP795 RTC |
| 3 | * |
| 4 | * Copyright (C) Josef Gajdusek <atx@atx.name> |
| 5 | * |
| 6 | * based on other Linux RTC drivers |
| 7 | * |
| 8 | * Device datasheet: |
| 9 | * http://ww1.microchip.com/downloads/en/DeviceDoc/22280A.pdf |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | * |
| 15 | * */ |
| 16 | |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/device.h> |
| 20 | #include <linux/printk.h> |
| 21 | #include <linux/spi/spi.h> |
| 22 | #include <linux/rtc.h> |
Emil Bartczak | 7f8a589 | 2016-03-21 01:06:10 +0100 | [diff] [blame] | 23 | #include <linux/of.h> |
Josef Gajdusek | 1fcbe42 | 2014-06-06 14:36:02 -0700 | [diff] [blame] | 24 | |
| 25 | /* MCP795 Instructions, see datasheet table 3-1 */ |
| 26 | #define MCP795_EEREAD 0x03 |
| 27 | #define MCP795_EEWRITE 0x02 |
| 28 | #define MCP795_EEWRDI 0x04 |
| 29 | #define MCP795_EEWREN 0x06 |
| 30 | #define MCP795_SRREAD 0x05 |
| 31 | #define MCP795_SRWRITE 0x01 |
| 32 | #define MCP795_READ 0x13 |
| 33 | #define MCP795_WRITE 0x12 |
| 34 | #define MCP795_UNLOCK 0x14 |
| 35 | #define MCP795_IDWRITE 0x32 |
| 36 | #define MCP795_IDREAD 0x33 |
| 37 | #define MCP795_CLRWDT 0x44 |
| 38 | #define MCP795_CLRRAM 0x54 |
| 39 | |
| 40 | #define MCP795_ST_BIT 0x80 |
| 41 | #define MCP795_24_BIT 0x40 |
| 42 | |
| 43 | static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count) |
| 44 | { |
| 45 | struct spi_device *spi = to_spi_device(dev); |
| 46 | int ret; |
| 47 | u8 tx[2]; |
| 48 | |
| 49 | tx[0] = MCP795_READ; |
| 50 | tx[1] = addr; |
| 51 | ret = spi_write_then_read(spi, tx, sizeof(tx), buf, count); |
| 52 | |
| 53 | if (ret) |
| 54 | dev_err(dev, "Failed reading %d bytes from address %x.\n", |
| 55 | count, addr); |
| 56 | |
| 57 | return ret; |
| 58 | } |
| 59 | |
| 60 | static int mcp795_rtcc_write(struct device *dev, u8 addr, u8 *data, u8 count) |
| 61 | { |
| 62 | struct spi_device *spi = to_spi_device(dev); |
| 63 | int ret; |
| 64 | u8 tx[2 + count]; |
| 65 | |
| 66 | tx[0] = MCP795_WRITE; |
| 67 | tx[1] = addr; |
| 68 | memcpy(&tx[2], data, count); |
| 69 | |
| 70 | ret = spi_write(spi, tx, 2 + count); |
| 71 | |
| 72 | if (ret) |
| 73 | dev_err(dev, "Failed to write %d bytes to address %x.\n", |
| 74 | count, addr); |
| 75 | |
| 76 | return ret; |
| 77 | } |
| 78 | |
| 79 | static int mcp795_rtcc_set_bits(struct device *dev, u8 addr, u8 mask, u8 state) |
| 80 | { |
| 81 | int ret; |
| 82 | u8 tmp; |
| 83 | |
| 84 | ret = mcp795_rtcc_read(dev, addr, &tmp, 1); |
| 85 | if (ret) |
| 86 | return ret; |
| 87 | |
| 88 | if ((tmp & mask) != state) { |
| 89 | tmp = (tmp & ~mask) | state; |
| 90 | ret = mcp795_rtcc_write(dev, addr, &tmp, 1); |
| 91 | } |
| 92 | |
| 93 | return ret; |
| 94 | } |
| 95 | |
| 96 | static int mcp795_set_time(struct device *dev, struct rtc_time *tim) |
| 97 | { |
| 98 | int ret; |
| 99 | u8 data[7]; |
| 100 | |
| 101 | /* Read first, so we can leave config bits untouched */ |
| 102 | ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data)); |
| 103 | |
| 104 | if (ret) |
| 105 | return ret; |
| 106 | |
| 107 | data[0] = (data[0] & 0x80) | ((tim->tm_sec / 10) << 4) | (tim->tm_sec % 10); |
| 108 | data[1] = (data[1] & 0x80) | ((tim->tm_min / 10) << 4) | (tim->tm_min % 10); |
| 109 | data[2] = ((tim->tm_hour / 10) << 4) | (tim->tm_hour % 10); |
| 110 | data[4] = ((tim->tm_mday / 10) << 4) | ((tim->tm_mday) % 10); |
| 111 | data[5] = (data[5] & 0x10) | (tim->tm_mon / 10) | (tim->tm_mon % 10); |
| 112 | |
| 113 | if (tim->tm_year > 100) |
| 114 | tim->tm_year -= 100; |
| 115 | |
| 116 | data[6] = ((tim->tm_year / 10) << 4) | (tim->tm_year % 10); |
| 117 | |
| 118 | ret = mcp795_rtcc_write(dev, 0x01, data, sizeof(data)); |
| 119 | |
| 120 | if (ret) |
| 121 | return ret; |
| 122 | |
| 123 | dev_dbg(dev, "Set mcp795: %04d-%02d-%02d %02d:%02d:%02d\n", |
| 124 | tim->tm_year + 1900, tim->tm_mon, tim->tm_mday, |
| 125 | tim->tm_hour, tim->tm_min, tim->tm_sec); |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | static int mcp795_read_time(struct device *dev, struct rtc_time *tim) |
| 131 | { |
| 132 | int ret; |
| 133 | u8 data[7]; |
| 134 | |
| 135 | ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data)); |
| 136 | |
| 137 | if (ret) |
| 138 | return ret; |
| 139 | |
| 140 | tim->tm_sec = ((data[0] & 0x70) >> 4) * 10 + (data[0] & 0x0f); |
| 141 | tim->tm_min = ((data[1] & 0x70) >> 4) * 10 + (data[1] & 0x0f); |
| 142 | tim->tm_hour = ((data[2] & 0x30) >> 4) * 10 + (data[2] & 0x0f); |
| 143 | tim->tm_mday = ((data[4] & 0x30) >> 4) * 10 + (data[4] & 0x0f); |
| 144 | tim->tm_mon = ((data[5] & 0x10) >> 4) * 10 + (data[5] & 0x0f); |
| 145 | tim->tm_year = ((data[6] & 0xf0) >> 4) * 10 + (data[6] & 0x0f) + 100; /* Assume we are in 20xx */ |
| 146 | |
| 147 | dev_dbg(dev, "Read from mcp795: %04d-%02d-%02d %02d:%02d:%02d\n", |
| 148 | tim->tm_year + 1900, tim->tm_mon, tim->tm_mday, |
| 149 | tim->tm_hour, tim->tm_min, tim->tm_sec); |
| 150 | |
| 151 | return rtc_valid_tm(tim); |
| 152 | } |
| 153 | |
Julia Lawall | 34c7b3a | 2016-08-31 10:05:25 +0200 | [diff] [blame] | 154 | static const struct rtc_class_ops mcp795_rtc_ops = { |
Josef Gajdusek | 1fcbe42 | 2014-06-06 14:36:02 -0700 | [diff] [blame] | 155 | .read_time = mcp795_read_time, |
| 156 | .set_time = mcp795_set_time |
| 157 | }; |
| 158 | |
| 159 | static int mcp795_probe(struct spi_device *spi) |
| 160 | { |
| 161 | struct rtc_device *rtc; |
| 162 | int ret; |
| 163 | |
| 164 | spi->mode = SPI_MODE_0; |
| 165 | spi->bits_per_word = 8; |
| 166 | ret = spi_setup(spi); |
| 167 | if (ret) { |
| 168 | dev_err(&spi->dev, "Unable to setup SPI\n"); |
| 169 | return ret; |
| 170 | } |
| 171 | |
| 172 | /* Start the oscillator */ |
| 173 | mcp795_rtcc_set_bits(&spi->dev, 0x01, MCP795_ST_BIT, MCP795_ST_BIT); |
| 174 | /* Clear the 12 hour mode flag*/ |
| 175 | mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0); |
| 176 | |
| 177 | rtc = devm_rtc_device_register(&spi->dev, "rtc-mcp795", |
| 178 | &mcp795_rtc_ops, THIS_MODULE); |
| 179 | if (IS_ERR(rtc)) |
| 180 | return PTR_ERR(rtc); |
| 181 | |
| 182 | spi_set_drvdata(spi, rtc); |
| 183 | |
| 184 | return 0; |
| 185 | } |
| 186 | |
Emil Bartczak | 7f8a589 | 2016-03-21 01:06:10 +0100 | [diff] [blame] | 187 | #ifdef CONFIG_OF |
| 188 | static const struct of_device_id mcp795_of_match[] = { |
| 189 | { .compatible = "maxim,mcp795" }, |
| 190 | { } |
| 191 | }; |
| 192 | MODULE_DEVICE_TABLE(of, mcp795_of_match); |
| 193 | #endif |
| 194 | |
Josef Gajdusek | 1fcbe42 | 2014-06-06 14:36:02 -0700 | [diff] [blame] | 195 | static struct spi_driver mcp795_driver = { |
| 196 | .driver = { |
| 197 | .name = "rtc-mcp795", |
Emil Bartczak | 7f8a589 | 2016-03-21 01:06:10 +0100 | [diff] [blame] | 198 | .of_match_table = of_match_ptr(mcp795_of_match), |
Josef Gajdusek | 1fcbe42 | 2014-06-06 14:36:02 -0700 | [diff] [blame] | 199 | }, |
| 200 | .probe = mcp795_probe, |
| 201 | }; |
| 202 | |
| 203 | module_spi_driver(mcp795_driver); |
| 204 | |
| 205 | MODULE_DESCRIPTION("MCP795 RTC SPI Driver"); |
| 206 | MODULE_AUTHOR("Josef Gajdusek <atx@atx.name>"); |
| 207 | MODULE_LICENSE("GPL"); |
| 208 | MODULE_ALIAS("spi:mcp795"); |