| Will Deacon | 7158627 | 2013-11-05 18:10:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 ARM Ltd. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | */ |
| 16 | #ifndef __ASM_PERCPU_H |
| 17 | #define __ASM_PERCPU_H |
| 18 | |
| 19 | static inline void set_my_cpu_offset(unsigned long off) |
| 20 | { |
| 21 | asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory"); |
| 22 | } |
| 23 | |
| 24 | static inline unsigned long __my_cpu_offset(void) |
| 25 | { |
| 26 | unsigned long off; |
| 27 | register unsigned long *sp asm ("sp"); |
| 28 | |
| 29 | /* |
| 30 | * We want to allow caching the value, so avoid using volatile and |
| 31 | * instead use a fake stack read to hazard against barrier(). |
| 32 | */ |
| 33 | asm("mrs %0, tpidr_el1" : "=r" (off) : "Q" (*sp)); |
| 34 | |
| 35 | return off; |
| 36 | } |
| 37 | #define __my_cpu_offset __my_cpu_offset() |
| 38 | |
| 39 | #include <asm-generic/percpu.h> |
| 40 | |
| 41 | #endif /* __ASM_PERCPU_H */ |