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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-sh/cpu-sh3/cache.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH3_CACHE_H
11#define __ASM_CPU_SH3_CACHE_H
12
13#define L1_CACHE_SHIFT 4
14
Paul Mundt8d5fb292007-11-08 18:44:09 +090015#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
19
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#define CCR 0xffffffec /* Address of Cache Control Register */
21
22#define CCR_CACHE_CE 0x01 /* Cache Enable */
23#define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */
24#define CCR_CACHE_CB 0x04 /* Write-Back (for P1) (else writethrough) */
25#define CCR_CACHE_CF 0x08 /* Cache Flush */
26#define CCR_CACHE_ORA 0x20 /* RAM mode */
27
28#define CACHE_OC_ADDRESS_ARRAY 0xf0000000
29#define CACHE_PHYSADDR_MASK 0x1ffffc00
30
31#define CCR_CACHE_ENABLE CCR_CACHE_CE
32#define CCR_CACHE_INVALIDATE CCR_CACHE_CF
33
Markus Brunner3ea6bc32007-08-20 08:59:33 +090034#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7710) || \
Yoshihiro Shimoda31a49c42007-12-26 11:45:06 +090036 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
37 defined(CONFIG_CPU_SUBTYPE_SH7721)
Paul Mundtcc645a02008-02-14 15:09:27 +090038#define CCR3_REG 0xa40000b4
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#define CCR_CACHE_16KB 0x00010000
40#define CCR_CACHE_32KB 0x00020000
41#endif
42
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#endif /* __ASM_CPU_SH3_CACHE_H */