blob: ab4037222f8dc07f0bd9c49699d1677196195330 [file] [log] [blame]
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +00001/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
Anish Bhattce100b8b2014-06-19 21:37:15 -07004 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +00005 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
Hariprasad Shenai94cdb8b2016-08-17 12:33:03 +053035#ifndef __CXGB4_ULD_H
36#define __CXGB4_ULD_H
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +000037
38#include <linux/cache.h>
39#include <linux/spinlock.h>
40#include <linux/skbuff.h>
Vipul Pandya793dad92012-12-10 09:30:56 +000041#include <linux/inetdevice.h>
Arun Sharma600634972011-07-26 16:09:06 -070042#include <linux/atomic.h>
Hariprasad S27999802015-09-23 17:19:26 +053043#include "cxgb4.h"
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +000044
45/* CPL message priority levels */
46enum {
47 CPL_PRIORITY_DATA = 0, /* data messages */
48 CPL_PRIORITY_SETUP = 1, /* connection setup messages */
49 CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
50 CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
51 CPL_PRIORITY_ACK = 1, /* RX ACK messages */
52 CPL_PRIORITY_CONTROL = 1 /* control messages */
53};
54
55#define INIT_TP_WR(w, tid) do { \
Hariprasad Shenaie2ac9622014-11-07 09:35:25 +053056 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
57 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
58 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
59 FW_WR_FLOWID_V(tid)); \
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +000060 (w)->wr.wr_lo = cpu_to_be64(0); \
61} while (0)
62
63#define INIT_TP_WR_CPL(w, cpl, tid) do { \
64 INIT_TP_WR(w, tid); \
65 OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
66} while (0)
67
68#define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
Hariprasad Shenaie2ac9622014-11-07 09:35:25 +053069 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
70 FW_WR_ATOMIC_V(atomic)); \
71 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
72 FW_WR_FLOWID_V(tid)); \
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +000073 (w)->wr.wr_lo = cpu_to_be64(0); \
74} while (0)
75
76/* Special asynchronous notification message */
77#define CXGB4_MSG_AN ((void *)1)
78
79struct serv_entry {
80 void *data;
81};
82
83union aopen_entry {
84 void *data;
85 union aopen_entry *next;
86};
87
88/*
89 * Holds the size, base address, free list start, etc of the TID, server TID,
90 * and active-open TID tables. The tables themselves are allocated dynamically.
91 */
92struct tid_info {
93 void **tid_tab;
94 unsigned int ntids;
95
96 struct serv_entry *stid_tab;
97 unsigned long *stid_bmap;
98 unsigned int nstids;
99 unsigned int stid_base;
Hariprasad Shenai9a1bb9f2015-08-12 16:55:05 +0530100 unsigned int hash_base;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000101
102 union aopen_entry *atid_tab;
103 unsigned int natids;
Vipul Pandyaf2b7e782012-12-10 09:30:52 +0000104 unsigned int atid_base;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000105
Vipul Pandyaf2b7e782012-12-10 09:30:52 +0000106 struct filter_entry *ftid_tab;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000107 unsigned int nftids;
108 unsigned int ftid_base;
Vipul Pandya636f9d32012-09-26 02:39:39 +0000109 unsigned int aftid_base;
110 unsigned int aftid_end;
Vipul Pandya9a4da2c2012-10-19 02:09:53 +0000111 /* Server filter region */
112 unsigned int sftid_base;
113 unsigned int nsftids;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000114
115 spinlock_t atid_lock ____cacheline_aligned_in_smp;
116 union aopen_entry *afree;
117 unsigned int atids_in_use;
118
119 spinlock_t stid_lock;
120 unsigned int stids_in_use;
Hariprasad Shenai2248b292015-08-12 16:55:06 +0530121 unsigned int sftids_in_use;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000122
Hariprasad Shenai9a1bb9f2015-08-12 16:55:05 +0530123 /* TIDs in the TCAM */
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000124 atomic_t tids_in_use;
Hariprasad Shenai9a1bb9f2015-08-12 16:55:05 +0530125 /* TIDs in the HASH */
126 atomic_t hash_tids_in_use;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000127};
128
129static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
130{
131 return tid < t->ntids ? t->tid_tab[tid] : NULL;
132}
133
134static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
135{
136 return atid < t->natids ? t->atid_tab[atid].data : NULL;
137}
138
139static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
140{
Kumar Sanghvi470c60c2013-12-18 16:38:21 +0530141 /* Is it a server filter TID? */
142 if (t->nsftids && (stid >= t->sftid_base)) {
143 stid -= t->sftid_base;
144 stid += t->nstids;
145 } else {
146 stid -= t->stid_base;
147 }
148
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000149 return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000150}
151
152static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
153 unsigned int tid)
154{
155 t->tid_tab[tid] = data;
Hariprasad Shenai9a1bb9f2015-08-12 16:55:05 +0530156 if (t->hash_base && (tid >= t->hash_base))
157 atomic_inc(&t->hash_tids_in_use);
158 else
159 atomic_inc(&t->tids_in_use);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000160}
161
162int cxgb4_alloc_atid(struct tid_info *t, void *data);
163int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000164int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000165void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
166void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
167void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000168
169struct in6_addr;
170
171int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
Vipul Pandya793dad92012-12-10 09:30:56 +0000172 __be32 sip, __be16 sport, __be16 vlan,
173 unsigned int queue);
Vipul Pandya80f40c12013-07-04 16:10:45 +0530174int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
175 const struct in6_addr *sip, __be16 sport,
176 unsigned int queue);
177int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
178 unsigned int queue, bool ipv6);
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000179int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
Vipul Pandya793dad92012-12-10 09:30:56 +0000180 __be32 sip, __be16 sport, __be16 vlan,
181 unsigned int queue,
182 unsigned char port, unsigned char mask);
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000183int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
184 unsigned int queue, bool ipv6);
Anish Bhatta3e3b282014-07-17 00:18:16 -0700185
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000186static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
187{
188 skb_set_queue_mapping(skb, (queue << 1) | prio);
189}
190
191enum cxgb4_uld {
192 CXGB4_ULD_RDMA,
193 CXGB4_ULD_ISCSI,
Varun Prakash2fddfb82016-02-14 23:02:39 +0530194 CXGB4_ULD_ISCSIT,
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000195 CXGB4_ULD_MAX
196};
197
198enum cxgb4_state {
199 CXGB4_STATE_UP,
200 CXGB4_STATE_START_RECOVERY,
201 CXGB4_STATE_DOWN,
202 CXGB4_STATE_DETACH
203};
204
Vipul Pandya881806b2012-05-18 15:29:24 +0530205enum cxgb4_control {
206 CXGB4_CONTROL_DB_FULL,
207 CXGB4_CONTROL_DB_EMPTY,
208 CXGB4_CONTROL_DB_DROP,
209};
210
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000211struct pci_dev;
212struct l2t_data;
213struct net_device;
214struct pkt_gl;
215struct tp_tcp_stats;
Varun Prakash2337ba42016-02-14 23:02:41 +0530216struct t4_lro_mgr;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000217
218struct cxgb4_range {
219 unsigned int start;
220 unsigned int size;
221};
222
223struct cxgb4_virt_res { /* virtualized HW resources */
224 struct cxgb4_range ddp;
225 struct cxgb4_range iscsi;
226 struct cxgb4_range stag;
227 struct cxgb4_range rq;
228 struct cxgb4_range pbl;
Dimitris Michailidisa0881ca2010-06-18 10:05:34 +0000229 struct cxgb4_range qp;
230 struct cxgb4_range cq;
Dimitris Michailidis1ae970e2010-08-02 13:19:19 +0000231 struct cxgb4_range ocq;
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000232};
233
Dimitris Michailidis1ae970e2010-08-02 13:19:19 +0000234#define OCQ_WIN_OFFSET(pdev, vres) \
235 (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
236
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000237/*
238 * Block of information the LLD provides to ULDs attaching to a device.
239 */
240struct cxgb4_lld_info {
241 struct pci_dev *pdev; /* associated PCI device */
242 struct l2t_data *l2t; /* L2 table */
243 struct tid_info *tids; /* TID table */
244 struct net_device **ports; /* device ports */
245 const struct cxgb4_virt_res *vr; /* assorted HW resources */
246 const unsigned short *mtus; /* MTU table */
247 const unsigned short *rxq_ids; /* the ULD's Rx queue ids */
Hariprasad Shenaicf38be62014-06-06 21:40:42 +0530248 const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000249 unsigned short nrxq; /* # of Rx queues */
250 unsigned short ntxq; /* # of Tx queues */
Hariprasad Shenaicf38be62014-06-06 21:40:42 +0530251 unsigned short nciq; /* # of concentrator IQ */
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000252 unsigned char nchan:4; /* # of channels */
253 unsigned char nports:4; /* # of ports */
254 unsigned char wr_cred; /* WR 16-byte credits */
255 unsigned char adapter_type; /* type of adapter */
256 unsigned char fw_api_ver; /* FW API version */
257 unsigned int fw_vers; /* FW version */
258 unsigned int iscsi_iolen; /* iSCSI max I/O length */
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +0530259 unsigned int cclk_ps; /* Core clock period in psec */
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000260 unsigned short udb_density; /* # of user DB/page */
261 unsigned short ucq_density; /* # of user CQs/page */
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000262 unsigned short filt_mode; /* filter optional components */
263 unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */
264 /* scheduler queue */
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000265 void __iomem *gts_reg; /* address of GTS register */
266 void __iomem *db_reg; /* address of kernel doorbell */
Vipul Pandya3069ee92012-05-18 15:29:26 +0530267 int dbfifo_int_thresh; /* doorbell fifo int threshold */
Hariprasad Shenai04e10e22014-07-14 21:34:51 +0530268 unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */
269 unsigned int sge_egrstatuspagesize; /* SGE egress status page size */
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000270 unsigned int sge_pktshift; /* Padding between CPL and */
271 /* packet data */
Hariprasad Shenai35b1de52014-06-27 19:23:47 +0530272 unsigned int pf; /* Physical Function we're using */
Vipul Pandyadca4fae2012-12-10 09:30:53 +0000273 bool enable_fw_ofld_conn; /* Enable connection through fw */
274 /* WR */
Hariprasad Shenai4c2c5762014-07-14 21:34:52 +0530275 unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */
276 unsigned int max_ird_adapter; /* Max IRD memory per adapter */
Kumar Sanghvi1ac0f092014-02-18 17:56:12 +0530277 bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
Varun Prakash7714cb9e2016-02-14 23:07:39 +0530278 unsigned int iscsi_tagmask; /* iscsi ddp tag mask */
279 unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */
280 unsigned int iscsi_llimit; /* chip's iscsi region llimit */
281 void **iscsi_ppm; /* iscsi page pod manager */
Hariprasad Shenai982b81e2015-05-05 14:59:54 +0530282 int nodeid; /* device numa node id */
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000283};
284
285struct cxgb4_uld_info {
286 const char *name;
287 void *(*add)(const struct cxgb4_lld_info *p);
288 int (*rx_handler)(void *handle, const __be64 *rsp,
289 const struct pkt_gl *gl);
290 int (*state_change)(void *handle, enum cxgb4_state new_state);
Vipul Pandya3069ee92012-05-18 15:29:26 +0530291 int (*control)(void *handle, enum cxgb4_control control, ...);
Varun Prakash2337ba42016-02-14 23:02:41 +0530292 int (*lro_rx_handler)(void *handle, const __be64 *rsp,
293 const struct pkt_gl *gl,
294 struct t4_lro_mgr *lro_mgr,
295 struct napi_struct *napi);
296 void (*lro_flush)(struct t4_lro_mgr *);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000297};
298
Hariprasad Shenai94cdb8b2016-08-17 12:33:03 +0530299enum cxgb4_pci_uld {
300 CXGB4_PCI_ULD1,
301 CXGB4_PCI_ULD_MAX
302};
303
304struct cxgb4_pci_uld_info {
305 const char *name;
306 bool lro;
307 void *handle;
308 unsigned int nrxq;
309 unsigned int nciq;
310 unsigned int rxq_size;
311 unsigned int ciq_size;
312 void *(*add)(const struct cxgb4_lld_info *p);
313 int (*rx_handler)(void *handle, const __be64 *rsp,
314 const struct pkt_gl *gl);
315 int (*state_change)(void *handle, enum cxgb4_state new_state);
316 int (*control)(void *handle, enum cxgb4_control control, ...);
317 int (*lro_rx_handler)(void *handle, const __be64 *rsp,
318 const struct pkt_gl *gl,
319 struct t4_lro_mgr *lro_mgr,
320 struct napi_struct *napi);
321 void (*lro_flush)(struct t4_lro_mgr *);
322};
323
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000324int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
325int cxgb4_unregister_uld(enum cxgb4_uld type);
Hariprasad Shenai94cdb8b2016-08-17 12:33:03 +0530326int cxgb4_register_pci_uld(enum cxgb4_pci_uld type,
327 struct cxgb4_pci_uld_info *p);
328int cxgb4_unregister_pci_uld(enum cxgb4_pci_uld type);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000329int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
Vipul Pandya881806b2012-05-18 15:29:24 +0530330unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000331unsigned int cxgb4_port_chan(const struct net_device *dev);
332unsigned int cxgb4_port_viid(const struct net_device *dev);
Hariprasad S27999802015-09-23 17:19:26 +0530333unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000334unsigned int cxgb4_port_idx(const struct net_device *dev);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000335unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
336 unsigned int *idx);
Hariprasad Shenai92e7ae72014-06-06 21:40:43 +0530337unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
338 unsigned short header_size,
339 unsigned short data_size_max,
340 unsigned short data_size_align,
341 unsigned int *mtu_idxp);
Dimitris Michailidis625ba2c2010-04-01 15:28:25 +0000342void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
343 struct tp_tcp_stats *v6);
344void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
345 const unsigned int *pgsz_order);
346struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
347 unsigned int skb_len, unsigned int pull_len);
Vipul Pandya3069ee92012-05-18 15:29:26 +0530348int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
349int cxgb4_flush_eq_cache(struct net_device *dev);
Hariprasad Shenai031cf472014-07-14 21:34:53 +0530350int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +0530351u64 cxgb4_read_sge_timestamp(struct net_device *dev);
Vipul Pandya3cbdb922013-03-14 05:08:59 +0000352
Hariprasad Shenaidf64e4d2014-12-03 19:32:53 +0530353enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS };
354int cxgb4_bar2_sge_qregs(struct net_device *dev,
355 unsigned int qid,
356 enum cxgb4_bar2_qtype qtype,
Hariprasad S66cf1882015-06-09 18:23:11 +0530357 int user,
Hariprasad Shenaidf64e4d2014-12-03 19:32:53 +0530358 u64 *pbar2_qoffset,
359 unsigned int *pbar2_qid);
360
Hariprasad Shenai94cdb8b2016-08-17 12:33:03 +0530361#endif /* !__CXGB4_ULD_H */