| Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 1 | /* |
| 2 | * SMP support: Entry point for secondary CPUs |
| 3 | * |
| 4 | * Copyright (C) 2012 Marvell |
| 5 | * |
| 6 | * Yehuda Yitschak <yehuday@marvell.com> |
| 7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> |
| 8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| 9 | * |
| 10 | * This file is licensed under the terms of the GNU General Public |
| 11 | * License version 2. This program is licensed "as is" without any |
| 12 | * warranty of any kind, whether express or implied. |
| 13 | * |
| 14 | * This file implements the assembly entry point for secondary CPUs in |
| 15 | * an SMP kernel. The only thing we need to do is to add the CPU to |
| 16 | * the coherency fabric by writing to 2 registers. Currently the base |
| 17 | * register addresses are hard coded due to the early initialisation |
| 18 | * problems. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/linkage.h> |
| 22 | #include <linux/init.h> |
| 23 | |
| 24 | /* |
| 25 | * At this stage the secondary CPUs don't have acces yet to the MMU, so |
| 26 | * we have to provide physical addresses |
| 27 | */ |
| 28 | #define ARMADA_XP_CFB_BASE 0xD0020200 |
| 29 | |
| 30 | __CPUINIT |
| 31 | |
| 32 | /* |
| 33 | * Armada XP specific entry point for secondary CPUs. |
| 34 | * We add the CPU to the coherency fabric and then jump to secondary |
| 35 | * startup |
| 36 | */ |
| 37 | ENTRY(armada_xp_secondary_startup) |
| 38 | |
| 39 | /* Read CPU id */ |
| 40 | mrc p15, 0, r1, c0, c0, 5 |
| 41 | and r1, r1, #0xF |
| 42 | |
| 43 | /* Add CPU to coherency fabric */ |
| 44 | ldr r0, =ARMADA_XP_CFB_BASE |
| 45 | |
| 46 | bl ll_set_cpu_coherent |
| 47 | b secondary_startup |
| 48 | |
| 49 | ENDPROC(armada_xp_secondary_startup) |