blob: 4f25a7d0efa2aa952deeddf0ff027707b4b657f2 [file] [log] [blame]
Dan Murphy5df7f712014-07-14 15:10:45 -05001/*
2 * tas2552.c - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier
3 *
4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Dan Murphy <dmurphy@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#include <linux/module.h>
19#include <linux/errno.h>
20#include <linux/device.h>
21#include <linux/i2c.h>
22#include <linux/gpio.h>
23#include <linux/of_gpio.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
26#include <linux/slab.h>
27
28#include <linux/gpio/consumer.h>
29#include <linux/regulator/consumer.h>
30
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/tlv.h>
36#include <sound/tas2552-plat.h>
Peter Ujfalusi9d87a882015-06-04 16:04:22 +030037#include <dt-bindings/sound/tas2552.h>
Dan Murphy5df7f712014-07-14 15:10:45 -050038
39#include "tas2552.h"
40
41static struct reg_default tas2552_reg_defs[] = {
42 {TAS2552_CFG_1, 0x22},
43 {TAS2552_CFG_3, 0x80},
44 {TAS2552_DOUT, 0x00},
45 {TAS2552_OUTPUT_DATA, 0xc0},
46 {TAS2552_PDM_CFG, 0x01},
47 {TAS2552_PGA_GAIN, 0x00},
Peter Ujfalusi2a9dd1d2015-06-08 15:19:51 +030048 {TAS2552_BOOST_APT_CTRL, 0x0f},
Peter Ujfalusi7d785022015-06-04 16:04:28 +030049 {TAS2552_RESERVED_0D, 0xbe},
Dan Murphy5df7f712014-07-14 15:10:45 -050050 {TAS2552_LIMIT_RATE_HYS, 0x08},
51 {TAS2552_CFG_2, 0xef},
52 {TAS2552_SER_CTRL_1, 0x00},
53 {TAS2552_SER_CTRL_2, 0x00},
54 {TAS2552_PLL_CTRL_1, 0x10},
55 {TAS2552_PLL_CTRL_2, 0x00},
56 {TAS2552_PLL_CTRL_3, 0x00},
57 {TAS2552_BTIP, 0x8f},
58 {TAS2552_BTS_CTRL, 0x80},
59 {TAS2552_LIMIT_RELEASE, 0x04},
60 {TAS2552_LIMIT_INT_COUNT, 0x00},
61 {TAS2552_EDGE_RATE_CTRL, 0x40},
62 {TAS2552_VBAT_DATA, 0x00},
63};
64
65#define TAS2552_NUM_SUPPLIES 3
66static const char *tas2552_supply_names[TAS2552_NUM_SUPPLIES] = {
67 "vbat", /* vbat voltage */
68 "iovdd", /* I/O Voltage */
69 "avdd", /* Analog DAC Voltage */
70};
71
72struct tas2552_data {
73 struct snd_soc_codec *codec;
74 struct regmap *regmap;
75 struct i2c_client *tas2552_client;
76 struct regulator_bulk_data supplies[TAS2552_NUM_SUPPLIES];
77 struct gpio_desc *enable_gpio;
78 unsigned char regs[TAS2552_VBAT_DATA];
Peter Ujfalusi16bd3952015-06-04 16:04:20 +030079 unsigned int pll_clkin;
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +030080 int pll_clk_id;
Peter Ujfalusi9d87a882015-06-04 16:04:22 +030081 unsigned int pdm_clk;
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +030082 int pdm_clk_id;
Peter Ujfalusi3f747a82015-06-04 16:04:25 +030083
84 unsigned int dai_fmt;
85 unsigned int tdm_delay;
Dan Murphy5df7f712014-07-14 15:10:45 -050086};
87
Peter Ujfalusi7d785022015-06-04 16:04:28 +030088static int tas2552_post_event(struct snd_soc_dapm_widget *w,
89 struct snd_kcontrol *kcontrol, int event)
90{
91 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
92
93 switch (event) {
94 case SND_SOC_DAPM_POST_PMU:
95 snd_soc_write(codec, TAS2552_RESERVED_0D, 0xc0);
96 snd_soc_update_bits(codec, TAS2552_LIMIT_RATE_HYS, (1 << 5),
97 (1 << 5));
98 snd_soc_update_bits(codec, TAS2552_CFG_2, 1, 0);
99 snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_SWS, 0);
100 break;
101 case SND_SOC_DAPM_POST_PMD:
102 snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_SWS,
103 TAS2552_SWS);
104 snd_soc_update_bits(codec, TAS2552_CFG_2, 1, 1);
105 snd_soc_update_bits(codec, TAS2552_LIMIT_RATE_HYS, (1 << 5), 0);
106 snd_soc_write(codec, TAS2552_RESERVED_0D, 0xbe);
107 break;
108 }
109 return 0;
110}
Dan Murphya7a8e992014-08-01 10:57:04 -0500111
Peter Ujfalusi609e7132015-06-04 16:04:26 +0300112/* Input mux controls */
113static const char * const tas2552_input_texts[] = {
114 "Digital", "Analog" };
Dan Murphya7a8e992014-08-01 10:57:04 -0500115static SOC_ENUM_SINGLE_DECL(tas2552_input_mux_enum, TAS2552_CFG_3, 7,
116 tas2552_input_texts);
117
Peter Ujfalusi609e7132015-06-04 16:04:26 +0300118static const struct snd_kcontrol_new tas2552_input_mux_control =
119 SOC_DAPM_ENUM("Route", tas2552_input_mux_enum);
Dan Murphya7a8e992014-08-01 10:57:04 -0500120
121static const struct snd_soc_dapm_widget tas2552_dapm_widgets[] =
122{
123 SND_SOC_DAPM_INPUT("IN"),
124
125 /* MUX Controls */
126 SND_SOC_DAPM_MUX("Input selection", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi609e7132015-06-04 16:04:26 +0300127 &tas2552_input_mux_control),
Dan Murphya7a8e992014-08-01 10:57:04 -0500128
129 SND_SOC_DAPM_AIF_IN("DAC IN", "DAC Playback", 0, SND_SOC_NOPM, 0, 0),
130 SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
131 SND_SOC_DAPM_OUT_DRV("ClassD", TAS2552_CFG_2, 7, 0, NULL, 0),
132 SND_SOC_DAPM_SUPPLY("PLL", TAS2552_CFG_2, 3, 0, NULL, 0),
Peter Ujfalusi7d785022015-06-04 16:04:28 +0300133 SND_SOC_DAPM_POST("Post Event", tas2552_post_event),
Dan Murphya7a8e992014-08-01 10:57:04 -0500134
135 SND_SOC_DAPM_OUTPUT("OUT")
136};
137
138static const struct snd_soc_dapm_route tas2552_audio_map[] = {
139 {"DAC", NULL, "DAC IN"},
140 {"Input selection", "Digital", "DAC"},
141 {"Input selection", "Analog", "IN"},
142 {"ClassD", NULL, "Input selection"},
143 {"OUT", NULL, "ClassD"},
144 {"ClassD", NULL, "PLL"},
145};
146
Rafael J. Wysocki641d3342014-12-13 00:42:18 +0100147#ifdef CONFIG_PM
Peter Ujfalusib94525b2015-06-08 15:19:55 +0300148static void tas2552_sw_shutdown(struct tas2552_data *tas2552, int sw_shutdown)
Dan Murphy5df7f712014-07-14 15:10:45 -0500149{
Peter Ujfalusidd6e3052015-06-04 16:04:19 +0300150 u8 cfg1_reg = 0;
Dan Murphy5df7f712014-07-14 15:10:45 -0500151
Peter Ujfalusib94525b2015-06-08 15:19:55 +0300152 if (!tas2552->codec)
Peter Ujfalusi80ba2662015-06-04 16:04:14 +0300153 return;
154
Dan Murphy5df7f712014-07-14 15:10:45 -0500155 if (sw_shutdown)
Peter Ujfalusi7de544f2015-06-04 16:04:17 +0300156 cfg1_reg = TAS2552_SWS;
Dan Murphy5df7f712014-07-14 15:10:45 -0500157
Peter Ujfalusib94525b2015-06-08 15:19:55 +0300158 snd_soc_update_bits(tas2552->codec, TAS2552_CFG_1, TAS2552_SWS,
Peter Ujfalusi7de544f2015-06-04 16:04:17 +0300159 cfg1_reg);
Dan Murphy5df7f712014-07-14 15:10:45 -0500160}
Thierry Redingbe1aa3e2014-10-02 09:28:00 +0200161#endif
Dan Murphy5df7f712014-07-14 15:10:45 -0500162
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +0300163static int tas2552_setup_pll(struct snd_soc_codec *codec,
164 struct snd_pcm_hw_params *params)
165{
166 struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
167 bool bypass_pll = false;
168 unsigned int pll_clk = params_rate(params) * 512;
169 unsigned int pll_clkin = tas2552->pll_clkin;
170 u8 pll_enable;
171
172 if (!pll_clkin) {
173 if (tas2552->pll_clk_id != TAS2552_PLL_CLKIN_BCLK)
174 return -EINVAL;
175
176 pll_clkin = snd_soc_params_to_bclk(params);
177 pll_clkin += tas2552->tdm_delay;
178 }
179
180 pll_enable = snd_soc_read(codec, TAS2552_CFG_2) & TAS2552_PLL_ENABLE;
181 snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0);
182
183 if (pll_clkin == pll_clk)
184 bypass_pll = true;
185
186 if (bypass_pll) {
187 /* By pass the PLL configuration */
188 snd_soc_update_bits(codec, TAS2552_PLL_CTRL_2,
189 TAS2552_PLL_BYPASS, TAS2552_PLL_BYPASS);
190 } else {
191 /* Fill in the PLL control registers for J & D
192 * pll_clk = (.5 * pll_clkin * J.D) / 2^p
193 * Need to fill in J and D here based on incoming freq
194 */
195 unsigned int d;
196 u8 j;
197 u8 pll_sel = (tas2552->pll_clk_id << 3) & TAS2552_PLL_SRC_MASK;
198 u8 p = snd_soc_read(codec, TAS2552_PLL_CTRL_1);
199
200 p = (p >> 7);
201
202recalc:
203 j = (pll_clk * 2 * (1 << p)) / pll_clkin;
204 d = (pll_clk * 2 * (1 << p)) % pll_clkin;
205 d /= (pll_clkin / 10000);
206
207 if (d && (pll_clkin < 512000 || pll_clkin > 9200000)) {
208 if (tas2552->pll_clk_id == TAS2552_PLL_CLKIN_BCLK) {
209 pll_clkin = 1800000;
210 pll_sel = (TAS2552_PLL_CLKIN_1_8_FIXED << 3) &
211 TAS2552_PLL_SRC_MASK;
212 } else {
213 pll_clkin = snd_soc_params_to_bclk(params);
214 pll_clkin += tas2552->tdm_delay;
215 pll_sel = (TAS2552_PLL_CLKIN_BCLK << 3) &
216 TAS2552_PLL_SRC_MASK;
217 }
218 goto recalc;
219 }
220
221 snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_PLL_SRC_MASK,
222 pll_sel);
223
224 snd_soc_update_bits(codec, TAS2552_PLL_CTRL_1,
225 TAS2552_PLL_J_MASK, j);
226 /* Will clear the PLL_BYPASS bit */
227 snd_soc_write(codec, TAS2552_PLL_CTRL_2,
228 TAS2552_PLL_D_UPPER(d));
229 snd_soc_write(codec, TAS2552_PLL_CTRL_3,
230 TAS2552_PLL_D_LOWER(d));
231 }
232
233 /* Restore PLL status */
234 snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_PLL_ENABLE,
235 pll_enable);
236
237 return 0;
238}
239
Dan Murphy5df7f712014-07-14 15:10:45 -0500240static int tas2552_hw_params(struct snd_pcm_substream *substream,
241 struct snd_pcm_hw_params *params,
242 struct snd_soc_dai *dai)
243{
244 struct snd_soc_codec *codec = dai->codec;
245 struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
Peter Ujfalusid20b0982015-06-04 16:04:29 +0300246 int cpf;
Peter Ujfalusia571cb12015-06-04 16:04:30 +0300247 u8 ser_ctrl1_reg, wclk_rate;
Peter Ujfalusid20b0982015-06-04 16:04:29 +0300248
249 switch (params_width(params)) {
250 case 16:
251 ser_ctrl1_reg = TAS2552_WORDLENGTH_16BIT;
252 cpf = 32 + tas2552->tdm_delay;
253 break;
254 case 20:
255 ser_ctrl1_reg = TAS2552_WORDLENGTH_20BIT;
256 cpf = 64 + tas2552->tdm_delay;
257 break;
258 case 24:
259 ser_ctrl1_reg = TAS2552_WORDLENGTH_24BIT;
260 cpf = 64 + tas2552->tdm_delay;
261 break;
262 case 32:
263 ser_ctrl1_reg = TAS2552_WORDLENGTH_32BIT;
264 cpf = 64 + tas2552->tdm_delay;
265 break;
266 default:
267 dev_err(codec->dev, "Not supported sample size: %d\n",
268 params_width(params));
269 return -EINVAL;
270 }
271
272 if (cpf <= 32)
273 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_32;
274 else if (cpf <= 64)
275 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_64;
276 else if (cpf <= 128)
277 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_128;
278 else
279 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_256;
280
281 snd_soc_update_bits(codec, TAS2552_SER_CTRL_1,
282 TAS2552_WORDLENGTH_MASK | TAS2552_CLKSPERFRAME_MASK,
283 ser_ctrl1_reg);
Dan Murphy5df7f712014-07-14 15:10:45 -0500284
Peter Ujfalusia571cb12015-06-04 16:04:30 +0300285 switch (params_rate(params)) {
286 case 8000:
287 wclk_rate = TAS2552_WCLK_FREQ_8KHZ;
288 break;
289 case 11025:
290 case 12000:
291 wclk_rate = TAS2552_WCLK_FREQ_11_12KHZ;
292 break;
293 case 16000:
294 wclk_rate = TAS2552_WCLK_FREQ_16KHZ;
295 break;
296 case 22050:
297 case 24000:
298 wclk_rate = TAS2552_WCLK_FREQ_22_24KHZ;
299 break;
300 case 32000:
301 wclk_rate = TAS2552_WCLK_FREQ_32KHZ;
302 break;
303 case 44100:
304 case 48000:
305 wclk_rate = TAS2552_WCLK_FREQ_44_48KHZ;
306 break;
307 case 88200:
308 case 96000:
309 wclk_rate = TAS2552_WCLK_FREQ_88_96KHZ;
310 break;
311 case 176400:
312 case 192000:
313 wclk_rate = TAS2552_WCLK_FREQ_176_192KHZ;
314 break;
315 default:
316 dev_err(codec->dev, "Not supported sample rate: %d\n",
317 params_rate(params));
318 return -EINVAL;
319 }
320
321 snd_soc_update_bits(codec, TAS2552_CFG_3, TAS2552_WCLK_FREQ_MASK,
322 wclk_rate);
323
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +0300324 return tas2552_setup_pll(codec, params);
Dan Murphy5df7f712014-07-14 15:10:45 -0500325}
326
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300327#define TAS2552_DAI_FMT_MASK (TAS2552_BCLKDIR | \
328 TAS2552_WCLKDIR | \
329 TAS2552_DATAFORMAT_MASK)
Peter Ujfalusi3f747a82015-06-04 16:04:25 +0300330static int tas2552_prepare(struct snd_pcm_substream *substream,
331 struct snd_soc_dai *dai)
332{
333 struct snd_soc_codec *codec = dai->codec;
334 struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
335 int delay = 0;
336
337 /* TDM slot selection only valid in DSP_A/_B mode */
338 if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_A)
339 delay += (tas2552->tdm_delay + 1);
340 else if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_B)
341 delay += tas2552->tdm_delay;
342
343 /* Configure data delay */
344 snd_soc_write(codec, TAS2552_SER_CTRL_2, delay);
345
346 return 0;
347}
348
Dan Murphy5df7f712014-07-14 15:10:45 -0500349static int tas2552_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
350{
351 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi3f747a82015-06-04 16:04:25 +0300352 struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
Dan Murphy5df7f712014-07-14 15:10:45 -0500353 u8 serial_format;
Dan Murphy5df7f712014-07-14 15:10:45 -0500354
355 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
356 case SND_SOC_DAIFMT_CBS_CFS:
357 serial_format = 0x00;
358 break;
359 case SND_SOC_DAIFMT_CBS_CFM:
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300360 serial_format = TAS2552_WCLKDIR;
Dan Murphy5df7f712014-07-14 15:10:45 -0500361 break;
362 case SND_SOC_DAIFMT_CBM_CFS:
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300363 serial_format = TAS2552_BCLKDIR;
Dan Murphy5df7f712014-07-14 15:10:45 -0500364 break;
365 case SND_SOC_DAIFMT_CBM_CFM:
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300366 serial_format = (TAS2552_BCLKDIR | TAS2552_WCLKDIR);
Dan Murphy5df7f712014-07-14 15:10:45 -0500367 break;
368 default:
369 dev_vdbg(codec->dev, "DAI Format master is not found\n");
370 return -EINVAL;
371 }
372
Peter Ujfalusi4c331372015-06-04 16:04:23 +0300373 switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
374 SND_SOC_DAIFMT_INV_MASK)) {
375 case (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF):
Dan Murphy5df7f712014-07-14 15:10:45 -0500376 break;
Peter Ujfalusi4c331372015-06-04 16:04:23 +0300377 case (SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF):
Peter Ujfalusi4c331372015-06-04 16:04:23 +0300378 case (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF):
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300379 serial_format |= TAS2552_DATAFORMAT_DSP;
Dan Murphy5df7f712014-07-14 15:10:45 -0500380 break;
Peter Ujfalusi4c331372015-06-04 16:04:23 +0300381 case (SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF):
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300382 serial_format |= TAS2552_DATAFORMAT_RIGHT_J;
Dan Murphy5df7f712014-07-14 15:10:45 -0500383 break;
Peter Ujfalusi4c331372015-06-04 16:04:23 +0300384 case (SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF):
Peter Ujfalusi1b68c7d2015-06-04 16:04:24 +0300385 serial_format |= TAS2552_DATAFORMAT_LEFT_J;
Dan Murphy5df7f712014-07-14 15:10:45 -0500386 break;
387 default:
388 dev_vdbg(codec->dev, "DAI Format is not found\n");
389 return -EINVAL;
390 }
Peter Ujfalusi3f747a82015-06-04 16:04:25 +0300391 tas2552->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
Dan Murphy5df7f712014-07-14 15:10:45 -0500392
Peter Ujfalusi4c331372015-06-04 16:04:23 +0300393 snd_soc_update_bits(codec, TAS2552_SER_CTRL_1, TAS2552_DAI_FMT_MASK,
394 serial_format);
Dan Murphy5df7f712014-07-14 15:10:45 -0500395 return 0;
396}
397
398static int tas2552_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
399 unsigned int freq, int dir)
400{
401 struct snd_soc_codec *codec = dai->codec;
402 struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
Peter Ujfalusi9d87a882015-06-04 16:04:22 +0300403 u8 reg, mask, val;
Dan Murphy5df7f712014-07-14 15:10:45 -0500404
Peter Ujfalusi9d87a882015-06-04 16:04:22 +0300405 switch (clk_id) {
406 case TAS2552_PLL_CLKIN_MCLK:
Peter Ujfalusi9d87a882015-06-04 16:04:22 +0300407 case TAS2552_PLL_CLKIN_IVCLKIN:
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +0300408 if (freq < 512000 || freq > 24576000) {
409 /* out of range PLL_CLKIN, fall back to use BCLK */
410 dev_warn(codec->dev, "Out of range PLL_CLKIN: %u\n",
411 freq);
412 clk_id = TAS2552_PLL_CLKIN_BCLK;
413 freq = 0;
414 }
415 /* fall through */
416 case TAS2552_PLL_CLKIN_BCLK:
Peter Ujfalusi9d87a882015-06-04 16:04:22 +0300417 case TAS2552_PLL_CLKIN_1_8_FIXED:
418 mask = TAS2552_PLL_SRC_MASK;
419 val = (clk_id << 3) & mask; /* bit 4:5 in the register */
420 reg = TAS2552_CFG_1;
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +0300421 tas2552->pll_clk_id = clk_id;
Peter Ujfalusi9d87a882015-06-04 16:04:22 +0300422 tas2552->pll_clkin = freq;
423 break;
424 case TAS2552_PDM_CLK_PLL:
425 case TAS2552_PDM_CLK_IVCLKIN:
426 case TAS2552_PDM_CLK_BCLK:
427 case TAS2552_PDM_CLK_MCLK:
428 mask = TAS2552_PDM_CLK_SEL_MASK;
429 val = (clk_id >> 1) & mask; /* bit 0:1 in the register */
430 reg = TAS2552_PDM_CFG;
Peter Ujfalusi1014f7e2015-06-08 15:19:48 +0300431 tas2552->pdm_clk_id = clk_id;
Peter Ujfalusi9d87a882015-06-04 16:04:22 +0300432 tas2552->pdm_clk = freq;
433 break;
434 default:
435 dev_err(codec->dev, "Invalid clk id: %d\n", clk_id);
436 return -EINVAL;
437 }
438
439 snd_soc_update_bits(codec, reg, mask, val);
Dan Murphy5df7f712014-07-14 15:10:45 -0500440
441 return 0;
442}
443
Peter Ujfalusi3f747a82015-06-04 16:04:25 +0300444static int tas2552_set_dai_tdm_slot(struct snd_soc_dai *dai,
445 unsigned int tx_mask, unsigned int rx_mask,
446 int slots, int slot_width)
447{
448 struct snd_soc_codec *codec = dai->codec;
449 struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
450 unsigned int lsb;
451
452 if (unlikely(!tx_mask)) {
453 dev_err(codec->dev, "tx masks need to be non 0\n");
454 return -EINVAL;
455 }
456
457 /* TDM based on DSP mode requires slots to be adjacent */
458 lsb = __ffs(tx_mask);
459 if ((lsb + 1) != __fls(tx_mask)) {
460 dev_err(codec->dev, "Invalid mask, slots must be adjacent\n");
461 return -EINVAL;
462 }
463
464 tas2552->tdm_delay = lsb * slot_width;
465
466 /* DOUT in high-impedance on inactive bit clocks */
467 snd_soc_update_bits(codec, TAS2552_DOUT,
468 TAS2552_SDOUT_TRISTATE, TAS2552_SDOUT_TRISTATE);
469
470 return 0;
471}
472
Dan Murphy5df7f712014-07-14 15:10:45 -0500473static int tas2552_mute(struct snd_soc_dai *dai, int mute)
474{
Peter Ujfalusie3606aa2015-06-04 16:04:18 +0300475 u8 cfg1_reg = 0;
Dan Murphy5df7f712014-07-14 15:10:45 -0500476 struct snd_soc_codec *codec = dai->codec;
477
478 if (mute)
Peter Ujfalusie3606aa2015-06-04 16:04:18 +0300479 cfg1_reg |= TAS2552_MUTE;
Dan Murphy5df7f712014-07-14 15:10:45 -0500480
Peter Ujfalusi7de544f2015-06-04 16:04:17 +0300481 snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_MUTE, cfg1_reg);
Dan Murphy5df7f712014-07-14 15:10:45 -0500482
483 return 0;
484}
485
Rafael J. Wysocki641d3342014-12-13 00:42:18 +0100486#ifdef CONFIG_PM
Dan Murphy5df7f712014-07-14 15:10:45 -0500487static int tas2552_runtime_suspend(struct device *dev)
488{
489 struct tas2552_data *tas2552 = dev_get_drvdata(dev);
490
Peter Ujfalusidd6e3052015-06-04 16:04:19 +0300491 tas2552_sw_shutdown(tas2552, 1);
Dan Murphy5df7f712014-07-14 15:10:45 -0500492
Dan Murphy5df7f712014-07-14 15:10:45 -0500493 regcache_cache_only(tas2552->regmap, true);
494 regcache_mark_dirty(tas2552->regmap);
495
Dan Murphye295a4a2014-07-18 12:31:07 -0500496 if (tas2552->enable_gpio)
497 gpiod_set_value(tas2552->enable_gpio, 0);
498
Dan Murphy5df7f712014-07-14 15:10:45 -0500499 return 0;
500}
501
502static int tas2552_runtime_resume(struct device *dev)
503{
504 struct tas2552_data *tas2552 = dev_get_drvdata(dev);
505
506 if (tas2552->enable_gpio)
507 gpiod_set_value(tas2552->enable_gpio, 1);
508
Peter Ujfalusidd6e3052015-06-04 16:04:19 +0300509 tas2552_sw_shutdown(tas2552, 0);
Dan Murphy5df7f712014-07-14 15:10:45 -0500510
511 regcache_cache_only(tas2552->regmap, false);
512 regcache_sync(tas2552->regmap);
513
514 return 0;
515}
516#endif
517
518static const struct dev_pm_ops tas2552_pm = {
519 SET_RUNTIME_PM_OPS(tas2552_runtime_suspend, tas2552_runtime_resume,
520 NULL)
521};
522
Dan Murphy5df7f712014-07-14 15:10:45 -0500523static struct snd_soc_dai_ops tas2552_speaker_dai_ops = {
524 .hw_params = tas2552_hw_params,
Peter Ujfalusi3f747a82015-06-04 16:04:25 +0300525 .prepare = tas2552_prepare,
Dan Murphy5df7f712014-07-14 15:10:45 -0500526 .set_sysclk = tas2552_set_dai_sysclk,
527 .set_fmt = tas2552_set_dai_fmt,
Peter Ujfalusi3f747a82015-06-04 16:04:25 +0300528 .set_tdm_slot = tas2552_set_dai_tdm_slot,
Dan Murphy5df7f712014-07-14 15:10:45 -0500529 .digital_mute = tas2552_mute,
530};
531
532/* Formats supported by TAS2552 driver. */
533#define TAS2552_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
534 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
535
536/* TAS2552 dai structure. */
537static struct snd_soc_dai_driver tas2552_dai[] = {
538 {
539 .name = "tas2552-amplifier",
540 .playback = {
Dan Murphya7a8e992014-08-01 10:57:04 -0500541 .stream_name = "Playback",
Dan Murphy5df7f712014-07-14 15:10:45 -0500542 .channels_min = 2,
543 .channels_max = 2,
544 .rates = SNDRV_PCM_RATE_8000_192000,
545 .formats = TAS2552_FORMATS,
546 },
547 .ops = &tas2552_speaker_dai_ops,
548 },
549};
550
551/*
552 * DAC digital volumes. From -7 to 24 dB in 1 dB steps
553 */
Peter Ujfalusidd6ae3b2015-06-04 16:04:27 +0300554static DECLARE_TLV_DB_SCALE(dac_tlv, -7, 100, 0);
Dan Murphy5df7f712014-07-14 15:10:45 -0500555
Peter Ujfalusi2962cb52015-06-08 15:19:49 +0300556static const char * const tas2552_din_source_select[] = {
557 "Muted",
558 "Left",
559 "Right",
560 "Left + Right average",
561};
562static SOC_ENUM_SINGLE_DECL(tas2552_din_source_enum,
563 TAS2552_CFG_3, 3,
564 tas2552_din_source_select);
565
Dan Murphy5df7f712014-07-14 15:10:45 -0500566static const struct snd_kcontrol_new tas2552_snd_controls[] = {
567 SOC_SINGLE_TLV("Speaker Driver Playback Volume",
Peter Ujfalusidd6ae3b2015-06-04 16:04:27 +0300568 TAS2552_PGA_GAIN, 0, 0x1f, 0, dac_tlv),
Peter Ujfalusi2962cb52015-06-08 15:19:49 +0300569 SOC_ENUM("DIN source", tas2552_din_source_enum),
Dan Murphy5df7f712014-07-14 15:10:45 -0500570};
571
Dan Murphy5df7f712014-07-14 15:10:45 -0500572static int tas2552_codec_probe(struct snd_soc_codec *codec)
573{
574 struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
575 int ret;
576
577 tas2552->codec = codec;
578
579 ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
580 tas2552->supplies);
581
582 if (ret != 0) {
583 dev_err(codec->dev, "Failed to enable supplies: %d\n",
584 ret);
585 return ret;
586 }
587
588 if (tas2552->enable_gpio)
589 gpiod_set_value(tas2552->enable_gpio, 1);
590
591 ret = pm_runtime_get_sync(codec->dev);
592 if (ret < 0) {
593 dev_err(codec->dev, "Enabling device failed: %d\n",
594 ret);
595 goto probe_fail;
596 }
597
Peter Ujfalusi7d785022015-06-04 16:04:28 +0300598 snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_MUTE, TAS2552_MUTE);
Dan Murphy5df7f712014-07-14 15:10:45 -0500599 snd_soc_write(codec, TAS2552_CFG_3, TAS2552_I2S_OUT_SEL |
Peter Ujfalusia571cb12015-06-04 16:04:30 +0300600 TAS2552_DIN_SRC_SEL_AVG_L_R);
Peter Ujfalusib2822f12015-06-08 15:19:50 +0300601 snd_soc_write(codec, TAS2552_OUTPUT_DATA,
602 TAS2552_PDM_DATA_SEL_V_I |
603 TAS2552_R_DATA_OUT(TAS2552_DATA_OUT_V_DATA));
Peter Ujfalusi2a9dd1d2015-06-08 15:19:51 +0300604 snd_soc_write(codec, TAS2552_BOOST_APT_CTRL, TAS2552_APT_DELAY_200 |
605 TAS2552_APT_THRESH_20_17);
Dan Murphy5df7f712014-07-14 15:10:45 -0500606
Peter Ujfalusi4afdd892015-06-08 15:19:52 +0300607 snd_soc_write(codec, TAS2552_CFG_2, TAS2552_BOOST_EN | TAS2552_APT_EN |
608 TAS2552_LIM_EN);
Dan Murphya7a8e992014-08-01 10:57:04 -0500609
Dan Murphy5df7f712014-07-14 15:10:45 -0500610 return 0;
611
Dan Murphy5df7f712014-07-14 15:10:45 -0500612probe_fail:
613 if (tas2552->enable_gpio)
614 gpiod_set_value(tas2552->enable_gpio, 0);
615
616 regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
617 tas2552->supplies);
618 return -EIO;
619}
620
621static int tas2552_codec_remove(struct snd_soc_codec *codec)
622{
623 struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
624
Dan Murphye295a4a2014-07-18 12:31:07 -0500625 pm_runtime_put(codec->dev);
626
Dan Murphy5df7f712014-07-14 15:10:45 -0500627 if (tas2552->enable_gpio)
628 gpiod_set_value(tas2552->enable_gpio, 0);
629
630 return 0;
631};
632
633#ifdef CONFIG_PM
634static int tas2552_suspend(struct snd_soc_codec *codec)
635{
636 struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
637 int ret;
638
639 ret = regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
640 tas2552->supplies);
641
642 if (ret != 0)
643 dev_err(codec->dev, "Failed to disable supplies: %d\n",
644 ret);
645 return 0;
646}
647
648static int tas2552_resume(struct snd_soc_codec *codec)
649{
650 struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
651 int ret;
652
653 ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
654 tas2552->supplies);
655
656 if (ret != 0) {
657 dev_err(codec->dev, "Failed to enable supplies: %d\n",
658 ret);
659 }
660
661 return 0;
662}
663#else
664#define tas2552_suspend NULL
665#define tas2552_resume NULL
666#endif
667
668static struct snd_soc_codec_driver soc_codec_dev_tas2552 = {
669 .probe = tas2552_codec_probe,
670 .remove = tas2552_codec_remove,
671 .suspend = tas2552_suspend,
672 .resume = tas2552_resume,
Peter Ujfalusi7d785022015-06-04 16:04:28 +0300673 .ignore_pmdown_time = true,
674
Dan Murphy5df7f712014-07-14 15:10:45 -0500675 .controls = tas2552_snd_controls,
676 .num_controls = ARRAY_SIZE(tas2552_snd_controls),
Lars-Peter Clausene3f1ff32014-11-05 10:46:32 +0100677 .dapm_widgets = tas2552_dapm_widgets,
678 .num_dapm_widgets = ARRAY_SIZE(tas2552_dapm_widgets),
679 .dapm_routes = tas2552_audio_map,
680 .num_dapm_routes = ARRAY_SIZE(tas2552_audio_map),
Dan Murphy5df7f712014-07-14 15:10:45 -0500681};
682
683static const struct regmap_config tas2552_regmap_config = {
684 .reg_bits = 8,
685 .val_bits = 8,
686
687 .max_register = TAS2552_MAX_REG,
688 .reg_defaults = tas2552_reg_defs,
689 .num_reg_defaults = ARRAY_SIZE(tas2552_reg_defs),
690 .cache_type = REGCACHE_RBTREE,
691};
692
693static int tas2552_probe(struct i2c_client *client,
694 const struct i2c_device_id *id)
695{
696 struct device *dev;
697 struct tas2552_data *data;
698 int ret;
699 int i;
700
701 dev = &client->dev;
702 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
703 if (data == NULL)
704 return -ENOMEM;
705
Axel Lin8604bc22015-06-10 22:46:05 +0800706 data->enable_gpio = devm_gpiod_get_optional(dev, "enable",
707 GPIOD_OUT_LOW);
708 if (IS_ERR(data->enable_gpio))
709 return PTR_ERR(data->enable_gpio);
Dan Murphy5df7f712014-07-14 15:10:45 -0500710
711 data->tas2552_client = client;
712 data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config);
713 if (IS_ERR(data->regmap)) {
714 ret = PTR_ERR(data->regmap);
715 dev_err(&client->dev, "Failed to allocate register map: %d\n",
716 ret);
717 return ret;
718 }
719
720 for (i = 0; i < ARRAY_SIZE(data->supplies); i++)
721 data->supplies[i].supply = tas2552_supply_names[i];
722
723 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
724 data->supplies);
Axel Linc62f9d82014-07-23 16:42:21 +0800725 if (ret != 0) {
Dan Murphy5df7f712014-07-14 15:10:45 -0500726 dev_err(dev, "Failed to request supplies: %d\n", ret);
Axel Linc62f9d82014-07-23 16:42:21 +0800727 return ret;
728 }
Dan Murphy5df7f712014-07-14 15:10:45 -0500729
730 pm_runtime_set_active(&client->dev);
731 pm_runtime_set_autosuspend_delay(&client->dev, 1000);
732 pm_runtime_use_autosuspend(&client->dev);
733 pm_runtime_enable(&client->dev);
734 pm_runtime_mark_last_busy(&client->dev);
735 pm_runtime_put_sync_autosuspend(&client->dev);
736
737 dev_set_drvdata(&client->dev, data);
738
739 ret = snd_soc_register_codec(&client->dev,
740 &soc_codec_dev_tas2552,
741 tas2552_dai, ARRAY_SIZE(tas2552_dai));
742 if (ret < 0)
743 dev_err(&client->dev, "Failed to register codec: %d\n", ret);
744
Axel Linc62f9d82014-07-23 16:42:21 +0800745 return ret;
Dan Murphy5df7f712014-07-14 15:10:45 -0500746}
747
748static int tas2552_i2c_remove(struct i2c_client *client)
749{
750 snd_soc_unregister_codec(&client->dev);
Peter Ujfalusi4785ed82015-06-08 15:19:53 +0300751 pm_runtime_disable(&client->dev);
Dan Murphy5df7f712014-07-14 15:10:45 -0500752 return 0;
753}
754
755static const struct i2c_device_id tas2552_id[] = {
756 { "tas2552", 0 },
757 { }
758};
759MODULE_DEVICE_TABLE(i2c, tas2552_id);
760
761#if IS_ENABLED(CONFIG_OF)
762static const struct of_device_id tas2552_of_match[] = {
763 { .compatible = "ti,tas2552", },
764 {},
765};
766MODULE_DEVICE_TABLE(of, tas2552_of_match);
767#endif
768
769static struct i2c_driver tas2552_i2c_driver = {
770 .driver = {
771 .name = "tas2552",
772 .owner = THIS_MODULE,
773 .of_match_table = of_match_ptr(tas2552_of_match),
774 .pm = &tas2552_pm,
775 },
776 .probe = tas2552_probe,
777 .remove = tas2552_i2c_remove,
778 .id_table = tas2552_id,
779};
780
781module_i2c_driver(tas2552_i2c_driver);
782
783MODULE_AUTHOR("Dan Muprhy <dmurphy@ti.com>");
784MODULE_DESCRIPTION("TAS2552 Audio amplifier driver");
785MODULE_LICENSE("GPL");