blob: 6c954835d61ecb04dd0801ccae801033869f2b74 [file] [log] [blame]
Qiao Zhou70c6cce2012-07-09 14:37:32 +08001/*
2 * Base driver for Marvell 88PM800
3 *
4 * Copyright (C) 2012 Marvell International Ltd.
5 * Haojian Zhuang <haojian.zhuang@marvell.com>
6 * Joseph(Yossi) Hanin <yhanin@marvell.com>
7 * Qiao Zhou <zhouqiao@marvell.com>
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
Chao Xie52705342013-06-14 01:21:50 -040025#include <linux/err.h>
Qiao Zhou70c6cce2012-07-09 14:37:32 +080026#include <linux/i2c.h>
27#include <linux/mfd/core.h>
28#include <linux/mfd/88pm80x.h>
29#include <linux/slab.h>
30
Qiao Zhou70c6cce2012-07-09 14:37:32 +080031/* Interrupt Registers */
32#define PM800_INT_STATUS1 (0x05)
33#define PM800_ONKEY_INT_STS1 (1 << 0)
34#define PM800_EXTON_INT_STS1 (1 << 1)
35#define PM800_CHG_INT_STS1 (1 << 2)
36#define PM800_BAT_INT_STS1 (1 << 3)
37#define PM800_RTC_INT_STS1 (1 << 4)
38#define PM800_CLASSD_OC_INT_STS1 (1 << 5)
39
40#define PM800_INT_STATUS2 (0x06)
41#define PM800_VBAT_INT_STS2 (1 << 0)
42#define PM800_VSYS_INT_STS2 (1 << 1)
43#define PM800_VCHG_INT_STS2 (1 << 2)
44#define PM800_TINT_INT_STS2 (1 << 3)
45#define PM800_GPADC0_INT_STS2 (1 << 4)
46#define PM800_TBAT_INT_STS2 (1 << 5)
47#define PM800_GPADC2_INT_STS2 (1 << 6)
48#define PM800_GPADC3_INT_STS2 (1 << 7)
49
50#define PM800_INT_STATUS3 (0x07)
51
52#define PM800_INT_STATUS4 (0x08)
53#define PM800_GPIO0_INT_STS4 (1 << 0)
54#define PM800_GPIO1_INT_STS4 (1 << 1)
55#define PM800_GPIO2_INT_STS4 (1 << 2)
56#define PM800_GPIO3_INT_STS4 (1 << 3)
57#define PM800_GPIO4_INT_STS4 (1 << 4)
58
59#define PM800_INT_ENA_1 (0x09)
60#define PM800_ONKEY_INT_ENA1 (1 << 0)
61#define PM800_EXTON_INT_ENA1 (1 << 1)
62#define PM800_CHG_INT_ENA1 (1 << 2)
63#define PM800_BAT_INT_ENA1 (1 << 3)
64#define PM800_RTC_INT_ENA1 (1 << 4)
65#define PM800_CLASSD_OC_INT_ENA1 (1 << 5)
66
67#define PM800_INT_ENA_2 (0x0A)
68#define PM800_VBAT_INT_ENA2 (1 << 0)
69#define PM800_VSYS_INT_ENA2 (1 << 1)
70#define PM800_VCHG_INT_ENA2 (1 << 2)
71#define PM800_TINT_INT_ENA2 (1 << 3)
72
73#define PM800_INT_ENA_3 (0x0B)
74#define PM800_GPADC0_INT_ENA3 (1 << 0)
75#define PM800_GPADC1_INT_ENA3 (1 << 1)
76#define PM800_GPADC2_INT_ENA3 (1 << 2)
77#define PM800_GPADC3_INT_ENA3 (1 << 3)
78#define PM800_GPADC4_INT_ENA3 (1 << 4)
79
80#define PM800_INT_ENA_4 (0x0C)
81#define PM800_GPIO0_INT_ENA4 (1 << 0)
82#define PM800_GPIO1_INT_ENA4 (1 << 1)
83#define PM800_GPIO2_INT_ENA4 (1 << 2)
84#define PM800_GPIO3_INT_ENA4 (1 << 3)
85#define PM800_GPIO4_INT_ENA4 (1 << 4)
86
87/* number of INT_ENA & INT_STATUS regs */
88#define PM800_INT_REG_NUM (4)
89
90/* Interrupt Number in 88PM800 */
91enum {
92 PM800_IRQ_ONKEY, /*EN1b0 *//*0 */
93 PM800_IRQ_EXTON, /*EN1b1 */
94 PM800_IRQ_CHG, /*EN1b2 */
95 PM800_IRQ_BAT, /*EN1b3 */
96 PM800_IRQ_RTC, /*EN1b4 */
97 PM800_IRQ_CLASSD, /*EN1b5 *//*5 */
98 PM800_IRQ_VBAT, /*EN2b0 */
99 PM800_IRQ_VSYS, /*EN2b1 */
100 PM800_IRQ_VCHG, /*EN2b2 */
101 PM800_IRQ_TINT, /*EN2b3 */
102 PM800_IRQ_GPADC0, /*EN3b0 *//*10 */
103 PM800_IRQ_GPADC1, /*EN3b1 */
104 PM800_IRQ_GPADC2, /*EN3b2 */
105 PM800_IRQ_GPADC3, /*EN3b3 */
106 PM800_IRQ_GPADC4, /*EN3b4 */
107 PM800_IRQ_GPIO0, /*EN4b0 *//*15 */
108 PM800_IRQ_GPIO1, /*EN4b1 */
109 PM800_IRQ_GPIO2, /*EN4b2 */
110 PM800_IRQ_GPIO3, /*EN4b3 */
111 PM800_IRQ_GPIO4, /*EN4b4 *//*19 */
112 PM800_MAX_IRQ,
113};
114
Chao Xie03dcc542013-06-14 01:21:51 -0400115/* PM800: generation identification number */
116#define PM800_CHIP_GEN_ID_NUM 0x3
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800117
118static const struct i2c_device_id pm80x_id_table[] = {
Chao Xie03dcc542013-06-14 01:21:51 -0400119 {"88PM800", 0},
Samuel Ortiz31b3ffb2012-07-09 15:11:46 +0200120 {} /* NULL terminated */
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800121};
122MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
123
124static struct resource rtc_resources[] = {
125 {
126 .name = "88pm80x-rtc",
127 .start = PM800_IRQ_RTC,
128 .end = PM800_IRQ_RTC,
129 .flags = IORESOURCE_IRQ,
130 },
131};
132
133static struct mfd_cell rtc_devs[] = {
134 {
135 .name = "88pm80x-rtc",
136 .num_resources = ARRAY_SIZE(rtc_resources),
137 .resources = &rtc_resources[0],
138 .id = -1,
139 },
140};
141
142static struct resource onkey_resources[] = {
143 {
144 .name = "88pm80x-onkey",
145 .start = PM800_IRQ_ONKEY,
146 .end = PM800_IRQ_ONKEY,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151static struct mfd_cell onkey_devs[] = {
152 {
153 .name = "88pm80x-onkey",
154 .num_resources = 1,
155 .resources = &onkey_resources[0],
156 .id = -1,
157 },
158};
159
Chao Xie2d3aa052013-06-14 01:21:53 -0400160static struct mfd_cell regulator_devs[] = {
161 {
162 .name = "88pm80x-regulator",
163 .id = -1,
164 },
165};
166
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800167static const struct regmap_irq pm800_irqs[] = {
168 /* INT0 */
169 [PM800_IRQ_ONKEY] = {
170 .mask = PM800_ONKEY_INT_ENA1,
171 },
172 [PM800_IRQ_EXTON] = {
173 .mask = PM800_EXTON_INT_ENA1,
174 },
175 [PM800_IRQ_CHG] = {
176 .mask = PM800_CHG_INT_ENA1,
177 },
178 [PM800_IRQ_BAT] = {
179 .mask = PM800_BAT_INT_ENA1,
180 },
181 [PM800_IRQ_RTC] = {
182 .mask = PM800_RTC_INT_ENA1,
183 },
184 [PM800_IRQ_CLASSD] = {
185 .mask = PM800_CLASSD_OC_INT_ENA1,
186 },
187 /* INT1 */
188 [PM800_IRQ_VBAT] = {
189 .reg_offset = 1,
190 .mask = PM800_VBAT_INT_ENA2,
191 },
192 [PM800_IRQ_VSYS] = {
193 .reg_offset = 1,
194 .mask = PM800_VSYS_INT_ENA2,
195 },
196 [PM800_IRQ_VCHG] = {
197 .reg_offset = 1,
198 .mask = PM800_VCHG_INT_ENA2,
199 },
200 [PM800_IRQ_TINT] = {
201 .reg_offset = 1,
202 .mask = PM800_TINT_INT_ENA2,
203 },
204 /* INT2 */
205 [PM800_IRQ_GPADC0] = {
206 .reg_offset = 2,
207 .mask = PM800_GPADC0_INT_ENA3,
208 },
209 [PM800_IRQ_GPADC1] = {
210 .reg_offset = 2,
211 .mask = PM800_GPADC1_INT_ENA3,
212 },
213 [PM800_IRQ_GPADC2] = {
214 .reg_offset = 2,
215 .mask = PM800_GPADC2_INT_ENA3,
216 },
217 [PM800_IRQ_GPADC3] = {
218 .reg_offset = 2,
219 .mask = PM800_GPADC3_INT_ENA3,
220 },
221 [PM800_IRQ_GPADC4] = {
222 .reg_offset = 2,
223 .mask = PM800_GPADC4_INT_ENA3,
224 },
225 /* INT3 */
226 [PM800_IRQ_GPIO0] = {
227 .reg_offset = 3,
228 .mask = PM800_GPIO0_INT_ENA4,
229 },
230 [PM800_IRQ_GPIO1] = {
231 .reg_offset = 3,
232 .mask = PM800_GPIO1_INT_ENA4,
233 },
234 [PM800_IRQ_GPIO2] = {
235 .reg_offset = 3,
236 .mask = PM800_GPIO2_INT_ENA4,
237 },
238 [PM800_IRQ_GPIO3] = {
239 .reg_offset = 3,
240 .mask = PM800_GPIO3_INT_ENA4,
241 },
242 [PM800_IRQ_GPIO4] = {
243 .reg_offset = 3,
244 .mask = PM800_GPIO4_INT_ENA4,
245 },
246};
247
Bill Pembertonf791be42012-11-19 13:23:04 -0500248static int device_gpadc_init(struct pm80x_chip *chip,
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800249 struct pm80x_platform_data *pdata)
250{
251 struct pm80x_subchip *subchip = chip->subchip;
252 struct regmap *map = subchip->regmap_gpadc;
253 int data = 0, mask = 0, ret = 0;
254
255 if (!map) {
256 dev_warn(chip->dev,
257 "Warning: gpadc regmap is not available!\n");
258 return -EINVAL;
259 }
260 /*
261 * initialize GPADC without activating it turn on GPADC
262 * measurments
263 */
264 ret = regmap_update_bits(map,
265 PM800_GPADC_MISC_CONFIG2,
266 PM800_GPADC_MISC_GPFSM_EN,
267 PM800_GPADC_MISC_GPFSM_EN);
268 if (ret < 0)
269 goto out;
270 /*
271 * This function configures the ADC as requires for
272 * CP implementation.CP does not "own" the ADC configuration
273 * registers and relies on AP.
274 * Reason: enable automatic ADC measurements needed
275 * for CP to get VBAT and RF temperature readings.
276 */
277 ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
278 PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
279 if (ret < 0)
280 goto out;
281 ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
282 (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
283 (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
284 if (ret < 0)
285 goto out;
286
287 /*
288 * the defult of PM800 is GPADC operates at 100Ks/s rate
289 * and Number of GPADC slots with active current bias prior
290 * to GPADC sampling = 1 slot for all GPADCs set for
291 * Temprature mesurmants
292 */
293 mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
294 PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
295
296 if (pdata && (pdata->batt_det == 0))
297 data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
298 PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
299 else
300 data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
301 PM800_GPADC_GP_BIAS_EN3);
302
303 ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
304 if (ret < 0)
305 goto out;
306
307 dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
308 return 0;
309
310out:
311 dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
312 return ret;
313}
314
Chao Xie3a3ece52013-06-14 01:21:52 -0400315static int device_onkey_init(struct pm80x_chip *chip,
316 struct pm80x_platform_data *pdata)
317{
318 int ret;
319
320 ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
321 ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
322 NULL);
323 if (ret) {
324 dev_err(chip->dev, "Failed to add onkey subdev\n");
325 return ret;
326 }
327
328 return 0;
329}
330
331static int device_rtc_init(struct pm80x_chip *chip,
332 struct pm80x_platform_data *pdata)
333{
334 int ret;
335
336 rtc_devs[0].platform_data = pdata->rtc;
337 rtc_devs[0].pdata_size =
338 pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
339 ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
340 ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
341 if (ret) {
342 dev_err(chip->dev, "Failed to add rtc subdev\n");
343 return ret;
344 }
345
346 return 0;
347}
348
Chao Xie2d3aa052013-06-14 01:21:53 -0400349static int device_regulator_init(struct pm80x_chip *chip,
350 struct pm80x_platform_data *pdata)
351{
352 int ret;
353
354 ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
355 ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
356 if (ret) {
357 dev_err(chip->dev, "Failed to add regulator subdev\n");
358 return ret;
359 }
360
361 return 0;
362}
363
Bill Pembertonf791be42012-11-19 13:23:04 -0500364static int device_irq_init_800(struct pm80x_chip *chip)
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800365{
366 struct regmap *map = chip->regmap;
Yi Zhang1ef56772013-06-14 01:21:48 -0400367 unsigned long flags = IRQF_ONESHOT;
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800368 int data, mask, ret = -EINVAL;
369
370 if (!map || !chip->irq) {
371 dev_err(chip->dev, "incorrect parameters\n");
372 return -EINVAL;
373 }
374
375 /*
376 * irq_mode defines the way of clearing interrupt. it's read-clear by
377 * default.
378 */
379 mask =
380 PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
381 PM800_WAKEUP2_INT_MASK;
382
383 data = PM800_WAKEUP2_INT_CLEAR;
384 ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
385
386 if (ret < 0)
387 goto out;
388
389 ret =
390 regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
391 chip->regmap_irq_chip, &chip->irq_data);
392
393out:
394 return ret;
395}
396
397static void device_irq_exit_800(struct pm80x_chip *chip)
398{
399 regmap_del_irq_chip(chip->irq, chip->irq_data);
400}
401
402static struct regmap_irq_chip pm800_irq_chip = {
403 .name = "88pm800",
404 .irqs = pm800_irqs,
405 .num_irqs = ARRAY_SIZE(pm800_irqs),
406
407 .num_regs = 4,
408 .status_base = PM800_INT_STATUS1,
409 .mask_base = PM800_INT_ENA_1,
410 .ack_base = PM800_INT_STATUS1,
Chao Xiecb5c5802013-06-14 01:21:47 -0400411 .mask_invert = 1,
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800412};
413
414static int pm800_pages_init(struct pm80x_chip *chip)
415{
416 struct pm80x_subchip *subchip;
417 struct i2c_client *client = chip->client;
418
Chao Xie52705342013-06-14 01:21:50 -0400419 int ret = 0;
420
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800421 subchip = chip->subchip;
Chao Xie52705342013-06-14 01:21:50 -0400422 if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
423 return -ENODEV;
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800424
Chao Xie52705342013-06-14 01:21:50 -0400425 /* PM800 block power page */
426 subchip->power_page = i2c_new_dummy(client->adapter,
427 subchip->power_page_addr);
428 if (subchip->power_page == NULL) {
429 ret = -ENODEV;
430 goto out;
431 }
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800432
Chao Xie52705342013-06-14 01:21:50 -0400433 subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
434 &pm80x_regmap_config);
435 if (IS_ERR(subchip->regmap_power)) {
436 ret = PTR_ERR(subchip->regmap_power);
437 dev_err(chip->dev,
438 "Failed to allocate regmap_power: %d\n", ret);
439 goto out;
440 }
441
442 i2c_set_clientdata(subchip->power_page, chip);
443
444 /* PM800 block GPADC */
445 subchip->gpadc_page = i2c_new_dummy(client->adapter,
446 subchip->gpadc_page_addr);
447 if (subchip->gpadc_page == NULL) {
448 ret = -ENODEV;
449 goto out;
450 }
451
452 subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
453 &pm80x_regmap_config);
454 if (IS_ERR(subchip->regmap_gpadc)) {
455 ret = PTR_ERR(subchip->regmap_gpadc);
456 dev_err(chip->dev,
457 "Failed to allocate regmap_gpadc: %d\n", ret);
458 goto out;
459 }
460 i2c_set_clientdata(subchip->gpadc_page, chip);
461
462out:
463 return ret;
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800464}
465
466static void pm800_pages_exit(struct pm80x_chip *chip)
467{
468 struct pm80x_subchip *subchip;
469
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800470 subchip = chip->subchip;
Chao Xie52705342013-06-14 01:21:50 -0400471
472 if (subchip && subchip->power_page)
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800473 i2c_unregister_device(subchip->power_page);
Chao Xie52705342013-06-14 01:21:50 -0400474
475 if (subchip && subchip->gpadc_page)
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800476 i2c_unregister_device(subchip->gpadc_page);
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800477}
478
Bill Pembertonf791be42012-11-19 13:23:04 -0500479static int device_800_init(struct pm80x_chip *chip,
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800480 struct pm80x_platform_data *pdata)
481{
Chao Xie03dcc542013-06-14 01:21:51 -0400482 int ret;
Axel Lin46b65a82012-07-11 09:27:54 +0800483 unsigned int val;
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800484
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800485 /*
486 * alarm wake up bit will be clear in device_irq_init(),
487 * read before that
488 */
Axel Lin46b65a82012-07-11 09:27:54 +0800489 ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800490 if (ret < 0) {
491 dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
492 goto out;
493 }
Axel Lin46b65a82012-07-11 09:27:54 +0800494 if (val & PM800_ALARM_WAKEUP) {
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800495 if (pdata && pdata->rtc)
496 pdata->rtc->rtc_wakeup = 1;
497 }
498
499 ret = device_gpadc_init(chip, pdata);
500 if (ret < 0) {
501 dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
502 goto out;
503 }
504
505 chip->regmap_irq_chip = &pm800_irq_chip;
506
507 ret = device_irq_init_800(chip);
508 if (ret < 0) {
509 dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
510 goto out;
511 }
512
Chao Xie3a3ece52013-06-14 01:21:52 -0400513 ret = device_onkey_init(chip, pdata);
514 if (ret) {
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800515 dev_err(chip->dev, "Failed to add onkey subdev\n");
516 goto out_dev;
Chao Xie3a3ece52013-06-14 01:21:52 -0400517 }
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800518
Chao Xie3a3ece52013-06-14 01:21:52 -0400519 ret = device_rtc_init(chip, pdata);
520 if (ret) {
521 dev_err(chip->dev, "Failed to add rtc subdev\n");
522 goto out;
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800523 }
524
Chao Xie2d3aa052013-06-14 01:21:53 -0400525 ret = device_regulator_init(chip, pdata);
526 if (ret) {
527 dev_err(chip->dev, "Failed to add regulators subdev\n");
528 goto out;
529 }
530
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800531 return 0;
532out_dev:
533 mfd_remove_devices(chip->dev);
534 device_irq_exit_800(chip);
535out:
536 return ret;
537}
538
Bill Pembertonf791be42012-11-19 13:23:04 -0500539static int pm800_probe(struct i2c_client *client,
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800540 const struct i2c_device_id *id)
541{
542 int ret = 0;
543 struct pm80x_chip *chip;
544 struct pm80x_platform_data *pdata = client->dev.platform_data;
545 struct pm80x_subchip *subchip;
546
Chao Xie03dcc542013-06-14 01:21:51 -0400547 ret = pm80x_init(client);
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800548 if (ret) {
549 dev_err(&client->dev, "pm800_init fail\n");
550 goto out_init;
551 }
552
553 chip = i2c_get_clientdata(client);
554
555 /* init subchip for PM800 */
556 subchip =
557 devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
558 GFP_KERNEL);
559 if (!subchip) {
560 ret = -ENOMEM;
561 goto err_subchip_alloc;
562 }
563
Chao Xiec750d8e2013-06-14 01:21:49 -0400564 /* pm800 has 2 addtional pages to support power and gpadc. */
565 subchip->power_page_addr = client->addr + 1;
566 subchip->gpadc_page_addr = client->addr + 2;
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800567 chip->subchip = subchip;
568
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800569 ret = pm800_pages_init(chip);
570 if (ret) {
571 dev_err(&client->dev, "pm800_pages_init failed!\n");
572 goto err_page_init;
573 }
574
Yi Zhang618fa572013-06-14 01:21:45 -0400575 ret = device_800_init(chip, pdata);
576 if (ret) {
Chao Xie03dcc542013-06-14 01:21:51 -0400577 dev_err(chip->dev, "Failed to initialize 88pm800 devices\n");
Yi Zhang618fa572013-06-14 01:21:45 -0400578 goto err_device_init;
579 }
580
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800581 if (pdata->plat_config)
582 pdata->plat_config(chip, pdata);
583
Yi Zhang618fa572013-06-14 01:21:45 -0400584 return 0;
585
586err_device_init:
587 pm800_pages_exit(chip);
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800588err_page_init:
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800589err_subchip_alloc:
Yi Zhang306df792013-01-22 10:43:45 +0800590 pm80x_deinit();
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800591out_init:
592 return ret;
593}
594
Bill Pemberton4740f732012-11-19 13:26:01 -0500595static int pm800_remove(struct i2c_client *client)
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800596{
597 struct pm80x_chip *chip = i2c_get_clientdata(client);
598
599 mfd_remove_devices(chip->dev);
600 device_irq_exit_800(chip);
601
602 pm800_pages_exit(chip);
Yi Zhang306df792013-01-22 10:43:45 +0800603 pm80x_deinit();
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800604
605 return 0;
606}
607
608static struct i2c_driver pm800_driver = {
609 .driver = {
Chao Xie46223a12013-06-14 01:21:46 -0400610 .name = "88PM800",
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800611 .owner = THIS_MODULE,
612 .pm = &pm80x_pm_ops,
613 },
614 .probe = pm800_probe,
Bill Pemberton84449212012-11-19 13:20:24 -0500615 .remove = pm800_remove,
Qiao Zhou70c6cce2012-07-09 14:37:32 +0800616 .id_table = pm80x_id_table,
617};
618
619static int __init pm800_i2c_init(void)
620{
621 return i2c_add_driver(&pm800_driver);
622}
623subsys_initcall(pm800_i2c_init);
624
625static void __exit pm800_i2c_exit(void)
626{
627 i2c_del_driver(&pm800_driver);
628}
629module_exit(pm800_i2c_exit);
630
631MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
632MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
633MODULE_LICENSE("GPL");