| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2003, 2004 Chris Dearman |
| 7 | * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) |
| 8 | */ |
| 9 | #ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H |
| 10 | #define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H |
| 11 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | |
| 13 | /* |
| 14 | * CPU feature overrides for MIPS boards |
| 15 | */ |
| Ralf Baechle | ec917c2c | 2005-10-07 16:58:15 +0100 | [diff] [blame] | 16 | #ifdef CONFIG_CPU_MIPS32 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #define cpu_has_tlb 1 |
| 18 | #define cpu_has_4kex 1 |
| Kumba | c3b1c2d | 2006-06-18 02:17:01 -0400 | [diff] [blame] | 19 | #define cpu_has_4k_cache 1 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | /* #define cpu_has_fpu ? */ |
| 21 | /* #define cpu_has_32fpr ? */ |
| 22 | #define cpu_has_counter 1 |
| 23 | /* #define cpu_has_watch ? */ |
| 24 | #define cpu_has_divec 1 |
| 25 | #define cpu_has_vce 0 |
| 26 | /* #define cpu_has_cache_cdex_p ? */ |
| 27 | /* #define cpu_has_cache_cdex_s ? */ |
| 28 | /* #define cpu_has_prefetch ? */ |
| 29 | #define cpu_has_mcheck 1 |
| 30 | /* #define cpu_has_ejtag ? */ |
| Jordan Crouse | 76fa9a2 | 2006-01-20 14:06:09 -0800 | [diff] [blame] | 31 | #ifdef CONFIG_CPU_HAS_LLSC |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #define cpu_has_llsc 1 |
| Jordan Crouse | 76fa9a2 | 2006-01-20 14:06:09 -0800 | [diff] [blame] | 33 | #else |
| 34 | #define cpu_has_llsc 0 |
| 35 | #endif |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | /* #define cpu_has_vtag_icache ? */ |
| 37 | /* #define cpu_has_dc_aliases ? */ |
| 38 | /* #define cpu_has_ic_fills_f_dc ? */ |
| 39 | #define cpu_has_nofpuex 0 |
| 40 | /* #define cpu_has_64bits ? */ |
| 41 | /* #define cpu_has_64bit_zero_reg ? */ |
| Ralf Baechle | fc5d2d2 | 2006-07-06 13:04:01 +0100 | [diff] [blame] | 42 | /* #define cpu_has_inclusive_pcaches ? */ |
| Ralf Baechle | 8b200ce | 2005-08-16 17:54:41 +0000 | [diff] [blame] | 43 | #define cpu_icache_snoops_remote_store 1 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #endif |
| 45 | |
| Ralf Baechle | ec917c2c | 2005-10-07 16:58:15 +0100 | [diff] [blame] | 46 | #ifdef CONFIG_CPU_MIPS64 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #define cpu_has_tlb 1 |
| 48 | #define cpu_has_4kex 1 |
| Kumba | c3b1c2d | 2006-06-18 02:17:01 -0400 | [diff] [blame] | 49 | #define cpu_has_4k_cache 1 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | /* #define cpu_has_fpu ? */ |
| 51 | /* #define cpu_has_32fpr ? */ |
| 52 | #define cpu_has_counter 1 |
| 53 | /* #define cpu_has_watch ? */ |
| 54 | #define cpu_has_divec 1 |
| 55 | #define cpu_has_vce 0 |
| 56 | /* #define cpu_has_cache_cdex_p ? */ |
| 57 | /* #define cpu_has_cache_cdex_s ? */ |
| 58 | /* #define cpu_has_prefetch ? */ |
| 59 | #define cpu_has_mcheck 1 |
| 60 | /* #define cpu_has_ejtag ? */ |
| 61 | #define cpu_has_llsc 1 |
| 62 | /* #define cpu_has_vtag_icache ? */ |
| 63 | /* #define cpu_has_dc_aliases ? */ |
| 64 | /* #define cpu_has_ic_fills_f_dc ? */ |
| 65 | #define cpu_has_nofpuex 0 |
| 66 | /* #define cpu_has_64bits ? */ |
| 67 | /* #define cpu_has_64bit_zero_reg ? */ |
| Ralf Baechle | fc5d2d2 | 2006-07-06 13:04:01 +0100 | [diff] [blame] | 68 | /* #define cpu_has_inclusive_pcaches ? */ |
| Ralf Baechle | 8b200ce | 2005-08-16 17:54:41 +0000 | [diff] [blame] | 69 | #define cpu_icache_snoops_remote_store 1 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | #endif |
| 71 | |
| 72 | #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ |