blob: 3da77766961e7f717f661263d53bbc0368f6696c [file] [log] [blame]
JeongHyeon Kim699efdd2011-07-21 16:19:19 +09001/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/gpio.h>
13#include <linux/mmc/host.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/input.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090017#include <linux/pwm_backlight.h>
Sachin Kamatc86cfdd2011-09-16 21:41:25 +090018#include <linux/gpio_keys.h>
Inderpal Singh6e012802011-10-03 08:51:20 +090019#include <linux/i2c.h>
20#include <linux/regulator/machine.h>
21#include <linux/mfd/max8997.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090022
23#include <asm/mach/arch.h>
24#include <asm/mach-types.h>
25
26#include <plat/regs-serial.h>
27#include <plat/exynos4.h>
28#include <plat/cpu.h>
29#include <plat/devs.h>
30#include <plat/sdhci.h>
31#include <plat/iic.h>
Sachin Kamat24f9e1f2011-08-31 15:47:16 +090032#include <plat/ehci.h>
33#include <plat/clock.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090034#include <plat/gpio-cfg.h>
35#include <plat/backlight.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090036
37#include <mach/map.h>
38
39/* Following are default values for UCON, ULCON and UFCON UART registers */
40#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
41 S3C2410_UCON_RXILEVEL | \
42 S3C2410_UCON_TXIRQMODE | \
43 S3C2410_UCON_RXIRQMODE | \
44 S3C2410_UCON_RXFIFO_TOI | \
45 S3C2443_UCON_RXERR_IRQEN)
46
47#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
48
49#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
50 S5PV210_UFCON_TXTRIG4 | \
51 S5PV210_UFCON_RXTRIG4)
52
53static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
54 [0] = {
55 .hwport = 0,
56 .flags = 0,
57 .ucon = ORIGEN_UCON_DEFAULT,
58 .ulcon = ORIGEN_ULCON_DEFAULT,
59 .ufcon = ORIGEN_UFCON_DEFAULT,
60 },
61 [1] = {
62 .hwport = 1,
63 .flags = 0,
64 .ucon = ORIGEN_UCON_DEFAULT,
65 .ulcon = ORIGEN_ULCON_DEFAULT,
66 .ufcon = ORIGEN_UFCON_DEFAULT,
67 },
68 [2] = {
69 .hwport = 2,
70 .flags = 0,
71 .ucon = ORIGEN_UCON_DEFAULT,
72 .ulcon = ORIGEN_ULCON_DEFAULT,
73 .ufcon = ORIGEN_UFCON_DEFAULT,
74 },
75 [3] = {
76 .hwport = 3,
77 .flags = 0,
78 .ucon = ORIGEN_UCON_DEFAULT,
79 .ulcon = ORIGEN_ULCON_DEFAULT,
80 .ufcon = ORIGEN_UFCON_DEFAULT,
81 },
82};
83
Inderpal Singh6e012802011-10-03 08:51:20 +090084static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
85 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
86};
87static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
88 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
89};
90static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
91 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
92};
93static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
94 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
95};
96static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
97 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
98};
99static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
100 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
101};
102static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
103 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
104};
105static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
106 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
107};
108static struct regulator_consumer_supply __initdata buck1_consumer[] = {
109 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
110};
111static struct regulator_consumer_supply __initdata buck2_consumer[] = {
112 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
113};
114static struct regulator_consumer_supply __initdata buck3_consumer[] = {
115 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
116};
117static struct regulator_consumer_supply __initdata buck7_consumer[] = {
118 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
119};
120
121static struct regulator_init_data __initdata max8997_ldo1_data = {
122 .constraints = {
123 .name = "VDD_ABB_3.3V",
124 .min_uV = 3300000,
125 .max_uV = 3300000,
126 .apply_uV = 1,
127 .state_mem = {
128 .disabled = 1,
129 },
130 },
131};
132
133static struct regulator_init_data __initdata max8997_ldo2_data = {
134 .constraints = {
135 .name = "VDD_ALIVE_1.1V",
136 .min_uV = 1100000,
137 .max_uV = 1100000,
138 .apply_uV = 1,
139 .always_on = 1,
140 .state_mem = {
141 .enabled = 1,
142 },
143 },
144};
145
146static struct regulator_init_data __initdata max8997_ldo3_data = {
147 .constraints = {
148 .name = "VMIPI_1.1V",
149 .min_uV = 1100000,
150 .max_uV = 1100000,
151 .apply_uV = 1,
152 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
153 .state_mem = {
154 .disabled = 1,
155 },
156 },
157 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
158 .consumer_supplies = ldo3_consumer,
159};
160
161static struct regulator_init_data __initdata max8997_ldo4_data = {
162 .constraints = {
163 .name = "VDD_RTC_1.8V",
164 .min_uV = 1800000,
165 .max_uV = 1800000,
166 .apply_uV = 1,
167 .always_on = 1,
168 .state_mem = {
169 .disabled = 1,
170 },
171 },
172};
173
174static struct regulator_init_data __initdata max8997_ldo6_data = {
175 .constraints = {
176 .name = "VMIPI_1.8V",
177 .min_uV = 1800000,
178 .max_uV = 1800000,
179 .apply_uV = 1,
180 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
181 .state_mem = {
182 .disabled = 1,
183 },
184 },
185 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
186 .consumer_supplies = ldo6_consumer,
187};
188
189static struct regulator_init_data __initdata max8997_ldo7_data = {
190 .constraints = {
191 .name = "VDD_AUD_1.8V",
192 .min_uV = 1800000,
193 .max_uV = 1800000,
194 .apply_uV = 1,
195 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
196 .state_mem = {
197 .disabled = 1,
198 },
199 },
200 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
201 .consumer_supplies = ldo7_consumer,
202};
203
204static struct regulator_init_data __initdata max8997_ldo8_data = {
205 .constraints = {
206 .name = "VADC_3.3V",
207 .min_uV = 3300000,
208 .max_uV = 3300000,
209 .apply_uV = 1,
210 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
211 .state_mem = {
212 .disabled = 1,
213 },
214 },
215 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
216 .consumer_supplies = ldo8_consumer,
217};
218
219static struct regulator_init_data __initdata max8997_ldo9_data = {
220 .constraints = {
221 .name = "DVDD_SWB_2.8V",
222 .min_uV = 2800000,
223 .max_uV = 2800000,
224 .apply_uV = 1,
225 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
226 .state_mem = {
227 .disabled = 1,
228 },
229 },
230 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
231 .consumer_supplies = ldo9_consumer,
232};
233
234static struct regulator_init_data __initdata max8997_ldo10_data = {
235 .constraints = {
236 .name = "VDD_PLL_1.1V",
237 .min_uV = 1100000,
238 .max_uV = 1100000,
239 .apply_uV = 1,
240 .always_on = 1,
241 .state_mem = {
242 .disabled = 1,
243 },
244 },
245};
246
247static struct regulator_init_data __initdata max8997_ldo11_data = {
248 .constraints = {
249 .name = "VDD_AUD_3V",
250 .min_uV = 3000000,
251 .max_uV = 3000000,
252 .apply_uV = 1,
253 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
254 .state_mem = {
255 .disabled = 1,
256 },
257 },
258 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
259 .consumer_supplies = ldo11_consumer,
260};
261
262static struct regulator_init_data __initdata max8997_ldo14_data = {
263 .constraints = {
264 .name = "AVDD18_SWB_1.8V",
265 .min_uV = 1800000,
266 .max_uV = 1800000,
267 .apply_uV = 1,
268 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
269 .state_mem = {
270 .disabled = 1,
271 },
272 },
273 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
274 .consumer_supplies = ldo14_consumer,
275};
276
277static struct regulator_init_data __initdata max8997_ldo17_data = {
278 .constraints = {
279 .name = "VDD_SWB_3.3V",
280 .min_uV = 3300000,
281 .max_uV = 3300000,
282 .apply_uV = 1,
283 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
284 .state_mem = {
285 .disabled = 1,
286 },
287 },
288 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
289 .consumer_supplies = ldo17_consumer,
290};
291
292static struct regulator_init_data __initdata max8997_ldo21_data = {
293 .constraints = {
294 .name = "VDD_MIF_1.2V",
295 .min_uV = 1200000,
296 .max_uV = 1200000,
297 .apply_uV = 1,
298 .always_on = 1,
299 .state_mem = {
300 .disabled = 1,
301 },
302 },
303};
304
305static struct regulator_init_data __initdata max8997_buck1_data = {
306 .constraints = {
307 .name = "VDD_ARM_1.2V",
308 .min_uV = 950000,
309 .max_uV = 1350000,
310 .always_on = 1,
311 .boot_on = 1,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
313 .state_mem = {
314 .disabled = 1,
315 },
316 },
317 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
318 .consumer_supplies = buck1_consumer,
319};
320
321static struct regulator_init_data __initdata max8997_buck2_data = {
322 .constraints = {
323 .name = "VDD_INT_1.1V",
324 .min_uV = 900000,
325 .max_uV = 1100000,
326 .always_on = 1,
327 .boot_on = 1,
328 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
329 .state_mem = {
330 .disabled = 1,
331 },
332 },
333 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
334 .consumer_supplies = buck2_consumer,
335};
336
337static struct regulator_init_data __initdata max8997_buck3_data = {
338 .constraints = {
339 .name = "VDD_G3D_1.1V",
340 .min_uV = 900000,
341 .max_uV = 1100000,
342 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
343 REGULATOR_CHANGE_STATUS,
344 .state_mem = {
345 .disabled = 1,
346 },
347 },
348 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
349 .consumer_supplies = buck3_consumer,
350};
351
352static struct regulator_init_data __initdata max8997_buck5_data = {
353 .constraints = {
354 .name = "VDDQ_M1M2_1.2V",
355 .min_uV = 1200000,
356 .max_uV = 1200000,
357 .apply_uV = 1,
358 .always_on = 1,
359 .state_mem = {
360 .disabled = 1,
361 },
362 },
363};
364
365static struct regulator_init_data __initdata max8997_buck7_data = {
366 .constraints = {
367 .name = "VDD_LCD_3.3V",
368 .min_uV = 3300000,
369 .max_uV = 3300000,
370 .boot_on = 1,
371 .apply_uV = 1,
372 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
373 .state_mem = {
374 .disabled = 1
375 },
376 },
377 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
378 .consumer_supplies = buck7_consumer,
379};
380
381static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
382 { MAX8997_LDO1, &max8997_ldo1_data },
383 { MAX8997_LDO2, &max8997_ldo2_data },
384 { MAX8997_LDO3, &max8997_ldo3_data },
385 { MAX8997_LDO4, &max8997_ldo4_data },
386 { MAX8997_LDO6, &max8997_ldo6_data },
387 { MAX8997_LDO7, &max8997_ldo7_data },
388 { MAX8997_LDO8, &max8997_ldo8_data },
389 { MAX8997_LDO9, &max8997_ldo9_data },
390 { MAX8997_LDO10, &max8997_ldo10_data },
391 { MAX8997_LDO11, &max8997_ldo11_data },
392 { MAX8997_LDO14, &max8997_ldo14_data },
393 { MAX8997_LDO17, &max8997_ldo17_data },
394 { MAX8997_LDO21, &max8997_ldo21_data },
395 { MAX8997_BUCK1, &max8997_buck1_data },
396 { MAX8997_BUCK2, &max8997_buck2_data },
397 { MAX8997_BUCK3, &max8997_buck3_data },
398 { MAX8997_BUCK5, &max8997_buck5_data },
399 { MAX8997_BUCK7, &max8997_buck7_data },
400};
401
402struct max8997_platform_data __initdata origen_max8997_pdata = {
403 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
404 .regulators = origen_max8997_regulators,
405
406 .wakeup = true,
407 .buck1_gpiodvs = false,
408 .buck2_gpiodvs = false,
409 .buck5_gpiodvs = false,
410 .irq_base = IRQ_GPIO_END + 1,
411
412 .ignore_gpiodvs_side_effect = true,
413 .buck125_default_idx = 0x0,
414
415 .buck125_gpios[0] = EXYNOS4_GPX0(0),
416 .buck125_gpios[1] = EXYNOS4_GPX0(1),
417 .buck125_gpios[2] = EXYNOS4_GPX0(2),
418
419 .buck1_voltage[0] = 1350000,
420 .buck1_voltage[1] = 1300000,
421 .buck1_voltage[2] = 1250000,
422 .buck1_voltage[3] = 1200000,
423 .buck1_voltage[4] = 1150000,
424 .buck1_voltage[5] = 1100000,
425 .buck1_voltage[6] = 1000000,
426 .buck1_voltage[7] = 950000,
427
428 .buck2_voltage[0] = 1100000,
429 .buck2_voltage[1] = 1100000,
430 .buck2_voltage[2] = 1100000,
431 .buck2_voltage[3] = 1100000,
432 .buck2_voltage[4] = 1000000,
433 .buck2_voltage[5] = 1000000,
434 .buck2_voltage[6] = 1000000,
435 .buck2_voltage[7] = 1000000,
436
437 .buck5_voltage[0] = 1200000,
438 .buck5_voltage[1] = 1200000,
439 .buck5_voltage[2] = 1200000,
440 .buck5_voltage[3] = 1200000,
441 .buck5_voltage[4] = 1200000,
442 .buck5_voltage[5] = 1200000,
443 .buck5_voltage[6] = 1200000,
444 .buck5_voltage[7] = 1200000,
445};
446
447/* I2C0 */
448static struct i2c_board_info i2c0_devs[] __initdata = {
449 {
450 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
451 .platform_data = &origen_max8997_pdata,
452 .irq = IRQ_EINT(4),
453 },
454};
455
Tushar Beheracf1dad92011-08-31 16:57:37 +0900456static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
457 .cd_type = S3C_SDHCI_CD_INTERNAL,
458 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
459};
460
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900461static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
Tushar Behera92e41ef2011-08-31 16:01:15 +0900462 .cd_type = S3C_SDHCI_CD_INTERNAL,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900463 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
464};
465
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900466/* USB EHCI */
467static struct s5p_ehci_platdata origen_ehci_pdata;
468
469static void __init origen_ehci_init(void)
470{
471 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
472
473 s5p_ehci_set_platdata(pdata);
474}
475
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900476static struct gpio_keys_button origen_gpio_keys_table[] = {
477 {
478 .code = KEY_MENU,
479 .gpio = EXYNOS4_GPX1(5),
480 .desc = "gpio-keys: KEY_MENU",
481 .type = EV_KEY,
482 .active_low = 1,
483 .wakeup = 1,
484 .debounce_interval = 1,
485 }, {
486 .code = KEY_HOME,
487 .gpio = EXYNOS4_GPX1(6),
488 .desc = "gpio-keys: KEY_HOME",
489 .type = EV_KEY,
490 .active_low = 1,
491 .wakeup = 1,
492 .debounce_interval = 1,
493 }, {
494 .code = KEY_BACK,
495 .gpio = EXYNOS4_GPX1(7),
496 .desc = "gpio-keys: KEY_BACK",
497 .type = EV_KEY,
498 .active_low = 1,
499 .wakeup = 1,
500 .debounce_interval = 1,
501 }, {
502 .code = KEY_UP,
503 .gpio = EXYNOS4_GPX2(0),
504 .desc = "gpio-keys: KEY_UP",
505 .type = EV_KEY,
506 .active_low = 1,
507 .wakeup = 1,
508 .debounce_interval = 1,
509 }, {
510 .code = KEY_DOWN,
511 .gpio = EXYNOS4_GPX2(1),
512 .desc = "gpio-keys: KEY_DOWN",
513 .type = EV_KEY,
514 .active_low = 1,
515 .wakeup = 1,
516 .debounce_interval = 1,
517 },
518};
519
520static struct gpio_keys_platform_data origen_gpio_keys_data = {
521 .buttons = origen_gpio_keys_table,
522 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
523};
524
525static struct platform_device origen_device_gpiokeys = {
526 .name = "gpio-keys",
527 .dev = {
528 .platform_data = &origen_gpio_keys_data,
529 },
530};
531
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900532static struct platform_device *origen_devices[] __initdata = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900533 &s3c_device_i2c0,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900534 &s3c_device_hsmmc2,
Tushar Beheracf1dad92011-08-31 16:57:37 +0900535 &s3c_device_hsmmc0,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900536 &s3c_device_rtc,
537 &s3c_device_wdt,
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900538 &s5p_device_ehci,
Sachin Kamat6f8eb322011-08-31 15:52:27 +0900539 &s5p_device_fimc0,
540 &s5p_device_fimc1,
541 &s5p_device_fimc2,
542 &s5p_device_fimc3,
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900543 &s5p_device_hdmi,
544 &s5p_device_i2c_hdmiphy,
545 &s5p_device_mixer,
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900546 &origen_device_gpiokeys,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900547};
548
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900549/* LCD Backlight data */
550static struct samsung_bl_gpio_info origen_bl_gpio_info = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900551 .no = EXYNOS4_GPD0(0),
552 .func = S3C_GPIO_SFN(2),
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900553};
554
555static struct platform_pwm_backlight_data origen_bl_data = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900556 .pwm_id = 0,
557 .pwm_period_ns = 1000,
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900558};
559
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900560static void __init origen_map_io(void)
561{
562 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
563 s3c24xx_init_clocks(24000000);
564 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
565}
566
Inderpal Singh6e012802011-10-03 08:51:20 +0900567static void __init origen_power_init(void)
568{
569 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
570 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
571 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
572}
573
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900574static void __init origen_machine_init(void)
575{
Inderpal Singh6e012802011-10-03 08:51:20 +0900576 origen_power_init();
577
578 s3c_i2c0_set_platdata(NULL);
579 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
580
Tushar Beheracf1dad92011-08-31 16:57:37 +0900581 /*
582 * Since sdhci instance 2 can contain a bootable media,
583 * sdhci instance 0 is registered after instance 2.
584 */
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900585 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
Tushar Beheracf1dad92011-08-31 16:57:37 +0900586 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900587
588 origen_ehci_init();
589 clk_xusbxti.rate = 24000000;
590
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900591 s5p_i2c_hdmiphy_set_platdata(NULL);
592
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900593 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900594
595 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900596}
597
598MACHINE_START(ORIGEN, "ORIGEN")
599 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
600 .boot_params = S5P_PA_SDRAM + 0x100,
601 .init_irq = exynos4_init_irq,
602 .map_io = origen_map_io,
603 .init_machine = origen_machine_init,
604 .timer = &exynos4_timer,
605MACHINE_END