blob: 76ed92dd2ef2cad902e26468dbce4d68fcd6b327 [file] [log] [blame]
Giridhar Malavali6e980162010-03-19 17:03:58 -07001/*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2008 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#ifndef __QLA_BSG_H
8#define __QLA_BSG_H
9
10/* BSG Vendor specific commands */
11#define QL_VND_LOOPBACK 0x01
12#define QL_VND_A84_RESET 0x02
13#define QL_VND_A84_UPDATE_FW 0x03
14#define QL_VND_A84_MGMT_CMD 0x04
15#define QL_VND_IIDMA 0x05
16#define QL_VND_FCP_PRIO_CFG_CMD 0x06
17
18/* BSG definations for interpreting CommandSent field */
19#define INT_DEF_LB_LOOPBACK_CMD 0
20#define INT_DEF_LB_ECHO_CMD 1
21
22/* BSG Vendor specific definations */
23#define A84_ISSUE_WRITE_TYPE_CMD 0
24#define A84_ISSUE_READ_TYPE_CMD 1
25#define A84_CLEANUP_CMD 2
26#define A84_ISSUE_RESET_OP_FW 3
27#define A84_ISSUE_RESET_DIAG_FW 4
28#define A84_ISSUE_UPDATE_OPFW_CMD 5
29#define A84_ISSUE_UPDATE_DIAGFW_CMD 6
30
31struct qla84_mgmt_param {
32 union {
33 struct {
34 uint32_t start_addr;
35 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
36 struct {
37 uint32_t id;
38#define QLA84_MGMT_CONFIG_ID_UIF 1
39#define QLA84_MGMT_CONFIG_ID_FCOE_COS 2
40#define QLA84_MGMT_CONFIG_ID_PAUSE 3
41#define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4
42
43 uint32_t param0;
44 uint32_t param1;
45 } config; /* for QLA84_MGMT_CHNG_CONFIG */
46
47 struct {
48 uint32_t type;
49#define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */
50#define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */
51#define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */
52#define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */
53#define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */
54#define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */
55#define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */
56
57 uint32_t context;
58/*
59* context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
60*/
61#define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0
62#define IC_LOG_DATA_LOG_ID_LEARN_LOG 1
63#define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2
64#define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3
65#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4
66#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5
67#define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6
68#define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7
69#define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8
70#define IC_LOG_DATA_LOG_ID_DCX_LOG 9
71
72/*
73* context definitions for QLA84_MGMT_INFO_PORT_STAT
74*/
75#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0
76#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1
77#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2
78#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3
79#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4
80#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5
81
82
83/*
84* context definitions for QLA84_MGMT_INFO_LIF_STAT
85*/
86#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0
87#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1
88#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2
89#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3
90#define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6
91
92 } info; /* for QLA84_MGMT_GET_INFO */
93 } u;
94};
95
96struct qla84_msg_mgmt {
97 uint16_t cmd;
98#define QLA84_MGMT_READ_MEM 0x00
99#define QLA84_MGMT_WRITE_MEM 0x01
100#define QLA84_MGMT_CHNG_CONFIG 0x02
101#define QLA84_MGMT_GET_INFO 0x03
102 uint16_t rsrvd;
103 struct qla84_mgmt_param mgmtp;/* parameters for cmd */
104 uint32_t len; /* bytes in payload following this struct */
105 uint8_t payload[0]; /* payload for cmd */
106};
107
108struct qla_bsg_a84_mgmt {
109 struct qla84_msg_mgmt mgmt;
110} __attribute__ ((packed));
111
112struct qla_scsi_addr {
113 uint16_t bus;
114 uint16_t target;
115} __attribute__ ((packed));
116
117struct qla_ext_dest_addr {
118 union {
119 uint8_t wwnn[8];
120 uint8_t wwpn[8];
121 uint8_t id[4];
122 struct qla_scsi_addr scsi_addr;
123 } dest_addr;
124 uint16_t dest_type;
125#define EXT_DEF_TYPE_WWPN 2
126 uint16_t lun;
127 uint16_t padding[2];
128} __attribute__ ((packed));
129
130struct qla_port_param {
131 struct qla_ext_dest_addr fc_scsi_addr;
132 uint16_t mode;
133 uint16_t speed;
134} __attribute__ ((packed));
135#endif