blob: f888a1effd433fa2eed2a97192b1806288f06484 [file] [log] [blame]
Liu Gang6ec4bed2011-11-12 20:02:28 +08001/*
2 * Freescale MPC85xx/MPC86xx RapidIO support
3 *
4 * Copyright 2009 Sysgo AG
5 * Thomas Moll <thomas.moll@sysgo.com>
6 * - fixed maintenance access routines, check for aligned access
7 *
8 * Copyright 2009 Integrated Device Technology, Inc.
9 * Alex Bounine <alexandre.bounine@idt.com>
10 * - Added Port-Write message handling
11 * - Added Machine Check exception handling
12 *
13 * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
14 * Zhang Wei <wei.zhang@freescale.com>
15 * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
16 * Liu Gang <Gang.Liu@freescale.com>
17 *
18 * Copyright 2005 MontaVista Software, Inc.
19 * Matt Porter <mporter@kernel.crashing.org>
20 *
21 * This program is free software; you can redistribute it and/or modify it
22 * under the terms of the GNU General Public License as published by the
23 * Free Software Foundation; either version 2 of the License, or (at your
24 * option) any later version.
25 */
26
27#ifndef __FSL_RIO_H
28#define __FSL_RIO_H
29
30#include <linux/rio.h>
31#include <linux/rio_drv.h>
32#include <linux/kfifo.h>
33
34#define RIO_REGS_WIN(mport) (((struct rio_priv *)(mport->priv))->regs_win)
35
36#define RIO_MAINT_WIN_SIZE 0x400000
37#define RIO_LTLEDCSR 0x0608
38
39struct rio_atmu_regs {
40 u32 rowtar;
41 u32 rowtear;
42 u32 rowbar;
43 u32 pad2;
44 u32 rowar;
45 u32 pad3[3];
46};
47
48struct rio_port_write_msg {
49 void *virt;
50 dma_addr_t phys;
51 u32 msg_count;
52 u32 err_count;
53 u32 discard_count;
54};
55
56struct rio_priv {
57 struct device *dev;
58 void __iomem *regs_win;
59 struct rio_atmu_regs __iomem *atmu_regs;
60 struct rio_atmu_regs __iomem *maint_atmu_regs;
61 void __iomem *maint_win;
62 struct rio_port_write_msg port_write_msg;
63 int pwirq;
64 struct work_struct pw_work;
65 struct kfifo pw_fifo;
66 spinlock_t pw_fifo_lock;
67 void *rmm_handle; /* RapidIO message manager(unit) Handle */
68};
69
70extern void __iomem *rio_regs_win;
71
72extern int fsl_rio_setup_rmu(struct rio_mport *mport,
73 struct device_node *node);
74extern int fsl_rio_port_write_init(struct rio_mport *mport);
75extern int fsl_rio_pw_enable(struct rio_mport *mport, int enable);
76extern void fsl_rio_port_error_handler(struct rio_mport *port, int offset);
77
78#endif