blob: 1d5f10bd78ed00d9e3dcf5124c467073fe333c30 [file] [log] [blame]
Ben Skeggs6ee73862009-12-11 19:24:15 +10001/*
2 * Copyright 2007-2008 Nouveau Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef __NOUVEAU_BIOS_H__
25#define __NOUVEAU_BIOS_H__
26
27#include "nvreg.h"
28#include "nouveau_i2c.h"
29
30#define DCB_MAX_NUM_ENTRIES 16
31#define DCB_MAX_NUM_I2C_ENTRIES 16
32#define DCB_MAX_NUM_GPIO_ENTRIES 32
33#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
34
35#define DCB_LOC_ON_CHIP 0
36
37struct dcb_entry {
38 int index; /* may not be raw dcb index if merging has happened */
39 uint8_t type;
40 uint8_t i2c_index;
41 uint8_t heads;
42 uint8_t connector;
43 uint8_t bus;
44 uint8_t location;
45 uint8_t or;
46 bool duallink_possible;
47 union {
48 struct sor_conf {
49 int link;
50 } sorconf;
51 struct {
52 int maxfreq;
53 } crtconf;
54 struct {
55 struct sor_conf sor;
56 bool use_straps_for_mode;
57 bool use_power_scripts;
58 } lvdsconf;
59 struct {
60 bool has_component_output;
61 } tvconf;
62 struct {
63 struct sor_conf sor;
64 int link_nr;
65 int link_bw;
66 } dpconf;
67 struct {
68 struct sor_conf sor;
69 } tmdsconf;
70 };
71 bool i2c_upper_default;
72};
73
74struct dcb_i2c_entry {
75 uint8_t port_type;
76 uint8_t read, write;
77 struct nouveau_i2c_chan *chan;
78};
79
80struct parsed_dcb {
81 int entries;
82 struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
83 struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
84};
85
86enum dcb_gpio_tag {
87 DCB_GPIO_TVDAC0 = 0xc,
88 DCB_GPIO_TVDAC1 = 0x2d,
89};
90
91struct dcb_gpio_entry {
92 enum dcb_gpio_tag tag;
93 int line;
94 bool invert;
95};
96
97struct parsed_dcb_gpio {
98 int entries;
99 struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
100};
101
102struct dcb_connector_table_entry {
103 uint32_t entry;
104 uint8_t type;
105 uint8_t index;
106 uint8_t gpio_tag;
107};
108
109struct dcb_connector_table {
110 int entries;
111 struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
112};
113
114struct bios_parsed_dcb {
115 uint8_t version;
116
117 struct parsed_dcb dcb;
118
119 uint8_t *i2c_table;
120 uint8_t i2c_default_indices;
121
122 uint16_t gpio_table_ptr;
123 struct parsed_dcb_gpio gpio;
124 uint16_t connector_table_ptr;
125 struct dcb_connector_table connector;
126};
127
128enum nouveau_encoder_type {
129 OUTPUT_ANALOG = 0,
130 OUTPUT_TV = 1,
131 OUTPUT_TMDS = 2,
132 OUTPUT_LVDS = 3,
133 OUTPUT_DP = 6,
134 OUTPUT_ANY = -1
135};
136
137enum nouveau_or {
138 OUTPUT_A = (1 << 0),
139 OUTPUT_B = (1 << 1),
140 OUTPUT_C = (1 << 2)
141};
142
143enum LVDS_script {
144 /* Order *does* matter here */
145 LVDS_INIT = 1,
146 LVDS_RESET,
147 LVDS_BACKLIGHT_ON,
148 LVDS_BACKLIGHT_OFF,
149 LVDS_PANEL_ON,
150 LVDS_PANEL_OFF
151};
152
153/* changing these requires matching changes to reg tables in nv_get_clock */
154#define MAX_PLL_TYPES 4
155enum pll_types {
156 NVPLL,
157 MPLL,
158 VPLL1,
159 VPLL2
160};
161
162struct pll_lims {
163 struct {
164 int minfreq;
165 int maxfreq;
166 int min_inputfreq;
167 int max_inputfreq;
168
169 uint8_t min_m;
170 uint8_t max_m;
171 uint8_t min_n;
172 uint8_t max_n;
173 } vco1, vco2;
174
175 uint8_t max_log2p;
176 /*
177 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
178 * value) is no different to 6 (at least for vplls) so allowing the MNP
179 * calc to use 7 causes the generated clock to be out by a factor of 2.
180 * however, max_log2p cannot be fixed-up during parsing as the
181 * unmodified max_log2p value is still needed for setting mplls, hence
182 * an additional max_usable_log2p member
183 */
184 uint8_t max_usable_log2p;
185 uint8_t log2p_bias;
186
187 uint8_t min_p;
188 uint8_t max_p;
189
190 int refclk;
191};
192
193struct nouveau_bios_info {
194 struct parsed_dcb *dcb;
195
196 uint8_t chip_version;
197
198 uint32_t dactestval;
199 uint32_t tvdactestval;
200 uint8_t digital_min_front_porch;
201 bool fp_no_ddc;
202};
203
204struct nvbios {
205 struct drm_device *dev;
206 struct nouveau_bios_info pub;
207
208 uint8_t data[NV_PROM_SIZE];
209 unsigned int length;
210 bool execute;
211
212 uint8_t major_version;
213 uint8_t feature_byte;
214 bool is_mobile;
215
216 uint32_t fmaxvco, fminvco;
217
218 bool old_style_init;
219 uint16_t init_script_tbls_ptr;
220 uint16_t extra_init_script_tbl_ptr;
221 uint16_t macro_index_tbl_ptr;
222 uint16_t macro_tbl_ptr;
223 uint16_t condition_tbl_ptr;
224 uint16_t io_condition_tbl_ptr;
225 uint16_t io_flag_condition_tbl_ptr;
226 uint16_t init_function_tbl_ptr;
227
228 uint16_t pll_limit_tbl_ptr;
229 uint16_t ram_restrict_tbl_ptr;
230
231 uint16_t some_script_ptr; /* BIT I + 14 */
232 uint16_t init96_tbl_ptr; /* BIT I + 16 */
233
234 struct bios_parsed_dcb bdcb;
235
236 struct {
237 int crtchead;
238 /* these need remembering across suspend */
239 uint32_t saved_nv_pfb_cfg0;
240 } state;
241
242 struct {
243 struct dcb_entry *output;
244 uint16_t script_table_ptr;
245 uint16_t dp_table_ptr;
246 } display;
247
248 struct {
249 uint16_t fptablepointer; /* also used by tmds */
250 uint16_t fpxlatetableptr;
251 int xlatwidth;
252 uint16_t lvdsmanufacturerpointer;
253 uint16_t fpxlatemanufacturertableptr;
254 uint16_t mode_ptr;
255 uint16_t xlated_entry;
256 bool power_off_for_reset;
257 bool reset_after_pclk_change;
258 bool dual_link;
259 bool link_c_increment;
260 bool BITbit1;
261 bool if_is_24bit;
262 int duallink_transition_clk;
263 uint8_t strapless_is_24bit;
264 uint8_t *edid;
265
266 /* will need resetting after suspend */
267 int last_script_invoc;
268 bool lvds_init_run;
269 } fp;
270
271 struct {
272 uint16_t output0_script_ptr;
273 uint16_t output1_script_ptr;
274 } tmds;
275
276 struct {
277 uint16_t mem_init_tbl_ptr;
278 uint16_t sdr_seq_tbl_ptr;
279 uint16_t ddr_seq_tbl_ptr;
280
281 struct {
282 uint8_t crt, tv, panel;
283 } i2c_indices;
284
285 uint16_t lvds_single_a_script_ptr;
286 } legacy;
287};
288
289#endif