blob: cd696b0aa395dd8d20d2e9bfc67d0a0fef421813 [file] [log] [blame]
Alan Kwongbb27c092016-07-20 16:41:25 -04001/*
2 * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#define pr_fmt(fmt) "sde-wb:[%s] " fmt, __func__
16
17#include <linux/jiffies.h>
18#include <linux/debugfs.h>
19
20#include "sde_encoder_phys.h"
21#include "sde_formats.h"
22#include "sde_hw_top.h"
23#include "sde_hw_interrupts.h"
24#include "sde_wb.h"
25
26/* wait for at most 2 vsync for lowest refresh rate (24hz) */
27#define WAIT_TIMEOUT_MSEC 84
28
29#define to_sde_encoder_phys_wb(x) \
30 container_of(x, struct sde_encoder_phys_wb, base)
31
32#define DEV(phy_enc) (phy_enc->parent->dev)
33
34/**
35 * sde_encoder_phys_wb_get_intr_type - get interrupt type based on block mode
36 * @hw_wb: Pointer to h/w writeback driver
37 */
38static enum sde_intr_type sde_encoder_phys_wb_get_intr_type(
39 struct sde_hw_wb *hw_wb)
40{
41 return (hw_wb->caps->features & BIT(SDE_WB_BLOCK_MODE)) ?
42 SDE_IRQ_TYPE_WB_ROT_COMP : SDE_IRQ_TYPE_WB_WFD_COMP;
43}
44
45/**
46 * sde_encoder_phys_wb_set_traffic_shaper - set traffic shaper for writeback
47 * @phys_enc: Pointer to physical encoder
48 */
49static void sde_encoder_phys_wb_set_traffic_shaper(
50 struct sde_encoder_phys *phys_enc)
51{
52 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
53 struct sde_hw_wb_cfg *wb_cfg = &wb_enc->wb_cfg;
54
55 /* traffic shaper is only enabled for rotator */
56 wb_cfg->ts_cfg.en = false;
57}
58
59/**
60 * sde_encoder_phys_setup_cdm - setup chroma down block
61 * @phys_enc: Pointer to physical encoder
62 * @fb: Pointer to output framebuffer
63 * @format: Output format
64 */
65void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc,
66 struct drm_framebuffer *fb, const struct sde_format *format,
67 struct sde_rect *wb_roi)
68{
69 struct sde_hw_cdm *hw_cdm = phys_enc->hw_cdm;
70 struct sde_hw_cdm_cfg *cdm_cfg = &phys_enc->cdm_cfg;
71 int ret;
72
73 if (!SDE_FORMAT_IS_YUV(format)) {
74 SDE_DEBUG("[cdm_disable fmt:%x]\n",
75 format->base.pixel_format);
76
77 if (hw_cdm && hw_cdm->ops.disable)
78 hw_cdm->ops.disable(hw_cdm);
79
80 return;
81 }
82
83 memset(cdm_cfg, 0, sizeof(struct sde_hw_cdm_cfg));
84
85 cdm_cfg->output_width = wb_roi->w;
86 cdm_cfg->output_height = wb_roi->h;
87 cdm_cfg->output_fmt = format;
88 cdm_cfg->output_type = CDM_CDWN_OUTPUT_WB;
89 cdm_cfg->output_bit_depth = CDM_CDWN_OUTPUT_8BIT;
90
91 /* enable 10 bit logic */
92 switch (cdm_cfg->output_fmt->chroma_sample) {
93 case SDE_CHROMA_RGB:
94 cdm_cfg->h_cdwn_type = CDM_CDWN_DISABLE;
95 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
96 break;
97 case SDE_CHROMA_H2V1:
98 cdm_cfg->h_cdwn_type = CDM_CDWN_COSITE;
99 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
100 break;
101 case SDE_CHROMA_420:
102 cdm_cfg->h_cdwn_type = CDM_CDWN_COSITE;
103 cdm_cfg->v_cdwn_type = CDM_CDWN_OFFSITE;
104 break;
105 case SDE_CHROMA_H1V2:
106 default:
107 SDE_ERROR("unsupported chroma sampling type\n");
108 cdm_cfg->h_cdwn_type = CDM_CDWN_DISABLE;
109 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
110 break;
111 }
112
113 SDE_DEBUG("[cdm_enable:%d,%d,%X,%d,%d,%d,%d]\n",
114 cdm_cfg->output_width,
115 cdm_cfg->output_height,
116 cdm_cfg->output_fmt->base.pixel_format,
117 cdm_cfg->output_type,
118 cdm_cfg->output_bit_depth,
119 cdm_cfg->h_cdwn_type,
120 cdm_cfg->v_cdwn_type);
121
122 if (hw_cdm && hw_cdm->ops.setup_cdwn) {
123 ret = hw_cdm->ops.setup_cdwn(hw_cdm, cdm_cfg);
124 if (ret < 0) {
125 SDE_ERROR("failed to setup CDM %d\n", ret);
126 return;
127 }
128 }
129
130 if (hw_cdm && hw_cdm->ops.enable) {
131 ret = hw_cdm->ops.enable(hw_cdm, cdm_cfg);
132 if (ret < 0) {
133 SDE_ERROR("failed to enable CDM %d\n", ret);
134 return;
135 }
136 }
137}
138
139/**
140 * sde_encoder_phys_wb_setup_fb - setup output framebuffer
141 * @phys_enc: Pointer to physical encoder
142 * @fb: Pointer to output framebuffer
143 * @wb_roi: Pointer to output region of interest
144 */
145static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc,
146 struct drm_framebuffer *fb, struct sde_rect *wb_roi)
147{
148 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
149 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
150 struct sde_hw_wb_cfg *wb_cfg = &wb_enc->wb_cfg;
151 const struct msm_format *format;
152 int ret, mmu_id;
153
154 memset(wb_cfg, 0, sizeof(struct sde_hw_wb_cfg));
155
156 wb_cfg->intf_mode = INTF_MODE_WB_LINE;
157 wb_cfg->is_secure = (fb->flags & DRM_MODE_FB_SECURE) ? true : false;
158 mmu_id = (wb_cfg->is_secure) ?
159 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] :
160 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE];
161
162 SDE_DEBUG("[fb_secure:%d]\n", wb_cfg->is_secure);
163
164 format = msm_framebuffer_format(fb);
165 wb_cfg->dest.format = sde_get_sde_format_ext(
166 format->pixel_format,
167 fb->modifier,
168 drm_format_num_planes(fb->pixel_format));
169 if (!wb_cfg->dest.format) {
170 /* this error should be detected during atomic_check */
171 SDE_ERROR("failed to get format %x\n", format->pixel_format);
172 return;
173 }
174
175 ret = sde_format_populate_layout_with_roi(mmu_id, fb, wb_roi,
176 &wb_cfg->dest);
177 if (ret) {
178 /* this error should be detected during atomic_check */
179 SDE_DEBUG("failed to populate layout %d\n", ret);
180 return;
181 }
182
183 if ((wb_cfg->dest.format->fetch_planes == SDE_PLANE_PLANAR) &&
184 (wb_cfg->dest.format->element[0] == C1_B_Cb))
185 swap(wb_cfg->dest.plane_addr[1], wb_cfg->dest.plane_addr[2]);
186
187 SDE_DEBUG("[fb_offset:%8.8x,%8.8x,%8.8x,%8.8x]\n",
188 wb_cfg->dest.plane_addr[0],
189 wb_cfg->dest.plane_addr[1],
190 wb_cfg->dest.plane_addr[2],
191 wb_cfg->dest.plane_addr[3]);
192 SDE_DEBUG("[fb_stride:%8.8x,%8.8x,%8.8x,%8.8x]\n",
193 wb_cfg->dest.plane_pitch[0],
194 wb_cfg->dest.plane_pitch[1],
195 wb_cfg->dest.plane_pitch[2],
196 wb_cfg->dest.plane_pitch[3]);
197
198 if (hw_wb->ops.setup_outformat)
199 hw_wb->ops.setup_outformat(hw_wb, wb_cfg);
200
201 if (hw_wb->ops.setup_outaddress)
202 hw_wb->ops.setup_outaddress(hw_wb, wb_cfg);
203}
204
205/**
206 * sde_encoder_phys_wb_setup_cdp - setup chroma down prefetch block
207 * @phys_enc: Pointer to physical encoder
208 */
209static void sde_encoder_phys_wb_setup_cdp(struct sde_encoder_phys *phys_enc)
210{
211 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
212 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
213 struct sde_hw_intf_cfg *intf_cfg = &wb_enc->intf_cfg;
214
215 memset(intf_cfg, 0, sizeof(struct sde_hw_intf_cfg));
216
217 intf_cfg->intf = SDE_NONE;
218 intf_cfg->wb = hw_wb->idx;
219
220 if (phys_enc->hw_ctl->ops.setup_intf_cfg)
221 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl,
222 intf_cfg);
223}
224
225/**
226 * sde_encoder_phys_wb_atomic_check - verify and fixup given atomic states
227 * @phys_enc: Pointer to physical encoder
228 * @crtc_state: Pointer to CRTC atomic state
229 * @conn_state: Pointer to connector atomic state
230 */
231static int sde_encoder_phys_wb_atomic_check(
232 struct sde_encoder_phys *phys_enc,
233 struct drm_crtc_state *crtc_state,
234 struct drm_connector_state *conn_state)
235{
236 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
237 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
238 const struct sde_wb_cfg *wb_cfg = hw_wb->caps;
239 struct drm_framebuffer *fb;
240 const struct sde_format *fmt;
241 struct sde_rect wb_roi;
242 const struct drm_display_mode *mode = &crtc_state->mode;
243 int rc;
244
245 SDE_DEBUG("[atomic_check:%d,%d,\"%s\",%d,%d]\n",
246 hw_wb->idx - WB_0, mode->base.id, mode->name,
247 mode->hdisplay, mode->vdisplay);
248
249 memset(&wb_roi, 0, sizeof(struct sde_rect));
250
251 rc = sde_wb_connector_state_get_output_roi(conn_state, &wb_roi);
252 if (rc) {
253 SDE_ERROR("failed to get roi %d\n", rc);
254 return rc;
255 }
256
257 SDE_DEBUG("[roi:%u,%u,%u,%u]\n", wb_roi.x, wb_roi.y,
258 wb_roi.w, wb_roi.h);
259
260 fb = sde_wb_connector_state_get_output_fb(conn_state);
261 if (!fb) {
262 SDE_ERROR("no output framebuffer\n");
263 return -EINVAL;
264 }
265
266 SDE_DEBUG("[fb_id:%u][fb:%u,%u]\n", fb->base.id,
267 fb->width, fb->height);
268
269 fmt = sde_get_sde_format_ext(fb->pixel_format, fb->modifier,
270 drm_format_num_planes(fb->pixel_format));
271 if (!fmt) {
272 SDE_ERROR("unsupported output pixel format:%d\n",
273 fb->pixel_format);
274 return -EINVAL;
275 }
276
277 SDE_DEBUG("[fb_fmt:%x,%llx]\n", fb->pixel_format,
278 fb->modifier[0]);
279
280 if (SDE_FORMAT_IS_YUV(fmt) &&
281 !(wb_cfg->features & BIT(SDE_WB_YUV_CONFIG))) {
282 SDE_ERROR("invalid output format %x\n", fmt->base.pixel_format);
283 return -EINVAL;
284 }
285
286 if (SDE_FORMAT_IS_UBWC(fmt) &&
287 !(wb_cfg->features & BIT(SDE_WB_UBWC_1_0))) {
288 SDE_ERROR("invalid output format %x\n", fmt->base.pixel_format);
289 return -EINVAL;
290 }
291
292 if (wb_roi.w && wb_roi.h) {
293 if (wb_roi.w != mode->hdisplay) {
294 SDE_ERROR("invalid roi w=%d, mode w=%d\n", wb_roi.w,
295 mode->hdisplay);
296 return -EINVAL;
297 } else if (wb_roi.h != mode->vdisplay) {
298 SDE_ERROR("invalid roi h=%d, mode h=%d\n", wb_roi.h,
299 mode->vdisplay);
300 return -EINVAL;
301 } else if (wb_roi.x + wb_roi.w > fb->width) {
302 SDE_ERROR("invalid roi x=%d, w=%d, fb w=%d\n",
303 wb_roi.x, wb_roi.w, fb->width);
304 return -EINVAL;
305 } else if (wb_roi.y + wb_roi.h > fb->height) {
306 SDE_ERROR("invalid roi y=%d, h=%d, fb h=%d\n",
307 wb_roi.y, wb_roi.h, fb->height);
308 return -EINVAL;
309 } else if (wb_roi.w > wb_cfg->sblk->maxlinewidth) {
310 SDE_ERROR("invalid roi w=%d, maxlinewidth=%u\n",
311 wb_roi.w, wb_cfg->sblk->maxlinewidth);
312 return -EINVAL;
313 }
314 } else {
315 if (wb_roi.x || wb_roi.y) {
316 SDE_ERROR("invalid roi x=%d, y=%d\n",
317 wb_roi.x, wb_roi.y);
318 return -EINVAL;
319 } else if (fb->width != mode->hdisplay) {
320 SDE_ERROR("invalid fb w=%d, mode w=%d\n", fb->width,
321 mode->hdisplay);
322 return -EINVAL;
323 } else if (fb->height != mode->vdisplay) {
324 SDE_ERROR("invalid fb h=%d, mode h=%d\n", fb->height,
325 mode->vdisplay);
326 return -EINVAL;
327 } else if (fb->width > wb_cfg->sblk->maxlinewidth) {
328 SDE_ERROR("invalid fb w=%d, maxlinewidth=%u\n",
329 fb->width, wb_cfg->sblk->maxlinewidth);
330 return -EINVAL;
331 }
332 }
333
334 return 0;
335}
336
337/**
338 * sde_encoder_phys_wb_flush - flush hardware update
339 * @phys_enc: Pointer to physical encoder
340 */
341static void sde_encoder_phys_wb_flush(struct sde_encoder_phys *phys_enc)
342{
343 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
344 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
345 struct sde_hw_ctl *hw_ctl = phys_enc->hw_ctl;
346 struct sde_hw_cdm *hw_cdm = phys_enc->hw_cdm;
347 u32 flush_mask = 0;
348
349 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
350
351 if (hw_ctl->ops.get_bitmask_wb)
352 hw_ctl->ops.get_bitmask_wb(hw_ctl, &flush_mask, hw_wb->idx);
353
354 if (hw_ctl->ops.get_bitmask_cdm && hw_cdm)
355 hw_ctl->ops.get_bitmask_cdm(hw_ctl, &flush_mask, hw_cdm->idx);
356
357 if (hw_ctl->ops.update_pending_flush)
358 hw_ctl->ops.update_pending_flush(hw_ctl, flush_mask);
359
360 SDE_DEBUG("Flushing CTL_ID %d, flush_mask %x, WB %d\n",
361 hw_ctl->idx - CTL_0, flush_mask, hw_wb->idx - WB_0);
362}
363
364/**
365 * sde_encoder_phys_wb_setup - setup writeback encoder
366 * @phys_enc: Pointer to physical encoder
367 */
368static void sde_encoder_phys_wb_setup(
369 struct sde_encoder_phys *phys_enc)
370{
371 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
372 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
373 struct drm_display_mode mode = phys_enc->cached_mode;
374 struct drm_framebuffer *fb;
375 struct sde_rect *wb_roi = &wb_enc->wb_roi;
376
377 SDE_DEBUG("[mode_set:%d,%d,\"%s\",%d,%d]\n",
378 hw_wb->idx - WB_0, mode.base.id, mode.name,
379 mode.hdisplay, mode.vdisplay);
380
381 memset(wb_roi, 0, sizeof(struct sde_rect));
382
383 fb = sde_wb_get_output_fb(wb_enc->wb_dev);
384 if (!fb) {
385 SDE_DEBUG("no output framebuffer\n");
386 return;
387 }
388
389 SDE_DEBUG("[fb_id:%u][fb:%u,%u]\n", fb->base.id,
390 fb->width, fb->height);
391
392 sde_wb_get_output_roi(wb_enc->wb_dev, wb_roi);
393 if (wb_roi->w == 0 || wb_roi->h == 0) {
394 wb_roi->x = 0;
395 wb_roi->y = 0;
396 wb_roi->w = fb->width;
397 wb_roi->h = fb->height;
398 }
399
400 SDE_DEBUG("[roi:%u,%u,%u,%u]\n", wb_roi->x, wb_roi->y,
401 wb_roi->w, wb_roi->h);
402
403 wb_enc->wb_fmt = sde_get_sde_format_ext(fb->pixel_format, fb->modifier,
404 drm_format_num_planes(fb->pixel_format));
405 if (!wb_enc->wb_fmt) {
406 SDE_ERROR("unsupported output pixel format: %d\n",
407 fb->pixel_format);
408 return;
409 }
410
411 SDE_DEBUG("[fb_fmt:%x,%llx]\n", fb->pixel_format,
412 fb->modifier[0]);
413
414 sde_encoder_phys_wb_set_traffic_shaper(phys_enc);
415
416 sde_encoder_phys_setup_cdm(phys_enc, fb, wb_enc->wb_fmt, wb_roi);
417
418 sde_encoder_phys_wb_setup_fb(phys_enc, fb, wb_roi);
419
420 sde_encoder_phys_wb_setup_cdp(phys_enc);
421}
422
423/**
424 * sde_encoder_phys_wb_unregister_irq - unregister writeback interrupt handler
425 * @phys_enc: Pointer to physical encoder
426 */
427static int sde_encoder_phys_wb_unregister_irq(
428 struct sde_encoder_phys *phys_enc)
429{
430 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
431 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
432
433 if (wb_enc->bypass_irqreg)
434 return 0;
435
436 sde_disable_irq(phys_enc->sde_kms, &wb_enc->irq_idx, 1);
437 sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx, NULL);
438
439 SDE_DEBUG("un-register IRQ for wb %d, irq_idx=%d\n",
440 hw_wb->idx - WB_0,
441 wb_enc->irq_idx);
442
443 return 0;
444}
445
446/**
447 * sde_encoder_phys_wb_done_irq - writeback interrupt handler
448 * @arg: Pointer to writeback encoder
449 * @irq_idx: interrupt index
450 */
451static void sde_encoder_phys_wb_done_irq(void *arg, int irq_idx)
452{
453 struct sde_encoder_phys_wb *wb_enc = arg;
454 struct sde_encoder_phys *phys_enc = &wb_enc->base;
455 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
456
457 SDE_DEBUG("[wb:%d,%u]\n", hw_wb->idx - WB_0,
458 wb_enc->frame_count);
459
460 complete_all(&wb_enc->wbdone_complete);
461
462 phys_enc->parent_ops.handle_vblank_virt(phys_enc->parent);
463}
464
465/**
466 * sde_encoder_phys_wb_register_irq - register writeback interrupt handler
467 * @phys_enc: Pointer to physical encoder
468 */
469static int sde_encoder_phys_wb_register_irq(struct sde_encoder_phys *phys_enc)
470{
471 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
472 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
473 struct sde_irq_callback irq_cb;
474 enum sde_intr_type intr_type;
475 int ret = 0;
476
477 if (wb_enc->bypass_irqreg)
478 return 0;
479
480 intr_type = sde_encoder_phys_wb_get_intr_type(hw_wb);
481 wb_enc->irq_idx = sde_irq_idx_lookup(phys_enc->sde_kms,
482 intr_type, hw_wb->idx);
483 if (wb_enc->irq_idx < 0) {
484 SDE_ERROR(
485 "failed to lookup IRQ index for WB_DONE with wb=%d\n",
486 hw_wb->idx - WB_0);
487 return -EINVAL;
488 }
489
490 irq_cb.func = sde_encoder_phys_wb_done_irq;
491 irq_cb.arg = wb_enc;
492 ret = sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx,
493 &irq_cb);
494 if (ret) {
495 SDE_ERROR("failed to register IRQ callback WB_DONE\n");
496 return ret;
497 }
498
499 ret = sde_enable_irq(phys_enc->sde_kms, &wb_enc->irq_idx, 1);
500 if (ret) {
501 SDE_ERROR(
502 "failed to enable IRQ for WB_DONE, wb %d, irq_idx=%d\n",
503 hw_wb->idx - WB_0,
504 wb_enc->irq_idx);
505 wb_enc->irq_idx = -EINVAL;
506
507 /* Unregister callback on IRQ enable failure */
508 sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx,
509 NULL);
510 return ret;
511 }
512
513 SDE_DEBUG("registered IRQ for wb %d, irq_idx=%d\n",
514 hw_wb->idx - WB_0,
515 wb_enc->irq_idx);
516
517 return ret;
518}
519
520/**
521 * sde_encoder_phys_wb_mode_set - set display mode
522 * @phys_enc: Pointer to physical encoder
523 * @mode: Pointer to requested display mode
524 * @adj_mode: Pointer to adjusted display mode
525 */
526static void sde_encoder_phys_wb_mode_set(
527 struct sde_encoder_phys *phys_enc,
528 struct drm_display_mode *mode,
529 struct drm_display_mode *adj_mode)
530{
531 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
532 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
533
534 phys_enc->cached_mode = *adj_mode;
535
536 SDE_DEBUG("[mode_set_cache:%d,%d,\"%s\",%d,%d]\n",
537 hw_wb->idx - WB_0, mode->base.id,
538 mode->name, mode->hdisplay, mode->vdisplay);
539}
540
541/**
542 * sde_encoder_phys_wb_control_vblank_irq - Control vblank interrupt
543 * @phys_enc: Pointer to physical encoder
544 * @enable: Enable interrupt
545 */
546static int sde_encoder_phys_wb_control_vblank_irq(
547 struct sde_encoder_phys *phys_enc,
548 bool enable)
549{
550 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
551 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
552 int ret = 0;
553
554 SDE_DEBUG("[wb:%d,%d]\n", hw_wb->idx - WB_0, enable);
555
556 if (enable)
557 ret = sde_encoder_phys_wb_register_irq(phys_enc);
558 else
559 ret = sde_encoder_phys_wb_unregister_irq(phys_enc);
560
561 if (ret)
562 SDE_ERROR("control vblank irq error %d, enable %d\n", ret,
563 enable);
564
565 return ret;
566}
567
568/**
569 * sde_encoder_phys_wb_wait_for_commit_done - wait until request is committed
570 * @phys_enc: Pointer to physical encoder
571 */
572static int sde_encoder_phys_wb_wait_for_commit_done(
573 struct sde_encoder_phys *phys_enc)
574{
575 unsigned long ret;
576 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
577 u32 irq_status;
578 u64 wb_time = 0;
579 int rc = 0;
580
581 /* Return EWOULDBLOCK since we know the wait isn't necessary */
582 if (WARN_ON(phys_enc->enable_state != SDE_ENC_ENABLED))
583 return -EWOULDBLOCK;
584
585 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, 0);
586
587 ret = wait_for_completion_timeout(&wb_enc->wbdone_complete,
588 msecs_to_jiffies(wb_enc->wbdone_timeout));
589
590 if (!ret) {
591 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, 0);
592
593 irq_status = sde_read_irq(phys_enc->sde_kms,
594 wb_enc->irq_idx, true);
595 if (irq_status) {
596 SDE_DEBUG("wb:%d done but irq not triggered\n",
597 wb_enc->wb_dev->wb_idx - WB_0);
598 sde_encoder_phys_wb_done_irq(wb_enc, wb_enc->irq_idx);
599 } else {
600 SDE_ERROR("wb:%d kickoff timed out\n",
601 wb_enc->wb_dev->wb_idx - WB_0);
602 rc = -ETIMEDOUT;
603 }
604 }
605
606 sde_encoder_phys_wb_unregister_irq(phys_enc);
607
608 if (!rc)
609 wb_enc->end_time = ktime_get();
610
611 /* once operation is done, disable traffic shaper */
612 if (wb_enc->wb_cfg.ts_cfg.en && wb_enc->hw_wb &&
613 wb_enc->hw_wb->ops.setup_trafficshaper) {
614 wb_enc->wb_cfg.ts_cfg.en = false;
615 wb_enc->hw_wb->ops.setup_trafficshaper(
616 wb_enc->hw_wb, &wb_enc->wb_cfg);
617 }
618
619 /* remove vote for iommu/clk/bus */
620 wb_enc->frame_count++;
621
622 if (!rc) {
623 wb_time = (u64)ktime_to_us(wb_enc->end_time) -
624 (u64)ktime_to_us(wb_enc->start_time);
625 SDE_DEBUG("wb:%d took %llu us\n",
626 wb_enc->wb_dev->wb_idx - WB_0, wb_time);
627 }
628
629 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, wb_time);
630
631 return rc;
632}
633
634/**
635 * sde_encoder_phys_wb_prepare_for_kickoff - pre-kickoff processing
636 * @phys_enc: Pointer to physical encoder
637 * @need_to_wait: Wait for next submission
638 */
639static void sde_encoder_phys_wb_prepare_for_kickoff(
640 struct sde_encoder_phys *phys_enc,
641 bool *need_to_wait)
642{
643 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
644 int ret;
645
646 SDE_DEBUG("[wb:%d,%u]\n", wb_enc->hw_wb->idx - WB_0,
647 wb_enc->kickoff_count);
648
649 *need_to_wait = false;
650
651 reinit_completion(&wb_enc->wbdone_complete);
652
653 ret = sde_encoder_phys_wb_register_irq(phys_enc);
654 if (ret) {
655 SDE_ERROR("failed to register irq %d\n", ret);
656 return;
657 }
658
659 wb_enc->kickoff_count++;
660
661 /* set OT limit & enable traffic shaper */
662 sde_encoder_phys_wb_setup(phys_enc);
663
664 sde_encoder_phys_wb_flush(phys_enc);
665
666 /* vote for iommu/clk/bus */
667 wb_enc->start_time = ktime_get();
668
669 MSM_EVT(DEV(phys_enc), *need_to_wait, wb_enc->kickoff_count);
670}
671
672/**
673 * sde_encoder_phys_wb_handle_post_kickoff - post-kickoff processing
674 * @phys_enc: Pointer to physical encoder
675 */
676static void sde_encoder_phys_wb_handle_post_kickoff(
677 struct sde_encoder_phys *phys_enc)
678{
679 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
680
681 SDE_DEBUG("[wb:%d]\n", wb_enc->hw_wb->idx - WB_0);
682
683 MSM_EVT(DEV(phys_enc), 0, 0);
684}
685
686/**
687 * sde_encoder_phys_wb_enable - enable writeback encoder
688 * @phys_enc: Pointer to physical encoder
689 */
690static void sde_encoder_phys_wb_enable(struct sde_encoder_phys *phys_enc)
691{
692 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
693 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
694 struct drm_connector *connector;
695
696 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
697
698 /* find associated writeback connector */
699 drm_for_each_connector(connector, phys_enc->parent->dev) {
700 if (connector->encoder == phys_enc->parent)
701 break;
702 }
703 if (!connector || connector->encoder != phys_enc->parent) {
704 SDE_ERROR("failed to find writeback connector\n");
705 return;
706 }
707 wb_enc->wb_dev = sde_wb_connector_get_wb(connector);
708
709 phys_enc->enable_state = SDE_ENC_ENABLED;
710}
711
712/**
713 * sde_encoder_phys_wb_disable - disable writeback encoder
714 * @phys_enc: Pointer to physical encoder
715 */
716static void sde_encoder_phys_wb_disable(struct sde_encoder_phys *phys_enc)
717{
718 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
719 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
720
721 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
722
723 if (phys_enc->enable_state == SDE_ENC_DISABLED) {
724 SDE_ERROR("encoder is already disabled\n");
725 return;
726 }
727
728 if (wb_enc->frame_count != wb_enc->kickoff_count) {
729 SDE_DEBUG("[wait_for_done: wb:%d, frame:%u, kickoff:%u]\n",
730 hw_wb->idx - WB_0, wb_enc->frame_count,
731 wb_enc->kickoff_count);
732 sde_encoder_phys_wb_wait_for_commit_done(phys_enc);
733 }
734
735 phys_enc->enable_state = SDE_ENC_DISABLED;
736}
737
738/**
739 * sde_encoder_phys_wb_get_hw_resources - get hardware resources
740 * @phys_enc: Pointer to physical encoder
741 * @hw_res: Pointer to encoder resources
742 */
743static void sde_encoder_phys_wb_get_hw_resources(
744 struct sde_encoder_phys *phys_enc,
745 struct sde_encoder_hw_resources *hw_res)
746{
747 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
748 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
749 const struct sde_hw_res_map *hw_res_map;
750
751 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
752
753 hw_res->wbs[hw_wb->idx] = INTF_MODE_WB_LINE;
754
755 /*
756 * Validate if we want to use the default map
757 * defaults should not be in use,
758 * otherwise signal/return failure
759 */
760 hw_res_map = sde_rm_get_res_map(phys_enc->sde_kms,
761 SDE_NONE, hw_wb->idx);
762 if (IS_ERR_OR_NULL(hw_res_map)) {
763 SDE_ERROR("failed to get hw_res_map: %ld\n",
764 PTR_ERR(hw_res_map));
765 return;
766 }
767
768 /*
769 * cached ctl_idx at init time, shouldn't we use that?
770 */
771 hw_res->ctls[hw_res_map->ctl] = true;
772}
773
774#ifdef CONFIG_DEBUG_FS
775/**
776 * sde_encoder_phys_wb_init_debugfs - initialize writeback encoder debugfs
777 * @phys_enc: Pointer to physical encoder
778 * @sde_kms: Pointer to SDE KMS object
779 */
780static int sde_encoder_phys_wb_init_debugfs(
781 struct sde_encoder_phys *phys_enc, struct sde_kms *kms)
782{
783 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
784
785 if (!phys_enc || !kms || !wb_enc->hw_wb)
786 return -EINVAL;
787
788 snprintf(wb_enc->wb_name, ARRAY_SIZE(wb_enc->wb_name), "encoder_wb%d",
789 wb_enc->hw_wb->idx - WB_0);
790
791 wb_enc->debugfs_root =
792 debugfs_create_dir(wb_enc->wb_name,
793 sde_debugfs_get_root(kms));
794 if (!wb_enc->debugfs_root) {
795 SDE_ERROR("failed to create debugfs\n");
796 return -ENOMEM;
797 }
798
799 if (!debugfs_create_u32("wbdone_timeout", 0644,
800 wb_enc->debugfs_root, &wb_enc->wbdone_timeout)) {
801 SDE_ERROR("failed to create debugfs/wbdone_timeout\n");
802 return -ENOMEM;
803 }
804
805 if (!debugfs_create_u32("bypass_irqreg", 0644,
806 wb_enc->debugfs_root, &wb_enc->bypass_irqreg)) {
807 SDE_ERROR("failed to create debugfs/bypass_irqreg\n");
808 return -ENOMEM;
809 }
810
811 return 0;
812}
813
814/**
815 * sde_encoder_phys_wb_destroy_debugfs - destroy writeback encoder debugfs
816 * @phys_enc: Pointer to physical encoder
817 */
818static void sde_encoder_phys_wb_destroy_debugfs(
819 struct sde_encoder_phys *phys_enc)
820{
821 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
822
823 if (!phys_enc)
824 return;
825
826 debugfs_remove_recursive(wb_enc->debugfs_root);
827}
828#else
829static void sde_encoder_phys_wb_init_debugfs(
830 struct sde_encoder_phys *phys_enc, struct sde_kms *kms)
831{
832}
833static void sde_encoder_phys_wb_destroy_debugfs(
834 struct sde_encoder_phys *phys_enc)
835{
836}
837#endif
838
839/**
840 * sde_encoder_phys_wb_destroy - destroy writeback encoder
841 * @phys_enc: Pointer to physical encoder
842 */
843static void sde_encoder_phys_wb_destroy(struct sde_encoder_phys *phys_enc)
844{
845 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
846 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
847
848 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
849
850 if (!phys_enc)
851 return;
852
853 sde_encoder_phys_wb_destroy_debugfs(phys_enc);
854
855 if (phys_enc->hw_ctl)
856 sde_rm_release_ctl_path(phys_enc->sde_kms,
857 phys_enc->hw_ctl->idx);
858 if (phys_enc->hw_cdm)
859 sde_rm_release_cdm_path(phys_enc->sde_kms,
860 phys_enc->hw_cdm->idx);
861 if (hw_wb)
862 sde_hw_wb_destroy(hw_wb);
863 if (phys_enc->hw_mdptop)
864 sde_hw_mdp_destroy(phys_enc->hw_mdptop);
865
866 kfree(wb_enc);
867}
868
869/**
870 * sde_encoder_phys_wb_init_ops - initialize writeback operations
871 * @ops: Pointer to encoder operation table
872 */
873static void sde_encoder_phys_wb_init_ops(struct sde_encoder_phys_ops *ops)
874{
875 ops->mode_set = sde_encoder_phys_wb_mode_set;
876 ops->enable = sde_encoder_phys_wb_enable;
877 ops->disable = sde_encoder_phys_wb_disable;
878 ops->destroy = sde_encoder_phys_wb_destroy;
879 ops->atomic_check = sde_encoder_phys_wb_atomic_check;
880 ops->get_hw_resources = sde_encoder_phys_wb_get_hw_resources;
881 ops->control_vblank_irq = sde_encoder_phys_wb_control_vblank_irq;
882 ops->wait_for_commit_done = sde_encoder_phys_wb_wait_for_commit_done;
883 ops->prepare_for_kickoff = sde_encoder_phys_wb_prepare_for_kickoff;
884 ops->handle_post_kickoff = sde_encoder_phys_wb_handle_post_kickoff;
885}
886
887/**
888 * sde_encoder_phys_wb_init - initialize writeback encoder
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400889 * @init: Pointer to init info structure with initialization params
Alan Kwongbb27c092016-07-20 16:41:25 -0400890 */
891struct sde_encoder_phys *sde_encoder_phys_wb_init(
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400892 struct sde_enc_phys_init_params *p)
Alan Kwongbb27c092016-07-20 16:41:25 -0400893{
894 struct sde_encoder_phys *phys_enc;
895 struct sde_encoder_phys_wb *wb_enc;
896 struct sde_hw_mdp *hw_mdp;
897 int ret = 0;
898
899 SDE_DEBUG("\n");
900
901 wb_enc = kzalloc(sizeof(*wb_enc), GFP_KERNEL);
902 if (!wb_enc) {
903 ret = -ENOMEM;
904 goto fail_alloc;
905 }
906 wb_enc->irq_idx = -EINVAL;
907 wb_enc->wbdone_timeout = WAIT_TIMEOUT_MSEC;
908 init_completion(&wb_enc->wbdone_complete);
909
910 phys_enc = &wb_enc->base;
911
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400912 if (p->sde_kms->vbif[VBIF_NRT]) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400913 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400914 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_NRT_UNSECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400915 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400916 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_NRT_SECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400917 } else {
918 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400919 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_UNSECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400920 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400921 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_SECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400922 }
923
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400924 hw_mdp = sde_hw_mdptop_init(MDP_TOP, p->sde_kms->mmio,
925 p->sde_kms->catalog);
Alan Kwongbb27c092016-07-20 16:41:25 -0400926 if (IS_ERR_OR_NULL(hw_mdp)) {
927 ret = PTR_ERR(hw_mdp);
928 SDE_ERROR("failed to init hw_top: %d\n", ret);
929 goto fail_mdp_init;
930 }
931 phys_enc->hw_mdptop = hw_mdp;
932
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400933 if (p->wb_idx != SDE_NONE) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400934 struct sde_hw_wb *hw_wb;
935
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400936 hw_wb = sde_hw_wb_init(p->wb_idx, p->sde_kms->mmio,
937 p->sde_kms->catalog, phys_enc->hw_mdptop);
Alan Kwongbb27c092016-07-20 16:41:25 -0400938 if (IS_ERR_OR_NULL(hw_wb)) {
939 ret = PTR_ERR(hw_wb);
940 SDE_ERROR("failed to init hw_wb%d: %d\n",
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400941 p->wb_idx - WB_0, ret);
Alan Kwongbb27c092016-07-20 16:41:25 -0400942 goto fail_wb_init;
943 }
944 wb_enc->hw_wb = hw_wb;
945 } else {
946 ret = -EINVAL;
947 SDE_ERROR("invalid wb_idx\n");
948 goto fail_wb_check;
949 }
950
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400951 if (p->cdm_idx != SDE_NONE) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400952 struct sde_hw_cdm *hw_cdm;
953
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400954 SDE_DEBUG("Acquiring CDM %d\n", p->cdm_idx - CDM_0);
955 hw_cdm = sde_rm_acquire_cdm_path(p->sde_kms, p->cdm_idx,
Alan Kwongbb27c092016-07-20 16:41:25 -0400956 phys_enc->hw_mdptop);
957 if (IS_ERR_OR_NULL(hw_cdm)) {
958 ret = PTR_ERR(hw_cdm);
959 SDE_ERROR("failed to init hw_cdm%d: %d\n",
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400960 p->cdm_idx - CDM_0, ret);
Alan Kwongbb27c092016-07-20 16:41:25 -0400961 goto fail_cdm_init;
962 }
963 phys_enc->hw_cdm = hw_cdm;
964 }
965
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400966 if (p->ctl_idx != SDE_NONE) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400967 struct sde_hw_ctl *hw_ctl;
968
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400969 SDE_DEBUG("Acquiring CTL %d\n", p->ctl_idx - CTL_0);
970 hw_ctl = sde_rm_acquire_ctl_path(p->sde_kms, p->ctl_idx);
Alan Kwongbb27c092016-07-20 16:41:25 -0400971 if (IS_ERR_OR_NULL(hw_ctl)) {
972 ret = PTR_ERR(hw_ctl);
973 SDE_ERROR("failed to init hw_ctl%d: %d\n",
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400974 p->ctl_idx - CTL_0, ret);
Alan Kwongbb27c092016-07-20 16:41:25 -0400975 goto fail_ctl_init;
976 }
977 phys_enc->hw_ctl = hw_ctl;
978 } else {
979 ret = -EINVAL;
980 SDE_ERROR("invalid ctl_idx\n");
981 goto fail_ctl_check;
982 }
983
984 sde_encoder_phys_wb_init_ops(&phys_enc->ops);
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400985 phys_enc->parent = p->parent;
986 phys_enc->parent_ops = p->parent_ops;
987 phys_enc->sde_kms = p->sde_kms;
988 phys_enc->split_role = p->split_role;
Alan Kwongbb27c092016-07-20 16:41:25 -0400989 spin_lock_init(&phys_enc->spin_lock);
990
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400991 ret = sde_encoder_phys_wb_init_debugfs(phys_enc, p->sde_kms);
Alan Kwongbb27c092016-07-20 16:41:25 -0400992 if (ret) {
993 SDE_ERROR("failed to init debugfs %d\n", ret);
994 goto fail_debugfs_init;
995 }
996
997 SDE_DEBUG("Created sde_encoder_phys_wb for wb %d\n",
998 wb_enc->hw_wb->idx - WB_0);
999
1000 return phys_enc;
1001
1002fail_debugfs_init:
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001003 sde_rm_release_ctl_path(p->sde_kms, p->ctl_idx);
Alan Kwongbb27c092016-07-20 16:41:25 -04001004fail_ctl_init:
1005fail_ctl_check:
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001006 sde_rm_release_cdm_path(p->sde_kms, p->cdm_idx);
Alan Kwongbb27c092016-07-20 16:41:25 -04001007fail_cdm_init:
1008 sde_hw_wb_destroy(wb_enc->hw_wb);
1009fail_wb_init:
1010fail_wb_check:
1011 sde_hw_mdp_destroy(phys_enc->hw_mdptop);
1012fail_mdp_init:
1013 kfree(wb_enc);
1014fail_alloc:
1015 return ERR_PTR(ret);
1016}
1017