blob: dd63408abb588fb8d6c48cd4f074ef7074113572 [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Stephen Rothwellc6efe5782011-09-28 18:32:34 +100018#include <linux/moduleparam.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030019#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030020#include <linux/mmc/sdio_func.h>
21#include "core.h"
22#include "cfg80211.h"
23#include "target.h"
24#include "debug.h"
25#include "hif-ops.h"
26
27unsigned int debug_mask;
Kalle Valo003353b0d2011-09-01 10:14:21 +030028static unsigned int testmode;
Kalle Valobdcd8172011-07-18 00:22:30 +030029
30module_param(debug_mask, uint, 0644);
Kalle Valo003353b0d2011-09-01 10:14:21 +030031module_param(testmode, uint, 0644);
Kalle Valobdcd8172011-07-18 00:22:30 +030032
33/*
34 * Include definitions here that can be used to tune the WLAN module
35 * behavior. Different customers can tune the behavior as per their needs,
36 * here.
37 */
38
39/*
40 * This configuration item enable/disable keepalive support.
41 * Keepalive support: In the absence of any data traffic to AP, null
42 * frames will be sent to the AP at periodic interval, to keep the association
43 * active. This configuration item defines the periodic interval.
44 * Use value of zero to disable keepalive support
45 * Default: 60 seconds
46 */
47#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
48
49/*
50 * This configuration item sets the value of disconnect timeout
51 * Firmware delays sending the disconnec event to the host for this
52 * timeout after is gets disconnected from the current AP.
53 * If the firmware successly roams within the disconnect timeout
54 * it sends a new connect event
55 */
56#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
57
58#define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
59
Kalle Valobdcd8172011-07-18 00:22:30 +030060#define ATH6KL_DATA_OFFSET 64
61struct sk_buff *ath6kl_buf_alloc(int size)
62{
63 struct sk_buff *skb;
64 u16 reserved;
65
66 /* Add chacheline space at front and back of buffer */
67 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +053068 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +030069 skb = dev_alloc_skb(size + reserved);
70
71 if (skb)
72 skb_reserve(skb, reserved - L1_CACHE_BYTES);
73 return skb;
74}
75
76void ath6kl_init_profile_info(struct ath6kl *ar)
77{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +053078 /* TODO: Findout vif */
79 struct ath6kl_vif *vif = ar->vif;
Kalle Valobdcd8172011-07-18 00:22:30 +030080
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +053081 vif->ssid_len = 0;
82 memset(vif->ssid, 0, sizeof(vif->ssid));
83
84 vif->dot11_auth_mode = OPEN_AUTH;
85 vif->auth_mode = NONE_AUTH;
86 vif->prwise_crypto = NONE_CRYPT;
87 vif->prwise_crypto_len = 0;
88 vif->grp_crypto = NONE_CRYPT;
89 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +053090 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +053091 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
92 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +053093 vif->bss_ch = 0;
Vasanthakumar Thiagarajanf5938f22011-10-25 19:34:03 +053094 vif->nw_type = vif->next_mode = INFRA_NETWORK;
Kalle Valobdcd8172011-07-18 00:22:30 +030095}
96
Kalle Valobdcd8172011-07-18 00:22:30 +030097static int ath6kl_set_host_app_area(struct ath6kl *ar)
98{
99 u32 address, data;
100 struct host_app_area host_app_area;
101
102 /* Fetch the address of the host_app_area_s
103 * instance in the host interest area */
104 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800105 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300106
Kalle Valoaddb44b2011-09-02 10:32:05 +0300107 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300108 return -EIO;
109
Kevin Fang31024d92011-07-11 17:14:13 +0800110 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300111 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300112 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
113 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300114 return -EIO;
115
116 return 0;
117}
118
119static inline void set_ac2_ep_map(struct ath6kl *ar,
120 u8 ac,
121 enum htc_endpoint_id ep)
122{
123 ar->ac2ep_map[ac] = ep;
124 ar->ep2ac_map[ep] = ac;
125}
126
127/* connect to a service */
128static int ath6kl_connectservice(struct ath6kl *ar,
129 struct htc_service_connect_req *con_req,
130 char *desc)
131{
132 int status;
133 struct htc_service_connect_resp response;
134
135 memset(&response, 0, sizeof(response));
136
Kalle Vaload226ec2011-08-10 09:49:12 +0300137 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300138 if (status) {
139 ath6kl_err("failed to connect to %s service status:%d\n",
140 desc, status);
141 return status;
142 }
143
144 switch (con_req->svc_id) {
145 case WMI_CONTROL_SVC:
146 if (test_bit(WMI_ENABLED, &ar->flag))
147 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
148 ar->ctrl_ep = response.endpoint;
149 break;
150 case WMI_DATA_BE_SVC:
151 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
152 break;
153 case WMI_DATA_BK_SVC:
154 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
155 break;
156 case WMI_DATA_VI_SVC:
157 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
158 break;
159 case WMI_DATA_VO_SVC:
160 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
161 break;
162 default:
163 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
164 return -EINVAL;
165 }
166
167 return 0;
168}
169
170static int ath6kl_init_service_ep(struct ath6kl *ar)
171{
172 struct htc_service_connect_req connect;
173
174 memset(&connect, 0, sizeof(connect));
175
176 /* these fields are the same for all service endpoints */
177 connect.ep_cb.rx = ath6kl_rx;
178 connect.ep_cb.rx_refill = ath6kl_rx_refill;
179 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
180
181 /*
182 * Set the max queue depth so that our ath6kl_tx_queue_full handler
183 * gets called.
184 */
185 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
186 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
187 if (!connect.ep_cb.rx_refill_thresh)
188 connect.ep_cb.rx_refill_thresh++;
189
190 /* connect to control service */
191 connect.svc_id = WMI_CONTROL_SVC;
192 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
193 return -EIO;
194
195 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
196
197 /*
198 * Limit the HTC message size on the send path, although e can
199 * receive A-MSDU frames of 4K, we will only send ethernet-sized
200 * (802.3) frames on the send path.
201 */
202 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
203
204 /*
205 * To reduce the amount of committed memory for larger A_MSDU
206 * frames, use the recv-alloc threshold mechanism for larger
207 * packets.
208 */
209 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
210 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
211
212 /*
213 * For the remaining data services set the connection flag to
214 * reduce dribbling, if configured to do so.
215 */
216 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
217 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
218 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
219
220 connect.svc_id = WMI_DATA_BE_SVC;
221
222 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
223 return -EIO;
224
225 /* connect to back-ground map this to WMI LOW_PRI */
226 connect.svc_id = WMI_DATA_BK_SVC;
227 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
228 return -EIO;
229
230 /* connect to Video service, map this to to HI PRI */
231 connect.svc_id = WMI_DATA_VI_SVC;
232 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
233 return -EIO;
234
235 /*
236 * Connect to VO service, this is currently not mapped to a WMI
237 * priority stream due to historical reasons. WMI originally
238 * defined 3 priorities over 3 mailboxes We can change this when
239 * WMI is reworked so that priorities are not dependent on
240 * mailboxes.
241 */
242 connect.svc_id = WMI_DATA_VO_SVC;
243 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
244 return -EIO;
245
246 return 0;
247}
248
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530249void ath6kl_init_control_info(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300250{
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530251 /* TODO: Findout vif */
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530252 struct ath6kl_vif *vif = ar->vif;
253
Kalle Valobdcd8172011-07-18 00:22:30 +0300254 ath6kl_init_profile_info(ar);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530255 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530256 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530257 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300258}
259
260/*
261 * Set HTC/Mbox operational parameters, this can only be called when the
262 * target is in the BMI phase.
263 */
264static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
265 u8 htc_ctrl_buf)
266{
267 int status;
268 u32 blk_size;
269
270 blk_size = ar->mbox_info.block_size;
271
272 if (htc_ctrl_buf)
273 blk_size |= ((u32)htc_ctrl_buf) << 16;
274
275 /* set the host interest area for the block size */
276 status = ath6kl_bmi_write(ar,
277 ath6kl_get_hi_item_addr(ar,
278 HI_ITEM(hi_mbox_io_block_sz)),
279 (u8 *)&blk_size,
280 4);
281 if (status) {
282 ath6kl_err("bmi_write_memory for IO block size failed\n");
283 goto out;
284 }
285
286 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
287 blk_size,
288 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
289
290 if (mbox_isr_yield_val) {
291 /* set the host interest area for the mbox ISR yield limit */
292 status = ath6kl_bmi_write(ar,
293 ath6kl_get_hi_item_addr(ar,
294 HI_ITEM(hi_mbox_isr_yield_limit)),
295 (u8 *)&mbox_isr_yield_val,
296 4);
297 if (status) {
298 ath6kl_err("bmi_write_memory for yield limit failed\n");
299 goto out;
300 }
301 }
302
303out:
304 return status;
305}
306
307#define REG_DUMP_COUNT_AR6003 60
308#define REGISTER_DUMP_LEN_MAX 60
309
310static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
311{
312 u32 address;
313 u32 regdump_loc = 0;
314 int status;
315 u32 regdump_val[REGISTER_DUMP_LEN_MAX];
316 u32 i;
317
318 if (ar->target_type != TARGET_TYPE_AR6003)
319 return;
320
321 /* the reg dump pointer is copied to the host interest area */
322 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
Kevin Fang31024d92011-07-11 17:14:13 +0800323 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300324
325 /* read RAM location through diagnostic window */
Kalle Valoaddb44b2011-09-02 10:32:05 +0300326 status = ath6kl_diag_read32(ar, address, &regdump_loc);
Kalle Valobdcd8172011-07-18 00:22:30 +0300327
328 if (status || !regdump_loc) {
329 ath6kl_err("failed to get ptr to register dump area\n");
330 return;
331 }
332
333 ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
334 regdump_loc);
Kevin Fang31024d92011-07-11 17:14:13 +0800335 regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
Kalle Valobdcd8172011-07-18 00:22:30 +0300336
337 /* fetch register dump data */
Kalle Valoaddb44b2011-09-02 10:32:05 +0300338 status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
339 REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
Kalle Valobdcd8172011-07-18 00:22:30 +0300340
341 if (status) {
342 ath6kl_err("failed to get register dump\n");
343 return;
344 }
345 ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
346
347 for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
348 ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
349 i, regdump_val[i]);
350
351}
352
353void ath6kl_target_failure(struct ath6kl *ar)
354{
355 ath6kl_err("target asserted\n");
356
357 /* try dumping target assertion information (if any) */
358 ath6kl_dump_target_assert_info(ar);
359
360}
361
362static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
363{
364 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300365 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300366
367 /*
368 * Configure the device for rx dot11 header rules. "0,0" are the
369 * default values. Required if checksum offload is needed. Set
370 * RxMetaVersion to 2.
371 */
372 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
373 ar->rx_meta_ver, 0, 0)) {
374 ath6kl_err("unable to set the rx frame format\n");
375 status = -EIO;
376 }
377
378 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
379 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
380 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
381 ath6kl_err("unable to set power save fail event policy\n");
382 status = -EIO;
383 }
384
385 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
386 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
387 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
388 ath6kl_err("unable to set barker preamble policy\n");
389 status = -EIO;
390 }
391
392 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
393 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
394 ath6kl_err("unable to set keep alive interval\n");
395 status = -EIO;
396 }
397
398 if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
399 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
400 ath6kl_err("unable to set disconnect timeout\n");
401 status = -EIO;
402 }
403
404 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
405 if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
406 ath6kl_err("unable to set txop bursting\n");
407 status = -EIO;
408 }
409
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300410 if (ar->p2p) {
411 ret = ath6kl_wmi_info_req_cmd(ar->wmi,
412 P2P_FLAG_CAPABILITIES_REQ |
413 P2P_FLAG_MACADDR_REQ |
414 P2P_FLAG_HMODEL_REQ);
415 if (ret) {
416 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
417 "capabilities (%d) - assuming P2P not "
418 "supported\n", ret);
419 ar->p2p = 0;
420 }
421 }
422
423 if (ar->p2p) {
424 /* Enable Probe Request reporting for P2P */
425 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
426 if (ret) {
427 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
428 "Request reporting (%d)\n", ret);
429 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300430 }
431
Kalle Valobdcd8172011-07-18 00:22:30 +0300432 return status;
433}
434
435int ath6kl_configure_target(struct ath6kl *ar)
436{
437 u32 param, ram_reserved_size;
438 u8 fw_iftype;
439
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530440 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300441
442 /* Tell target which HTC version it is used*/
443 param = HTC_PROTOCOL_VERSION;
444 if (ath6kl_bmi_write(ar,
445 ath6kl_get_hi_item_addr(ar,
446 HI_ITEM(hi_app_host_interest)),
447 (u8 *)&param, 4) != 0) {
448 ath6kl_err("bmi_write_memory for htc version failed\n");
449 return -EIO;
450 }
451
452 /* set the firmware mode to STA/IBSS/AP */
453 param = 0;
454
455 if (ath6kl_bmi_read(ar,
456 ath6kl_get_hi_item_addr(ar,
457 HI_ITEM(hi_option_flag)),
458 (u8 *)&param, 4) != 0) {
459 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
460 return -EIO;
461 }
462
463 param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
464 param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300465 if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) {
466 param |= HI_OPTION_FW_SUBMODE_P2PDEV <<
467 HI_OPTION_FW_SUBMODE_SHIFT;
468 }
Kalle Valobdcd8172011-07-18 00:22:30 +0300469 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
470 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
471
472 if (ath6kl_bmi_write(ar,
473 ath6kl_get_hi_item_addr(ar,
474 HI_ITEM(hi_option_flag)),
475 (u8 *)&param,
476 4) != 0) {
477 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
478 return -EIO;
479 }
480
481 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
482
483 /*
484 * Hardcode the address use for the extended board data
485 * Ideally this should be pre-allocate by the OS at boot time
486 * But since it is a new feature and board data is loaded
487 * at init time, we have to workaround this from host.
488 * It is difficult to patch the firmware boot code,
489 * but possible in theory.
490 */
491
Kalle Valo991b27e2011-09-07 10:55:17 +0300492 param = ar->hw.board_ext_data_addr;
493 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300494
Kalle Valo991b27e2011-09-07 10:55:17 +0300495 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
496 HI_ITEM(hi_board_ext_data)),
497 (u8 *)&param, 4) != 0) {
498 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
499 return -EIO;
500 }
501
502 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
503 HI_ITEM(hi_end_ram_reserve_sz)),
504 (u8 *)&ram_reserved_size, 4) != 0) {
505 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
506 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300507 }
508
509 /* set the block size for the target */
510 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
511 /* use default number of control buffers */
512 return -EIO;
513
514 return 0;
515}
516
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530517void ath6kl_core_free(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300518{
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530519 wiphy_free(ar->wiphy);
Kalle Valobdcd8172011-07-18 00:22:30 +0300520}
521
522int ath6kl_unavail_ev(struct ath6kl *ar)
523{
524 ath6kl_destroy(ar->net_dev, 1);
525
526 return 0;
527}
528
529/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300530static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
531 u8 **fw, size_t *fw_len)
532{
533 const struct firmware *fw_entry;
534 int ret;
535
536 ret = request_firmware(&fw_entry, filename, ar->dev);
537 if (ret)
538 return ret;
539
540 *fw_len = fw_entry->size;
541 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
542
543 if (*fw == NULL)
544 ret = -ENOMEM;
545
546 release_firmware(fw_entry);
547
548 return ret;
549}
550
Sam Leffler92ecbff2011-09-07 10:55:16 +0300551#ifdef CONFIG_OF
552static const char *get_target_ver_dir(const struct ath6kl *ar)
553{
554 switch (ar->version.target_ver) {
555 case AR6003_REV1_VERSION:
556 return "ath6k/AR6003/hw1.0";
557 case AR6003_REV2_VERSION:
558 return "ath6k/AR6003/hw2.0";
559 case AR6003_REV3_VERSION:
560 return "ath6k/AR6003/hw2.1.1";
561 }
562 ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
563 ar->version.target_ver);
564 return NULL;
565}
566
567/*
568 * Check the device tree for a board-id and use it to construct
569 * the pathname to the firmware file. Used (for now) to find a
570 * fallback to the "bdata.bin" file--typically a symlink to the
571 * appropriate board-specific file.
572 */
573static bool check_device_tree(struct ath6kl *ar)
574{
575 static const char *board_id_prop = "atheros,board-id";
576 struct device_node *node;
577 char board_filename[64];
578 const char *board_id;
579 int ret;
580
581 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
582 board_id = of_get_property(node, board_id_prop, NULL);
583 if (board_id == NULL) {
584 ath6kl_warn("No \"%s\" property on %s node.\n",
585 board_id_prop, node->name);
586 continue;
587 }
588 snprintf(board_filename, sizeof(board_filename),
589 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
590
591 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
592 &ar->fw_board_len);
593 if (ret) {
594 ath6kl_err("Failed to get DT board file %s: %d\n",
595 board_filename, ret);
596 continue;
597 }
598 return true;
599 }
600 return false;
601}
602#else
603static bool check_device_tree(struct ath6kl *ar)
604{
605 return false;
606}
607#endif /* CONFIG_OF */
608
Kalle Valobdcd8172011-07-18 00:22:30 +0300609static int ath6kl_fetch_board_file(struct ath6kl *ar)
610{
611 const char *filename;
612 int ret;
613
Kalle Valo772c31e2011-09-07 10:55:16 +0300614 if (ar->fw_board != NULL)
615 return 0;
616
Kalle Valobdcd8172011-07-18 00:22:30 +0300617 switch (ar->version.target_ver) {
618 case AR6003_REV2_VERSION:
619 filename = AR6003_REV2_BOARD_DATA_FILE;
620 break;
Kevin Fang31024d92011-07-11 17:14:13 +0800621 case AR6004_REV1_VERSION:
622 filename = AR6004_REV1_BOARD_DATA_FILE;
623 break;
Kalle Valobdcd8172011-07-18 00:22:30 +0300624 default:
625 filename = AR6003_REV3_BOARD_DATA_FILE;
626 break;
627 }
628
629 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
630 &ar->fw_board_len);
631 if (ret == 0) {
632 /* managed to get proper board file */
633 return 0;
634 }
635
Sam Leffler92ecbff2011-09-07 10:55:16 +0300636 if (check_device_tree(ar)) {
637 /* got board file from device tree */
638 return 0;
639 }
640
Kalle Valobdcd8172011-07-18 00:22:30 +0300641 /* there was no proper board file, try to use default instead */
642 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
643 filename, ret);
644
645 switch (ar->version.target_ver) {
646 case AR6003_REV2_VERSION:
647 filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
648 break;
Kevin Fang31024d92011-07-11 17:14:13 +0800649 case AR6004_REV1_VERSION:
650 filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
651 break;
Kalle Valobdcd8172011-07-18 00:22:30 +0300652 default:
653 filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
654 break;
655 }
656
657 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
658 &ar->fw_board_len);
659 if (ret) {
660 ath6kl_err("Failed to get default board file %s: %d\n",
661 filename, ret);
662 return ret;
663 }
664
665 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
666 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
667
668 return 0;
669}
670
Kalle Valo772c31e2011-09-07 10:55:16 +0300671static int ath6kl_fetch_otp_file(struct ath6kl *ar)
672{
673 const char *filename;
674 int ret;
675
676 if (ar->fw_otp != NULL)
677 return 0;
678
679 switch (ar->version.target_ver) {
680 case AR6003_REV2_VERSION:
681 filename = AR6003_REV2_OTP_FILE;
682 break;
683 case AR6004_REV1_VERSION:
684 ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
685 return 0;
686 break;
687 default:
688 filename = AR6003_REV3_OTP_FILE;
689 break;
690 }
691
692 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
693 &ar->fw_otp_len);
694 if (ret) {
695 ath6kl_err("Failed to get OTP file %s: %d\n",
696 filename, ret);
697 return ret;
698 }
699
700 return 0;
701}
702
703static int ath6kl_fetch_fw_file(struct ath6kl *ar)
704{
705 const char *filename;
706 int ret;
707
708 if (ar->fw != NULL)
709 return 0;
710
711 if (testmode) {
712 switch (ar->version.target_ver) {
713 case AR6003_REV2_VERSION:
714 filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
715 break;
716 case AR6003_REV3_VERSION:
717 filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
718 break;
719 case AR6004_REV1_VERSION:
720 ath6kl_warn("testmode not supported with ar6004\n");
721 return -EOPNOTSUPP;
722 default:
723 ath6kl_warn("unknown target version: 0x%x\n",
724 ar->version.target_ver);
725 return -EINVAL;
726 }
727
728 set_bit(TESTMODE, &ar->flag);
729
730 goto get_fw;
731 }
732
733 switch (ar->version.target_ver) {
734 case AR6003_REV2_VERSION:
735 filename = AR6003_REV2_FIRMWARE_FILE;
736 break;
737 case AR6004_REV1_VERSION:
738 filename = AR6004_REV1_FIRMWARE_FILE;
739 break;
740 default:
741 filename = AR6003_REV3_FIRMWARE_FILE;
742 break;
743 }
744
745get_fw:
746 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
747 if (ret) {
748 ath6kl_err("Failed to get firmware file %s: %d\n",
749 filename, ret);
750 return ret;
751 }
752
753 return 0;
754}
755
756static int ath6kl_fetch_patch_file(struct ath6kl *ar)
757{
758 const char *filename;
759 int ret;
760
761 switch (ar->version.target_ver) {
762 case AR6003_REV2_VERSION:
763 filename = AR6003_REV2_PATCH_FILE;
764 break;
765 case AR6004_REV1_VERSION:
766 /* FIXME: implement for AR6004 */
767 return 0;
768 break;
769 default:
770 filename = AR6003_REV3_PATCH_FILE;
771 break;
772 }
773
774 if (ar->fw_patch == NULL) {
775 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
776 &ar->fw_patch_len);
777 if (ret) {
778 ath6kl_err("Failed to get patch file %s: %d\n",
779 filename, ret);
780 return ret;
781 }
782 }
783
784 return 0;
785}
786
Kalle Valo50d41232011-09-07 10:55:17 +0300787static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300788{
789 int ret;
790
Kalle Valo772c31e2011-09-07 10:55:16 +0300791 ret = ath6kl_fetch_otp_file(ar);
792 if (ret)
793 return ret;
794
795 ret = ath6kl_fetch_fw_file(ar);
796 if (ret)
797 return ret;
798
799 ret = ath6kl_fetch_patch_file(ar);
800 if (ret)
801 return ret;
802
803 return 0;
804}
Kalle Valobdcd8172011-07-18 00:22:30 +0300805
Kalle Valo50d41232011-09-07 10:55:17 +0300806static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
807{
808 size_t magic_len, len, ie_len;
809 const struct firmware *fw;
810 struct ath6kl_fw_ie *hdr;
811 const char *filename;
812 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300813 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300814 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300815
816 switch (ar->version.target_ver) {
817 case AR6003_REV2_VERSION:
818 filename = AR6003_REV2_FIRMWARE_2_FILE;
819 break;
820 case AR6003_REV3_VERSION:
821 filename = AR6003_REV3_FIRMWARE_2_FILE;
822 break;
823 case AR6004_REV1_VERSION:
824 filename = AR6004_REV1_FIRMWARE_2_FILE;
825 break;
826 default:
827 return -EOPNOTSUPP;
828 }
829
830 ret = request_firmware(&fw, filename, ar->dev);
831 if (ret)
832 return ret;
833
834 data = fw->data;
835 len = fw->size;
836
837 /* magic also includes the null byte, check that as well */
838 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
839
840 if (len < magic_len) {
841 ret = -EINVAL;
842 goto out;
843 }
844
845 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
846 ret = -EINVAL;
847 goto out;
848 }
849
850 len -= magic_len;
851 data += magic_len;
852
853 /* loop elements */
854 while (len > sizeof(struct ath6kl_fw_ie)) {
855 /* hdr is unaligned! */
856 hdr = (struct ath6kl_fw_ie *) data;
857
858 ie_id = le32_to_cpup(&hdr->id);
859 ie_len = le32_to_cpup(&hdr->len);
860
861 len -= sizeof(*hdr);
862 data += sizeof(*hdr);
863
864 if (len < ie_len) {
865 ret = -EINVAL;
866 goto out;
867 }
868
869 switch (ie_id) {
870 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300871 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300872 ie_len);
873
Kalle Valo50d41232011-09-07 10:55:17 +0300874 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
875
876 if (ar->fw_otp == NULL) {
877 ret = -ENOMEM;
878 goto out;
879 }
880
881 ar->fw_otp_len = ie_len;
882 break;
883 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300884 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300885 ie_len);
886
Kalle Valo50d41232011-09-07 10:55:17 +0300887 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
888
889 if (ar->fw == NULL) {
890 ret = -ENOMEM;
891 goto out;
892 }
893
894 ar->fw_len = ie_len;
895 break;
896 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300897 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300898 ie_len);
899
Kalle Valo50d41232011-09-07 10:55:17 +0300900 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
901
902 if (ar->fw_patch == NULL) {
903 ret = -ENOMEM;
904 goto out;
905 }
906
907 ar->fw_patch_len = ie_len;
908 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300909 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
910 val = (__le32 *) data;
911 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300912
913 ath6kl_dbg(ATH6KL_DBG_BOOT,
914 "found reserved ram size ie 0x%d\n",
915 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300916 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300917 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo6bc36432011-09-27 14:31:11 +0300918 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300919 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300920 ie_len);
921
Kalle Valo97e04962011-09-12 13:47:34 +0300922 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
923 index = ALIGN(i, 8) / 8;
924 bit = i % 8;
925
926 if (data[index] & (1 << bit))
927 __set_bit(i, ar->fw_capabilities);
928 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300929
930 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
931 ar->fw_capabilities,
932 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300933 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300934 case ATH6KL_FW_IE_PATCH_ADDR:
935 if (ie_len != sizeof(*val))
936 break;
937
938 val = (__le32 *) data;
939 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300940
941 ath6kl_dbg(ATH6KL_DBG_BOOT,
942 "found patch address ie 0x%d\n",
943 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +0300944 break;
Kalle Valo50d41232011-09-07 10:55:17 +0300945 default:
Kalle Valo6bc36432011-09-27 14:31:11 +0300946 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +0300947 le32_to_cpup(&hdr->id));
948 break;
949 }
950
951 len -= ie_len;
952 data += ie_len;
953 };
954
955 ret = 0;
956out:
957 release_firmware(fw);
958
959 return ret;
960}
961
962static int ath6kl_fetch_firmwares(struct ath6kl *ar)
963{
964 int ret;
965
966 ret = ath6kl_fetch_board_file(ar);
967 if (ret)
968 return ret;
969
970 ret = ath6kl_fetch_fw_api2(ar);
Kalle Valo6bc36432011-09-27 14:31:11 +0300971 if (ret == 0) {
972 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
Kalle Valo50d41232011-09-07 10:55:17 +0300973 return 0;
Kalle Valo6bc36432011-09-27 14:31:11 +0300974 }
Kalle Valo50d41232011-09-07 10:55:17 +0300975
976 ret = ath6kl_fetch_fw_api1(ar);
977 if (ret)
978 return ret;
979
Kalle Valo6bc36432011-09-27 14:31:11 +0300980 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
981
Kalle Valo50d41232011-09-07 10:55:17 +0300982 return 0;
983}
984
Kalle Valobdcd8172011-07-18 00:22:30 +0300985static int ath6kl_upload_board_file(struct ath6kl *ar)
986{
987 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +0800988 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300989 int ret;
990
Kalle Valo772c31e2011-09-07 10:55:16 +0300991 if (WARN_ON(ar->fw_board == NULL))
992 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +0300993
Kevin Fang31024d92011-07-11 17:14:13 +0800994 /*
995 * Determine where in Target RAM to write Board Data.
996 * For AR6004, host determine Target RAM address for
997 * writing board data.
998 */
999 if (ar->target_type == TARGET_TYPE_AR6004) {
1000 board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
1001 ath6kl_bmi_write(ar,
1002 ath6kl_get_hi_item_addr(ar,
1003 HI_ITEM(hi_board_data)),
1004 (u8 *) &board_address, 4);
1005 } else {
1006 ath6kl_bmi_read(ar,
1007 ath6kl_get_hi_item_addr(ar,
1008 HI_ITEM(hi_board_data)),
1009 (u8 *) &board_address, 4);
1010 }
1011
Kalle Valobdcd8172011-07-18 00:22:30 +03001012 /* determine where in target ram to write extended board data */
1013 ath6kl_bmi_read(ar,
1014 ath6kl_get_hi_item_addr(ar,
1015 HI_ITEM(hi_board_ext_data)),
1016 (u8 *) &board_ext_address, 4);
1017
Kalle Valobdcd8172011-07-18 00:22:30 +03001018 if (board_ext_address == 0) {
1019 ath6kl_err("Failed to get board file target address.\n");
1020 return -EINVAL;
1021 }
1022
Kevin Fang31024d92011-07-11 17:14:13 +08001023 switch (ar->target_type) {
1024 case TARGET_TYPE_AR6003:
1025 board_data_size = AR6003_BOARD_DATA_SZ;
1026 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1027 break;
1028 case TARGET_TYPE_AR6004:
1029 board_data_size = AR6004_BOARD_DATA_SZ;
1030 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1031 break;
1032 default:
1033 WARN_ON(1);
1034 return -EINVAL;
1035 break;
1036 }
1037
1038 if (ar->fw_board_len == (board_data_size +
1039 board_ext_data_size)) {
1040
Kalle Valobdcd8172011-07-18 00:22:30 +03001041 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001042 ath6kl_dbg(ATH6KL_DBG_BOOT,
1043 "writing extended board data to 0x%x (%d B)\n",
1044 board_ext_address, board_ext_data_size);
1045
Kalle Valobdcd8172011-07-18 00:22:30 +03001046 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001047 ar->fw_board + board_data_size,
1048 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001049 if (ret) {
1050 ath6kl_err("Failed to write extended board data: %d\n",
1051 ret);
1052 return ret;
1053 }
1054
1055 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001056 param = (board_ext_data_size << 16) | 1;
1057
Kalle Valobdcd8172011-07-18 00:22:30 +03001058 ath6kl_bmi_write(ar,
1059 ath6kl_get_hi_item_addr(ar,
1060 HI_ITEM(hi_board_ext_data_config)),
1061 (unsigned char *) &param, 4);
1062 }
1063
Kevin Fang31024d92011-07-11 17:14:13 +08001064 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001065 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1066 ret = -EINVAL;
1067 return ret;
1068 }
1069
Kalle Valo6bc36432011-09-27 14:31:11 +03001070 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1071 board_address, board_data_size);
1072
Kalle Valobdcd8172011-07-18 00:22:30 +03001073 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001074 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001075
1076 if (ret) {
1077 ath6kl_err("Board file bmi write failed: %d\n", ret);
1078 return ret;
1079 }
1080
1081 /* record the fact that Board Data IS initialized */
1082 param = 1;
1083 ath6kl_bmi_write(ar,
1084 ath6kl_get_hi_item_addr(ar,
1085 HI_ITEM(hi_board_data_initialized)),
1086 (u8 *)&param, 4);
1087
1088 return ret;
1089}
1090
1091static int ath6kl_upload_otp(struct ath6kl *ar)
1092{
Kalle Valobdcd8172011-07-18 00:22:30 +03001093 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001094 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001095 int ret;
1096
Kalle Valo772c31e2011-09-07 10:55:16 +03001097 if (WARN_ON(ar->fw_otp == NULL))
1098 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001099
Kalle Valoa01ac412011-09-07 10:55:17 +03001100 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001101
Kalle Valoef548622011-10-01 09:43:09 +03001102 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001103 ar->fw_otp_len);
1104
Kalle Valobdcd8172011-07-18 00:22:30 +03001105 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1106 ar->fw_otp_len);
1107 if (ret) {
1108 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1109 return ret;
1110 }
1111
Kalle Valo639d0b82011-09-12 12:48:09 +03001112 /* read firmware start address */
1113 ret = ath6kl_bmi_read(ar,
1114 ath6kl_get_hi_item_addr(ar,
1115 HI_ITEM(hi_app_start)),
1116 (u8 *) &address, sizeof(address));
1117
1118 if (ret) {
1119 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1120 return ret;
1121 }
1122
Kalle Valobef26a72011-10-12 09:58:28 +03001123 if (ar->hw.app_start_override_addr == 0) {
1124 ar->hw.app_start_override_addr = address;
1125 from_hw = true;
1126 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001127
Kalle Valobef26a72011-10-12 09:58:28 +03001128 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1129 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001130 ar->hw.app_start_override_addr);
1131
Kalle Valobdcd8172011-07-18 00:22:30 +03001132 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001133 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1134 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001135 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001136 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001137
1138 return ret;
1139}
1140
1141static int ath6kl_upload_firmware(struct ath6kl *ar)
1142{
Kalle Valobdcd8172011-07-18 00:22:30 +03001143 u32 address;
1144 int ret;
1145
Kalle Valo772c31e2011-09-07 10:55:16 +03001146 if (WARN_ON(ar->fw == NULL))
1147 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001148
Kalle Valoa01ac412011-09-07 10:55:17 +03001149 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001150
Kalle Valoef548622011-10-01 09:43:09 +03001151 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001152 address, ar->fw_len);
1153
Kalle Valobdcd8172011-07-18 00:22:30 +03001154 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1155
1156 if (ret) {
1157 ath6kl_err("Failed to write firmware: %d\n", ret);
1158 return ret;
1159 }
1160
Kevin Fang31024d92011-07-11 17:14:13 +08001161 /*
1162 * Set starting address for firmware
1163 * Don't need to setup app_start override addr on AR6004
1164 */
1165 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001166 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001167 ath6kl_bmi_set_app_start(ar, address);
1168 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001169 return ret;
1170}
1171
1172static int ath6kl_upload_patch(struct ath6kl *ar)
1173{
Kalle Valobdcd8172011-07-18 00:22:30 +03001174 u32 address, param;
1175 int ret;
1176
Kalle Valo772c31e2011-09-07 10:55:16 +03001177 if (WARN_ON(ar->fw_patch == NULL))
1178 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001179
Kalle Valoa01ac412011-09-07 10:55:17 +03001180 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001181
Kalle Valoef548622011-10-01 09:43:09 +03001182 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001183 address, ar->fw_patch_len);
1184
Kalle Valobdcd8172011-07-18 00:22:30 +03001185 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1186 if (ret) {
1187 ath6kl_err("Failed to write patch file: %d\n", ret);
1188 return ret;
1189 }
1190
1191 param = address;
1192 ath6kl_bmi_write(ar,
1193 ath6kl_get_hi_item_addr(ar,
1194 HI_ITEM(hi_dset_list_head)),
1195 (unsigned char *) &param, 4);
1196
1197 return 0;
1198}
1199
1200static int ath6kl_init_upload(struct ath6kl *ar)
1201{
1202 u32 param, options, sleep, address;
1203 int status = 0;
1204
Kevin Fang31024d92011-07-11 17:14:13 +08001205 if (ar->target_type != TARGET_TYPE_AR6003 &&
1206 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001207 return -EINVAL;
1208
1209 /* temporarily disable system sleep */
1210 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1211 status = ath6kl_bmi_reg_read(ar, address, &param);
1212 if (status)
1213 return status;
1214
1215 options = param;
1216
1217 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1218 status = ath6kl_bmi_reg_write(ar, address, param);
1219 if (status)
1220 return status;
1221
1222 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1223 status = ath6kl_bmi_reg_read(ar, address, &param);
1224 if (status)
1225 return status;
1226
1227 sleep = param;
1228
1229 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1230 status = ath6kl_bmi_reg_write(ar, address, param);
1231 if (status)
1232 return status;
1233
1234 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1235 options, sleep);
1236
1237 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001238 /* no need to control 40/44MHz clock on AR6004 */
1239 if (ar->target_type != TARGET_TYPE_AR6004) {
1240 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1241 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001242
Kevin Fang31024d92011-07-11 17:14:13 +08001243 if (status)
1244 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001245
Kevin Fang31024d92011-07-11 17:14:13 +08001246 /* Run at 80/88MHz by default */
1247 param = SM(CPU_CLOCK_STANDARD, 1);
1248
1249 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1250 status = ath6kl_bmi_reg_write(ar, address, param);
1251 if (status)
1252 return status;
1253 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001254
1255 param = 0;
1256 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1257 param = SM(LPO_CAL_ENABLE, 1);
1258 status = ath6kl_bmi_reg_write(ar, address, param);
1259 if (status)
1260 return status;
1261
1262 /* WAR to avoid SDIO CRC err */
1263 if (ar->version.target_ver == AR6003_REV2_VERSION) {
1264 ath6kl_err("temporary war to avoid sdio crc error\n");
1265
1266 param = 0x20;
1267
1268 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1269 status = ath6kl_bmi_reg_write(ar, address, param);
1270 if (status)
1271 return status;
1272
1273 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1274 status = ath6kl_bmi_reg_write(ar, address, param);
1275 if (status)
1276 return status;
1277
1278 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1279 status = ath6kl_bmi_reg_write(ar, address, param);
1280 if (status)
1281 return status;
1282
1283 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1284 status = ath6kl_bmi_reg_write(ar, address, param);
1285 if (status)
1286 return status;
1287 }
1288
1289 /* write EEPROM data to Target RAM */
1290 status = ath6kl_upload_board_file(ar);
1291 if (status)
1292 return status;
1293
1294 /* transfer One time Programmable data */
1295 status = ath6kl_upload_otp(ar);
1296 if (status)
1297 return status;
1298
1299 /* Download Target firmware */
1300 status = ath6kl_upload_firmware(ar);
1301 if (status)
1302 return status;
1303
1304 status = ath6kl_upload_patch(ar);
1305 if (status)
1306 return status;
1307
1308 /* Restore system sleep */
1309 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1310 status = ath6kl_bmi_reg_write(ar, address, sleep);
1311 if (status)
1312 return status;
1313
1314 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1315 param = options | 0x20;
1316 status = ath6kl_bmi_reg_write(ar, address, param);
1317 if (status)
1318 return status;
1319
1320 /* Configure GPIO AR6003 UART */
1321 param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
1322 status = ath6kl_bmi_write(ar,
1323 ath6kl_get_hi_item_addr(ar,
1324 HI_ITEM(hi_dbg_uart_txpin)),
1325 (u8 *)&param, 4);
1326
1327 return status;
1328}
1329
Kalle Valoa01ac412011-09-07 10:55:17 +03001330static int ath6kl_init_hw_params(struct ath6kl *ar)
1331{
1332 switch (ar->version.target_ver) {
1333 case AR6003_REV2_VERSION:
1334 ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1335 ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
Kalle Valo991b27e2011-09-07 10:55:17 +03001336 ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
1337 ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
Kalle Valobef26a72011-10-12 09:58:28 +03001338
1339 /* hw2.0 needs override address hardcoded */
1340 ar->hw.app_start_override_addr = 0x944C00;
1341
Kalle Valoa01ac412011-09-07 10:55:17 +03001342 break;
1343 case AR6003_REV3_VERSION:
1344 ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
1345 ar->hw.app_load_addr = 0x1234;
Kalle Valo991b27e2011-09-07 10:55:17 +03001346 ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
1347 ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
Kalle Valoa01ac412011-09-07 10:55:17 +03001348 break;
1349 case AR6004_REV1_VERSION:
1350 ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1351 ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
Kalle Valo991b27e2011-09-07 10:55:17 +03001352 ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
1353 ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
Kalle Valoa01ac412011-09-07 10:55:17 +03001354 break;
1355 default:
1356 ath6kl_err("Unsupported hardware version: 0x%x\n",
1357 ar->version.target_ver);
1358 return -EINVAL;
1359 }
1360
Kalle Valo6bc36432011-09-27 14:31:11 +03001361 ath6kl_dbg(ATH6KL_DBG_BOOT,
1362 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1363 ar->version.target_ver, ar->target_type,
1364 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1365 ath6kl_dbg(ATH6KL_DBG_BOOT,
1366 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1367 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1368 ar->hw.reserved_ram_size);
1369
Kalle Valoa01ac412011-09-07 10:55:17 +03001370 return 0;
1371}
1372
Vasanthakumar Thiagarajan521dffc2011-10-25 19:33:56 +05301373static int ath6kl_init(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +03001374{
Kalle Valobdcd8172011-07-18 00:22:30 +03001375 int status = 0;
1376 s32 timeleft;
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301377 struct net_device *ndev;
Kalle Valobdcd8172011-07-18 00:22:30 +03001378
1379 if (!ar)
1380 return -EIO;
1381
1382 /* Do we need to finish the BMI phase */
1383 if (ath6kl_bmi_done(ar)) {
1384 status = -EIO;
1385 goto ath6kl_init_done;
1386 }
1387
1388 /* Indicate that WMI is enabled (although not ready yet) */
1389 set_bit(WMI_ENABLED, &ar->flag);
Vasanthakumar Thiagarajan28657852011-07-21 12:00:49 +05301390 ar->wmi = ath6kl_wmi_init(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001391 if (!ar->wmi) {
1392 ath6kl_err("failed to initialize wmi\n");
1393 status = -EIO;
1394 goto ath6kl_init_done;
1395 }
1396
1397 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
1398
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301399 status = ath6kl_register_ieee80211_hw(ar);
1400 if (status)
1401 goto err_node_cleanup;
1402
1403 status = ath6kl_debug_init(ar);
1404 if (status) {
1405 wiphy_unregister(ar->wiphy);
1406 goto err_node_cleanup;
1407 }
1408
1409 /* Add an initial station interface */
1410 ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION);
1411 if (!ndev) {
1412 ath6kl_err("Failed to instantiate a network device\n");
1413 status = -ENOMEM;
1414 wiphy_unregister(ar->wiphy);
1415 goto err_debug_init;
1416 }
1417
1418
1419 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
1420 __func__, ar->net_dev->name, ar->net_dev, ar);
1421
Kalle Valobdcd8172011-07-18 00:22:30 +03001422 /*
1423 * The reason we have to wait for the target here is that the
1424 * driver layer has to init BMI in order to set the host block
1425 * size.
1426 */
Kalle Vaload226ec2011-08-10 09:49:12 +03001427 if (ath6kl_htc_wait_target(ar->htc_target)) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001428 status = -EIO;
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301429 goto err_if_deinit;
Kalle Valobdcd8172011-07-18 00:22:30 +03001430 }
1431
1432 if (ath6kl_init_service_ep(ar)) {
1433 status = -EIO;
1434 goto err_cleanup_scatter;
1435 }
1436
1437 /* setup access class priority mappings */
1438 ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
1439 ar->ac_stream_pri_map[WMM_AC_BE] = 1;
1440 ar->ac_stream_pri_map[WMM_AC_VI] = 2;
1441 ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
1442
1443 /* give our connected endpoints some buffers */
1444 ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
1445 ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
1446
1447 /* allocate some buffers that handle larger AMSDU frames */
1448 ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
1449
1450 /* setup credit distribution */
1451 ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
1452
1453 ath6kl_cookie_init(ar);
1454
1455 /* start HTC */
Kalle Vaload226ec2011-08-10 09:49:12 +03001456 status = ath6kl_htc_start(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001457
1458 if (status) {
1459 ath6kl_cookie_cleanup(ar);
1460 goto err_rxbuf_cleanup;
1461 }
1462
1463 /* Wait for Wmi event to be ready */
1464 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1465 test_bit(WMI_READY,
1466 &ar->flag),
1467 WMI_TIMEOUT);
1468
Kalle Valo6bc36432011-09-27 14:31:11 +03001469 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1470
Kalle Valobdcd8172011-07-18 00:22:30 +03001471 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1472 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1473 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1474 status = -EIO;
1475 goto err_htc_stop;
1476 }
1477
1478 if (!timeleft || signal_pending(current)) {
1479 ath6kl_err("wmi is not ready or wait was interrupted\n");
1480 status = -EIO;
1481 goto err_htc_stop;
1482 }
1483
1484 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1485
1486 /* communicate the wmi protocol verision to the target */
1487 if ((ath6kl_set_host_app_area(ar)) != 0)
1488 ath6kl_err("unable to set the host app area\n");
1489
1490 ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
1491 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
1492
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301493 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
1494 WIPHY_FLAG_HAVE_AP_SME;
Vivek Natarajan011a36e2011-09-19 13:29:16 +05301495
Kalle Valobdcd8172011-07-18 00:22:30 +03001496 status = ath6kl_target_config_wlan_params(ar);
1497 if (!status)
1498 goto ath6kl_init_done;
1499
1500err_htc_stop:
Kalle Vaload226ec2011-08-10 09:49:12 +03001501 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001502err_rxbuf_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001503 ath6kl_htc_flush_rx_buf(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001504 ath6kl_cleanup_amsdu_rxbufs(ar);
1505err_cleanup_scatter:
1506 ath6kl_hif_cleanup_scatter(ar);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301507err_if_deinit:
Vasanthakumar Thiagarajan108438b2011-10-25 19:34:00 +05301508 ath6kl_deinit_if_data(netdev_priv(ndev));
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301509 wiphy_unregister(ar->wiphy);
1510err_debug_init:
1511 ath6kl_debug_cleanup(ar);
Vasanthakumar Thiagarajan852bd9d2011-07-21 14:24:54 +05301512err_node_cleanup:
Kalle Valobdcd8172011-07-18 00:22:30 +03001513 ath6kl_wmi_shutdown(ar->wmi);
1514 clear_bit(WMI_ENABLED, &ar->flag);
1515 ar->wmi = NULL;
1516
1517ath6kl_init_done:
1518 return status;
1519}
1520
1521int ath6kl_core_init(struct ath6kl *ar)
1522{
1523 int ret = 0;
1524 struct ath6kl_bmi_target_info targ_info;
1525
1526 ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1527 if (!ar->ath6kl_wq)
1528 return -ENOMEM;
1529
1530 ret = ath6kl_bmi_init(ar);
1531 if (ret)
1532 goto err_wq;
1533
1534 ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1535 if (ret)
1536 goto err_bmi_cleanup;
1537
1538 ar->version.target_ver = le32_to_cpu(targ_info.version);
1539 ar->target_type = le32_to_cpu(targ_info.type);
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301540 ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
Kalle Valobdcd8172011-07-18 00:22:30 +03001541
Kalle Valoa01ac412011-09-07 10:55:17 +03001542 ret = ath6kl_init_hw_params(ar);
1543 if (ret)
1544 goto err_bmi_cleanup;
1545
Kalle Valobdcd8172011-07-18 00:22:30 +03001546 ret = ath6kl_configure_target(ar);
1547 if (ret)
1548 goto err_bmi_cleanup;
1549
Kalle Vaload226ec2011-08-10 09:49:12 +03001550 ar->htc_target = ath6kl_htc_create(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001551
1552 if (!ar->htc_target) {
1553 ret = -ENOMEM;
1554 goto err_bmi_cleanup;
1555 }
1556
Kalle Valo772c31e2011-09-07 10:55:16 +03001557 ret = ath6kl_fetch_firmwares(ar);
1558 if (ret)
1559 goto err_htc_cleanup;
1560
Kalle Valobdcd8172011-07-18 00:22:30 +03001561 ret = ath6kl_init_upload(ar);
1562 if (ret)
1563 goto err_htc_cleanup;
1564
Vasanthakumar Thiagarajan521dffc2011-10-25 19:33:56 +05301565 ret = ath6kl_init(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001566 if (ret)
1567 goto err_htc_cleanup;
1568
Kalle Valobdcd8172011-07-18 00:22:30 +03001569 return ret;
1570
1571err_htc_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001572 ath6kl_htc_cleanup(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001573err_bmi_cleanup:
1574 ath6kl_bmi_cleanup(ar);
1575err_wq:
1576 destroy_workqueue(ar->ath6kl_wq);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301577
Kalle Valobdcd8172011-07-18 00:22:30 +03001578 return ret;
1579}
1580
1581void ath6kl_stop_txrx(struct ath6kl *ar)
1582{
1583 struct net_device *ndev = ar->net_dev;
Vasanthakumar Thiagarajan59c98442011-10-25 19:34:01 +05301584 struct ath6kl_vif *vif = ar->vif;
Kalle Valobdcd8172011-07-18 00:22:30 +03001585
1586 if (!ndev)
1587 return;
1588
1589 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1590
1591 if (down_interruptible(&ar->sem)) {
1592 ath6kl_err("down_interruptible failed\n");
1593 return;
1594 }
1595
1596 if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
1597 ath6kl_stop_endpoint(ndev, false, true);
1598
Vasanthakumar Thiagarajan59c98442011-10-25 19:34:01 +05301599 clear_bit(WLAN_ENABLED, &vif->flags);
Kalle Valobdcd8172011-07-18 00:22:30 +03001600}
1601
1602/*
1603 * We need to differentiate between the surprise and planned removal of the
1604 * device because of the following consideration:
1605 *
1606 * - In case of surprise removal, the hcd already frees up the pending
1607 * for the device and hence there is no need to unregister the function
1608 * driver inorder to get these requests. For planned removal, the function
1609 * driver has to explicitly unregister itself to have the hcd return all the
1610 * pending requests before the data structures for the devices are freed up.
1611 * Note that as per the current implementation, the function driver will
1612 * end up releasing all the devices since there is no API to selectively
1613 * release a particular device.
1614 *
1615 * - Certain commands issued to the target can be skipped for surprise
1616 * removal since they will anyway not go through.
1617 */
1618void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
1619{
1620 struct ath6kl *ar;
1621
1622 if (!dev || !ath6kl_priv(dev)) {
1623 ath6kl_err("failed to get device structure\n");
1624 return;
1625 }
1626
1627 ar = ath6kl_priv(dev);
1628
1629 destroy_workqueue(ar->ath6kl_wq);
1630
1631 if (ar->htc_target)
Kalle Vaload226ec2011-08-10 09:49:12 +03001632 ath6kl_htc_cleanup(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001633
Kalle Valobdcd8172011-07-18 00:22:30 +03001634 ath6kl_cookie_cleanup(ar);
1635
1636 ath6kl_cleanup_amsdu_rxbufs(ar);
1637
1638 ath6kl_bmi_cleanup(ar);
1639
Kalle Valobdf53962011-09-02 10:32:04 +03001640 ath6kl_debug_cleanup(ar);
1641
Vasanthakumar Thiagarajan108438b2011-10-25 19:34:00 +05301642 ath6kl_deinit_if_data(netdev_priv(dev));
Kalle Valobdcd8172011-07-18 00:22:30 +03001643
Raja Mani19703572011-08-04 19:26:30 +05301644 kfree(ar->fw_board);
1645 kfree(ar->fw_otp);
1646 kfree(ar->fw);
1647 kfree(ar->fw_patch);
1648
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301649 ath6kl_deinit_ieee80211_hw(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001650}