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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (c) 2001-2002 by David Brownell
David Brownell53bd6a62006-08-30 14:50:06 -07003 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __LINUX_EHCI_HCD_H
20#define __LINUX_EHCI_HCD_H
21
22/* definitions used for the EHCI driver */
23
Stefan Roese6dbd6822007-05-01 09:29:37 -070024/*
25 * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to
26 * __leXX (normally) or __beXX (given EHCI_BIG_ENDIAN_DESC), depending on
27 * the host controller implementation.
28 *
29 * To facilitate the strongest possible byte-order checking from "sparse"
30 * and so on, we use __leXX unless that's not practical.
31 */
32#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC
33typedef __u32 __bitwise __hc32;
34typedef __u16 __bitwise __hc16;
35#else
36#define __hc32 __le32
37#define __hc16 __le16
38#endif
39
Anand Gadiyar411c9402009-07-07 15:24:23 +053040/* statistics can be kept for tuning/monitoring */
Linus Torvalds1da177e2005-04-16 15:20:36 -070041struct ehci_stats {
42 /* irq usage */
43 unsigned long normal;
44 unsigned long error;
45 unsigned long reclaim;
46 unsigned long lost_iaa;
47
48 /* termination of urbs from core */
49 unsigned long complete;
50 unsigned long unlink;
51};
52
53/* ehci_hcd->lock guards shared data against other CPUs:
54 * ehci_hcd: async, reclaim, periodic (and shadow), ...
55 * usb_host_endpoint: hcpriv
56 * ehci_qh: qh_next, qtd_list
57 * ehci_qtd: qtd_list
58 *
59 * Also, hold this lock when talking to HC registers or
60 * when updating hw_* fields in shared qh/qtd/... structures.
61 */
62
63#define EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */
64
65struct ehci_hcd { /* one per controller */
David Brownell56c1e262005-04-09 09:00:29 -070066 /* glue to PCI and HCD framework */
67 struct ehci_caps __iomem *caps;
68 struct ehci_regs __iomem *regs;
69 struct ehci_dbg_port __iomem *debug;
70
71 __u32 hcs_params; /* cached register copy */
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 spinlock_t lock;
73
74 /* async schedule support */
75 struct ehci_qh *async;
76 struct ehci_qh *reclaim;
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 unsigned scanning : 1;
78
79 /* periodic schedule support */
80#define DEFAULT_I_TDPS 1024 /* some HCs can do less */
81 unsigned periodic_size;
Stefan Roese6dbd6822007-05-01 09:29:37 -070082 __hc32 *periodic; /* hw periodic table */
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 dma_addr_t periodic_dma;
84 unsigned i_thresh; /* uframes HC might cache */
85
86 union ehci_shadow *pshadow; /* mirror hw periodic table */
87 int next_uframe; /* scan periodic, start here */
88 unsigned periodic_sched; /* periodic activity count */
89
Alan Stern0e5f2312010-04-08 16:56:37 -040090 /* list of itds & sitds completed while clock_frame was still active */
Karsten Wiese9aa09d22009-02-08 16:07:58 -080091 struct list_head cached_itd_list;
Alan Stern0e5f2312010-04-08 16:56:37 -040092 struct list_head cached_sitd_list;
Karsten Wiese9aa09d22009-02-08 16:07:58 -080093 unsigned clock_frame;
94
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 /* per root hub port */
96 unsigned long reset_done [EHCI_MAX_ROOT_PORTS];
Alan Stern383975d2007-05-04 11:52:40 -040097
Alan Stern57e06c12007-01-16 11:59:45 -050098 /* bit vectors (one bit per port) */
99 unsigned long bus_suspended; /* which ports were
100 already suspended at the start of a bus suspend */
101 unsigned long companion_ports; /* which ports are
102 dedicated to the companion controller */
Alan Stern383975d2007-05-04 11:52:40 -0400103 unsigned long owned_ports; /* which ports are
104 owned by the companion during a bus suspend */
Alan Sternd1f114d2008-05-20 16:58:58 -0400105 unsigned long port_c_suspend; /* which ports have
106 the change-suspend feature turned on */
Alan Sterneafe5b92008-10-06 11:25:53 -0400107 unsigned long suspended_ports; /* which ports are
108 suspended */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
110 /* per-HC memory pools (could be per-bus, but ...) */
111 struct dma_pool *qh_pool; /* qh per active urb */
112 struct dma_pool *qtd_pool; /* one or more per qh */
113 struct dma_pool *itd_pool; /* itd per iso urb */
114 struct dma_pool *sitd_pool; /* sitd per split iso urb */
115
Alan Stern07d29b62007-12-11 16:05:30 -0500116 struct timer_list iaa_watchdog;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 struct timer_list watchdog;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 unsigned long actions;
119 unsigned stamp;
Alan Stern68335e82009-05-22 17:02:33 -0400120 unsigned random_frame;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 unsigned long next_statechange;
Oliver Neukumee4ecb82009-11-27 15:17:59 +0100122 ktime_t last_periodic_enable;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 u32 command;
124
Kumar Gala8cd42e92006-01-20 13:57:52 -0800125 /* SILICON QUIRKS */
David Brownellf8aeb3b2006-01-20 13:55:14 -0800126 unsigned no_selective_suspend:1;
Kumar Gala8cd42e92006-01-20 13:57:52 -0800127 unsigned has_fsl_port_bug:1; /* FreeScale */
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100128 unsigned big_endian_mmio:1;
Stefan Roese6dbd6822007-05-01 09:29:37 -0700129 unsigned big_endian_desc:1;
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100130 unsigned has_amcc_usb23:1;
Alek Du403dbd32009-07-13 17:30:41 +0800131 unsigned need_io_watchdog:1;
Oliver Neukumee4ecb82009-11-27 15:17:59 +0100132 unsigned broken_periodic:1;
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100133
134 /* required for usb32 quirk */
135 #define OHCI_CTRL_HCFS (3 << 6)
136 #define OHCI_USB_OPER (2 << 6)
137 #define OHCI_USB_SUSPEND (3 << 6)
138
139 #define OHCI_HCCTRL_OFFSET 0x4
140 #define OHCI_HCCTRL_LEN 0x4
141 __hc32 *ohci_hcctrl_reg;
Alek Du331ac6b2009-07-13 12:41:20 +0800142 unsigned has_hostpc:1;
Kumar Gala8cd42e92006-01-20 13:57:52 -0800143
David Brownellf8aeb3b2006-01-20 13:55:14 -0800144 u8 sbrn; /* packed release number */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 /* irq statistics */
147#ifdef EHCI_STATS
148 struct ehci_stats stats;
149# define COUNT(x) do { (x)++; } while (0)
150#else
151# define COUNT(x) do {} while (0)
152#endif
Tony Jones694cc202007-09-11 14:07:31 -0700153
154 /* debug files */
155#ifdef DEBUG
156 struct dentry *debug_dir;
157 struct dentry *debug_async;
158 struct dentry *debug_periodic;
159 struct dentry *debug_registers;
160#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161};
162
David Brownell53bd6a62006-08-30 14:50:06 -0700163/* convert between an HCD pointer and the corresponding EHCI_HCD */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd)
165{
166 return (struct ehci_hcd *) (hcd->hcd_priv);
167}
168static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci)
169{
170 return container_of ((void *) ehci, struct usb_hcd, hcd_priv);
171}
172
173
Alan Stern07d29b62007-12-11 16:05:30 -0500174static inline void
175iaa_watchdog_start(struct ehci_hcd *ehci)
176{
177 WARN_ON(timer_pending(&ehci->iaa_watchdog));
178 mod_timer(&ehci->iaa_watchdog,
179 jiffies + msecs_to_jiffies(EHCI_IAA_MSECS));
180}
181
182static inline void iaa_watchdog_done(struct ehci_hcd *ehci)
183{
184 del_timer(&ehci->iaa_watchdog);
185}
186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187enum ehci_timer_action {
188 TIMER_IO_WATCHDOG,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 TIMER_ASYNC_SHRINK,
190 TIMER_ASYNC_OFF,
191};
192
193static inline void
194timer_action_done (struct ehci_hcd *ehci, enum ehci_timer_action action)
195{
196 clear_bit (action, &ehci->actions);
197}
198
Alan Stern0e5f2312010-04-08 16:56:37 -0400199static void free_cached_lists(struct ehci_hcd *ehci);
Karsten Wiese9aa09d22009-02-08 16:07:58 -0800200
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201/*-------------------------------------------------------------------------*/
202
Yinghai Lu0af36732008-07-24 17:27:57 -0700203#include <linux/usb/ehci_def.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204
205/*-------------------------------------------------------------------------*/
206
Stefan Roese6dbd6822007-05-01 09:29:37 -0700207#define QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208
209/*
210 * EHCI Specification 0.95 Section 3.5
David Brownell53bd6a62006-08-30 14:50:06 -0700211 * QTD: describe data transfer components (buffer, direction, ...)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
213 *
214 * These are associated only with "QH" (Queue Head) structures,
215 * used with control, bulk, and interrupt transfers.
216 */
217struct ehci_qtd {
218 /* first part defined by EHCI spec */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700219 __hc32 hw_next; /* see EHCI 3.5.1 */
220 __hc32 hw_alt_next; /* see EHCI 3.5.2 */
221 __hc32 hw_token; /* see EHCI 3.5.3 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222#define QTD_TOGGLE (1 << 31) /* data toggle */
223#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
224#define QTD_IOC (1 << 15) /* interrupt on complete */
225#define QTD_CERR(tok) (((tok)>>10) & 0x3)
226#define QTD_PID(tok) (((tok)>>8) & 0x3)
227#define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */
228#define QTD_STS_HALT (1 << 6) /* halted on error */
229#define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */
230#define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */
231#define QTD_STS_XACT (1 << 3) /* device gave illegal response */
232#define QTD_STS_MMF (1 << 2) /* incomplete split transaction */
233#define QTD_STS_STS (1 << 1) /* split transaction state */
234#define QTD_STS_PING (1 << 0) /* issue PING? */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700235
236#define ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE)
237#define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT)
238#define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS)
239
240 __hc32 hw_buf [5]; /* see EHCI 3.5.4 */
241 __hc32 hw_buf_hi [5]; /* Appendix B */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242
243 /* the rest is HCD-private */
244 dma_addr_t qtd_dma; /* qtd address */
245 struct list_head qtd_list; /* sw qtd list */
246 struct urb *urb; /* qtd's urb */
247 size_t length; /* length of buffer */
248} __attribute__ ((aligned (32)));
249
250/* mask NakCnt+T in qh->hw_alt_next */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700251#define QTD_MASK(ehci) cpu_to_hc32 (ehci, ~0x1f)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252
253#define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1)
254
255/*-------------------------------------------------------------------------*/
256
257/* type tag from {qh,itd,sitd,fstn}->hw_next */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700258#define Q_NEXT_TYPE(ehci,dma) ((dma) & cpu_to_hc32(ehci, 3 << 1))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259
Stefan Roese6dbd6822007-05-01 09:29:37 -0700260/*
261 * Now the following defines are not converted using the
Harvey Harrison551509d2009-02-11 14:11:36 -0800262 * cpu_to_le32() macro anymore, since we have to support
Stefan Roese6dbd6822007-05-01 09:29:37 -0700263 * "dynamic" switching between be and le support, so that the driver
264 * can be used on one system with SoC EHCI controller using big-endian
265 * descriptors as well as a normal little-endian PCI EHCI controller.
266 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267/* values for that type tag */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700268#define Q_TYPE_ITD (0 << 1)
269#define Q_TYPE_QH (1 << 1)
270#define Q_TYPE_SITD (2 << 1)
271#define Q_TYPE_FSTN (3 << 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272
273/* next async queue entry, or pointer to interrupt/periodic QH */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700274#define QH_NEXT(ehci,dma) (cpu_to_hc32(ehci, (((u32)dma)&~0x01f)|Q_TYPE_QH))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275
276/* for periodic/async schedules and qtd lists, mark end of list */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700277#define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278
279/*
280 * Entries in periodic shadow table are pointers to one of four kinds
281 * of data structure. That's dictated by the hardware; a type tag is
282 * encoded in the low bits of the hardware's periodic schedule. Use
283 * Q_NEXT_TYPE to get the tag.
284 *
285 * For entries in the async schedule, the type tag always says "qh".
286 */
287union ehci_shadow {
David Brownell53bd6a62006-08-30 14:50:06 -0700288 struct ehci_qh *qh; /* Q_TYPE_QH */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289 struct ehci_itd *itd; /* Q_TYPE_ITD */
290 struct ehci_sitd *sitd; /* Q_TYPE_SITD */
291 struct ehci_fstn *fstn; /* Q_TYPE_FSTN */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700292 __hc32 *hw_next; /* (all types) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293 void *ptr;
294};
295
296/*-------------------------------------------------------------------------*/
297
298/*
299 * EHCI Specification 0.95 Section 3.6
300 * QH: describes control/bulk/interrupt endpoints
301 * See Fig 3-7 "Queue Head Structure Layout".
302 *
303 * These appear in both the async and (for interrupt) periodic schedules.
304 */
305
Alek Du3807e262009-07-14 07:23:29 +0800306/* first part defined by EHCI spec */
307struct ehci_qh_hw {
Stefan Roese6dbd6822007-05-01 09:29:37 -0700308 __hc32 hw_next; /* see EHCI 3.6.1 */
309 __hc32 hw_info1; /* see EHCI 3.6.2 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310#define QH_HEAD 0x00008000
Stefan Roese6dbd6822007-05-01 09:29:37 -0700311 __hc32 hw_info2; /* see EHCI 3.6.2 */
David Brownell7dedacf2005-08-04 18:06:41 -0700312#define QH_SMASK 0x000000ff
313#define QH_CMASK 0x0000ff00
314#define QH_HUBADDR 0x007f0000
315#define QH_HUBPORT 0x3f800000
316#define QH_MULT 0xc0000000
Stefan Roese6dbd6822007-05-01 09:29:37 -0700317 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */
David Brownell53bd6a62006-08-30 14:50:06 -0700318
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 /* qtd overlay (hardware parts of a struct ehci_qtd) */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700320 __hc32 hw_qtd_next;
321 __hc32 hw_alt_next;
322 __hc32 hw_token;
323 __hc32 hw_buf [5];
324 __hc32 hw_buf_hi [5];
Alek Du3807e262009-07-14 07:23:29 +0800325} __attribute__ ((aligned(32)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326
Alek Du3807e262009-07-14 07:23:29 +0800327struct ehci_qh {
328 struct ehci_qh_hw *hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329 /* the rest is HCD-private */
330 dma_addr_t qh_dma; /* address of qh */
331 union ehci_shadow qh_next; /* ptr to qh; or periodic */
332 struct list_head qtd_list; /* sw qtd list */
333 struct ehci_qtd *dummy;
334 struct ehci_qh *reclaim; /* next to reclaim */
335
336 struct ehci_hcd *ehci;
David Brownell9c033e82007-05-17 12:21:19 -0700337
338 /*
339 * Do NOT use atomic operations for QH refcounting. On some CPUs
340 * (PPC7448 for example), atomic operations cannot be performed on
341 * memory that is cache-inhibited (i.e. being used for DMA).
342 * Spinlocks are used to protect all QH fields.
343 */
344 u32 refcount;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345 unsigned stamp;
346
Alan Stern3a444942009-08-19 12:22:06 -0400347 u8 needs_rescan; /* Dequeue during giveback */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 u8 qh_state;
349#define QH_STATE_LINKED 1 /* HC sees this */
350#define QH_STATE_UNLINK 2 /* HC may still see this */
351#define QH_STATE_IDLE 3 /* HC doesn't see this */
352#define QH_STATE_UNLINK_WAIT 4 /* LINKED and on reclaim q */
353#define QH_STATE_COMPLETING 5 /* don't touch token.HALT */
354
Alan Sterna2c27062009-02-10 10:16:58 -0500355 u8 xacterrs; /* XactErr retry counter */
356#define QH_XACTERR_MAX 32 /* XactErr retry limit */
357
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 /* periodic schedule info */
359 u8 usecs; /* intr bandwidth */
360 u8 gap_uf; /* uframes split/csplit gap */
361 u8 c_usecs; /* ... split completion bw */
david-b@pacbell.netd0384202005-08-13 18:44:58 -0700362 u16 tt_usecs; /* tt downstream bandwidth */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363 unsigned short period; /* polling interval */
364 unsigned short start; /* where polling starts */
365#define NO_FRAME ((unsigned short)~0) /* pick new start */
Alan Stern914b7012009-06-29 10:47:30 -0400366
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367 struct usb_device *dev; /* access to TT */
Alan Stern914b7012009-06-29 10:47:30 -0400368 unsigned clearing_tt:1; /* Clear-TT-Buf in progress */
Alek Du3807e262009-07-14 07:23:29 +0800369};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370
371/*-------------------------------------------------------------------------*/
372
373/* description of one iso transaction (up to 3 KB data if highspeed) */
374struct ehci_iso_packet {
375 /* These will be copied to iTD when scheduling */
376 u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700377 __hc32 transaction; /* itd->hw_transaction[i] |= */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 u8 cross; /* buf crosses pages */
379 /* for full speed OUT splits */
380 u32 buf1;
381};
382
383/* temporary schedule data for packets from iso urbs (both speeds)
384 * each packet is one logical usb transaction to the device (not TT),
385 * beginning at stream->next_uframe
386 */
387struct ehci_iso_sched {
388 struct list_head td_list;
389 unsigned span;
390 struct ehci_iso_packet packet [0];
391};
392
393/*
394 * ehci_iso_stream - groups all (s)itds for this endpoint.
395 * acts like a qh would, if EHCI had them for ISO.
396 */
397struct ehci_iso_stream {
Clemens Ladisch1082f572010-03-01 17:18:56 +0100398 /* first field matches ehci_hq, but is NULL */
399 struct ehci_qh_hw *hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400
401 u32 refcount;
402 u8 bEndpointAddress;
403 u8 highspeed;
404 u16 depth; /* depth in uframes */
405 struct list_head td_list; /* queued itds/sitds */
406 struct list_head free_list; /* list of unused itds/sitds */
407 struct usb_device *udev;
David Brownell53bd6a62006-08-30 14:50:06 -0700408 struct usb_host_endpoint *ep;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409
410 /* output of (re)scheduling */
411 unsigned long start; /* jiffies */
412 unsigned long rescheduled;
413 int next_uframe;
Stefan Roese6dbd6822007-05-01 09:29:37 -0700414 __hc32 splits;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415
416 /* the rest is derived from the endpoint descriptor,
417 * trusting urb->interval == f(epdesc->bInterval) and
418 * including the extra info for hw_bufp[0..2]
419 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 u8 usecs, c_usecs;
David Brownellc06d4dc2008-01-24 12:30:34 -0800421 u16 interval;
david-b@pacbell.netd0384202005-08-13 18:44:58 -0700422 u16 tt_usecs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 u16 maxp;
424 u16 raw_mask;
425 unsigned bandwidth;
426
427 /* This is used to initialize iTD's hw_bufp fields */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700428 __hc32 buf0;
429 __hc32 buf1;
430 __hc32 buf2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431
432 /* this is used to initialize sITD's tt info */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700433 __hc32 address;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434};
435
436/*-------------------------------------------------------------------------*/
437
438/*
439 * EHCI Specification 0.95 Section 3.3
440 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)"
441 *
442 * Schedule records for high speed iso xfers
443 */
444struct ehci_itd {
445 /* first part defined by EHCI spec */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700446 __hc32 hw_next; /* see EHCI 3.3.1 */
447 __hc32 hw_transaction [8]; /* see EHCI 3.3.2 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448#define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */
449#define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */
450#define EHCI_ISOC_BABBLE (1<<29) /* babble detected */
451#define EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */
452#define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff)
453#define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */
454
Stefan Roese6dbd6822007-05-01 09:29:37 -0700455#define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456
Stefan Roese6dbd6822007-05-01 09:29:37 -0700457 __hc32 hw_bufp [7]; /* see EHCI 3.3.3 */
458 __hc32 hw_bufp_hi [7]; /* Appendix B */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459
460 /* the rest is HCD-private */
461 dma_addr_t itd_dma; /* for this itd */
462 union ehci_shadow itd_next; /* ptr to periodic q entry */
463
464 struct urb *urb;
465 struct ehci_iso_stream *stream; /* endpoint's queue */
466 struct list_head itd_list; /* list of stream's itds */
467
468 /* any/all hw_transactions here may be used by that urb */
469 unsigned frame; /* where scheduled */
470 unsigned pg;
471 unsigned index[8]; /* in urb->iso_frame_desc */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472} __attribute__ ((aligned (32)));
473
474/*-------------------------------------------------------------------------*/
475
476/*
David Brownell53bd6a62006-08-30 14:50:06 -0700477 * EHCI Specification 0.95 Section 3.4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 * siTD, aka split-transaction isochronous Transfer Descriptor
479 * ... describe full speed iso xfers through TT in hubs
480 * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD)
481 */
482struct ehci_sitd {
483 /* first part defined by EHCI spec */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700484 __hc32 hw_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700485/* uses bit field macros above - see EHCI 0.95 Table 3-8 */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700486 __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */
487 __hc32 hw_uframe; /* EHCI table 3-10 */
488 __hc32 hw_results; /* EHCI table 3-11 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489#define SITD_IOC (1 << 31) /* interrupt on completion */
490#define SITD_PAGE (1 << 30) /* buffer 0/1 */
491#define SITD_LENGTH(x) (0x3ff & ((x)>>16))
492#define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */
493#define SITD_STS_ERR (1 << 6) /* error from TT */
494#define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */
495#define SITD_STS_BABBLE (1 << 4) /* device was babbling */
496#define SITD_STS_XACT (1 << 3) /* illegal IN response */
497#define SITD_STS_MMF (1 << 2) /* incomplete split transaction */
498#define SITD_STS_STS (1 << 1) /* split transaction state */
499
Stefan Roese6dbd6822007-05-01 09:29:37 -0700500#define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501
Stefan Roese6dbd6822007-05-01 09:29:37 -0700502 __hc32 hw_buf [2]; /* EHCI table 3-12 */
503 __hc32 hw_backpointer; /* EHCI table 3-13 */
504 __hc32 hw_buf_hi [2]; /* Appendix B */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505
506 /* the rest is HCD-private */
507 dma_addr_t sitd_dma;
508 union ehci_shadow sitd_next; /* ptr to periodic q entry */
509
510 struct urb *urb;
511 struct ehci_iso_stream *stream; /* endpoint's queue */
512 struct list_head sitd_list; /* list of stream's sitds */
513 unsigned frame;
514 unsigned index;
515} __attribute__ ((aligned (32)));
516
517/*-------------------------------------------------------------------------*/
518
519/*
520 * EHCI Specification 0.96 Section 3.7
521 * Periodic Frame Span Traversal Node (FSTN)
522 *
523 * Manages split interrupt transactions (using TT) that span frame boundaries
524 * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN
525 * makes the HC jump (back) to a QH to scan for fs/ls QH completions until
526 * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work.
527 */
528struct ehci_fstn {
Stefan Roese6dbd6822007-05-01 09:29:37 -0700529 __hc32 hw_next; /* any periodic q entry */
530 __hc32 hw_prev; /* qh or EHCI_LIST_END */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531
532 /* the rest is HCD-private */
533 dma_addr_t fstn_dma;
534 union ehci_shadow fstn_next; /* ptr to periodic q entry */
535} __attribute__ ((aligned (32)));
536
537/*-------------------------------------------------------------------------*/
538
Alan Stern16032c42010-05-12 18:21:35 -0400539/* Prepare the PORTSC wakeup flags during controller suspend/resume */
540
541#define ehci_prepare_ports_for_controller_suspend(ehci) \
542 ehci_adjust_port_wakeup_flags(ehci, true);
543
544#define ehci_prepare_ports_for_controller_resume(ehci) \
545 ehci_adjust_port_wakeup_flags(ehci, false);
546
547/*-------------------------------------------------------------------------*/
548
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549#ifdef CONFIG_USB_EHCI_ROOT_HUB_TT
550
551/*
552 * Some EHCI controllers have a Transaction Translator built into the
553 * root hub. This is a non-standard feature. Each controller will need
554 * to add code to the following inline functions, and call them as
555 * needed (mostly in root hub code).
556 */
557
Alan Sterna8e51772008-05-20 16:58:11 -0400558#define ehci_is_TDI(e) (ehci_to_hcd(e)->has_tt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559
560/* Returns the speed of a device attached to a port on the root hub. */
561static inline unsigned int
562ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
563{
564 if (ehci_is_TDI(ehci)) {
Alek Du331ac6b2009-07-13 12:41:20 +0800565 switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566 case 0:
567 return 0;
568 case 1:
Alan Stern288ead42010-03-04 11:32:30 -0500569 return USB_PORT_STAT_LOW_SPEED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570 case 2:
571 default:
Alan Stern288ead42010-03-04 11:32:30 -0500572 return USB_PORT_STAT_HIGH_SPEED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573 }
574 }
Alan Stern288ead42010-03-04 11:32:30 -0500575 return USB_PORT_STAT_HIGH_SPEED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576}
577
578#else
579
580#define ehci_is_TDI(e) (0)
581
Alan Stern288ead42010-03-04 11:32:30 -0500582#define ehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583#endif
584
585/*-------------------------------------------------------------------------*/
586
Kumar Gala8cd42e92006-01-20 13:57:52 -0800587#ifdef CONFIG_PPC_83xx
588/* Some Freescale processors have an erratum in which the TT
589 * port number in the queue head was 0..N-1 instead of 1..N.
590 */
591#define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug)
592#else
593#define ehci_has_fsl_portno_bug(e) (0)
594#endif
595
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100596/*
597 * While most USB host controllers implement their registers in
598 * little-endian format, a minority (celleb companion chip) implement
599 * them in big endian format.
600 *
601 * This attempts to support either format at compile time without a
602 * runtime penalty, or both formats with the additional overhead
603 * of checking a flag bit.
604 */
605
606#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
607#define ehci_big_endian_mmio(e) ((e)->big_endian_mmio)
608#else
609#define ehci_big_endian_mmio(e) 0
610#endif
611
Stefan Roese6dbd6822007-05-01 09:29:37 -0700612/*
613 * Big-endian read/write functions are arch-specific.
614 * Other arches can be added if/when they're needed.
Stefan Roese6dbd6822007-05-01 09:29:37 -0700615 */
Vladimir Barinov91bc4d32007-12-30 15:21:11 -0800616#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX)
617#define readl_be(addr) __raw_readl((__force unsigned *)addr)
618#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr)
619#endif
620
Stefan Roese6dbd6822007-05-01 09:29:37 -0700621static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,
622 __u32 __iomem * regs)
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100623{
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100624#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100625 return ehci_big_endian_mmio(ehci) ?
Al Viro68f50e52007-02-09 16:40:00 +0000626 readl_be(regs) :
627 readl(regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100628#else
Al Viro68f50e52007-02-09 16:40:00 +0000629 return readl(regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100630#endif
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100631}
632
Stefan Roese6dbd6822007-05-01 09:29:37 -0700633static inline void ehci_writel(const struct ehci_hcd *ehci,
634 const unsigned int val, __u32 __iomem *regs)
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100635{
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100636#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100637 ehci_big_endian_mmio(ehci) ?
Al Viro68f50e52007-02-09 16:40:00 +0000638 writel_be(val, regs) :
639 writel(val, regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100640#else
Al Viro68f50e52007-02-09 16:40:00 +0000641 writel(val, regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100642#endif
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100643}
Kumar Gala8cd42e92006-01-20 13:57:52 -0800644
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100645/*
646 * On certain ppc-44x SoC there is a HW issue, that could only worked around with
647 * explicit suspend/operate of OHCI. This function hereby makes sense only on that arch.
648 * Other common bits are dependant on has_amcc_usb23 quirk flag.
649 */
650#ifdef CONFIG_44x
651static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational)
652{
653 u32 hc_control;
654
655 hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS);
656 if (operational)
657 hc_control |= OHCI_USB_OPER;
658 else
659 hc_control |= OHCI_USB_SUSPEND;
660
661 writel_be(hc_control, ehci->ohci_hcctrl_reg);
662 (void) readl_be(ehci->ohci_hcctrl_reg);
663}
664#else
665static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational)
666{ }
667#endif
668
Kumar Gala8cd42e92006-01-20 13:57:52 -0800669/*-------------------------------------------------------------------------*/
670
Stefan Roese6dbd6822007-05-01 09:29:37 -0700671/*
672 * The AMCC 440EPx not only implements its EHCI registers in big-endian
673 * format, but also its DMA data structures (descriptors).
674 *
675 * EHCI controllers accessed through PCI work normally (little-endian
676 * everywhere), so we won't bother supporting a BE-only mode for now.
677 */
678#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC
679#define ehci_big_endian_desc(e) ((e)->big_endian_desc)
680
681/* cpu to ehci */
682static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x)
683{
684 return ehci_big_endian_desc(ehci)
685 ? (__force __hc32)cpu_to_be32(x)
686 : (__force __hc32)cpu_to_le32(x);
687}
688
689/* ehci to cpu */
690static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x)
691{
692 return ehci_big_endian_desc(ehci)
693 ? be32_to_cpu((__force __be32)x)
694 : le32_to_cpu((__force __le32)x);
695}
696
697static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x)
698{
699 return ehci_big_endian_desc(ehci)
700 ? be32_to_cpup((__force __be32 *)x)
701 : le32_to_cpup((__force __le32 *)x);
702}
703
704#else
705
706/* cpu to ehci */
707static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x)
708{
709 return cpu_to_le32(x);
710}
711
712/* ehci to cpu */
713static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x)
714{
715 return le32_to_cpu(x);
716}
717
718static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x)
719{
720 return le32_to_cpup(x);
721}
722
723#endif
724
725/*-------------------------------------------------------------------------*/
726
Linus Torvalds1da177e2005-04-16 15:20:36 -0700727#ifndef DEBUG
728#define STUB_DEBUG_FILES
729#endif /* DEBUG */
730
731/*-------------------------------------------------------------------------*/
732
733#endif /* __LINUX_EHCI_HCD_H */