blob: 5cb0e63376b532e97535ac9e6637ff433198a75c [file] [log] [blame]
Lee Jonesca766442014-05-21 10:45:00 +02001/*
2 * Copyright (C) 2014 STMicroelectronics Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * publishhed by the Free Software Foundation.
7 */
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +01008/ {
9 #address-cells = <1>;
10 #size-cells = <1>;
11
12 cpus {
13 #address-cells = <1>;
14 #size-cells = <0>;
15 cpu@0 {
Srinivas Kandagatla95e8ce62013-08-01 13:13:31 +010016 device_type = "cpu";
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +010017 compatible = "arm,cortex-a9";
18 reg = <0>;
19 };
20 cpu@1 {
Srinivas Kandagatla95e8ce62013-08-01 13:13:31 +010021 device_type = "cpu";
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +010022 compatible = "arm,cortex-a9";
23 reg = <1>;
24 };
25 };
26
27 intc: interrupt-controller@fffe1000 {
28 compatible = "arm,cortex-a9-gic";
29 #interrupt-cells = <3>;
30 interrupt-controller;
31 reg = <0xfffe1000 0x1000>,
32 <0xfffe0100 0x100>;
33 };
34
35 scu@fffe0000 {
36 compatible = "arm,cortex-a9-scu";
37 reg = <0xfffe0000 0x1000>;
38 };
39
40 timer@fffe0200 {
41 interrupt-parent = <&intc>;
42 compatible = "arm,cortex-a9-global-timer";
43 reg = <0xfffe0200 0x100>;
44 interrupts = <1 11 0x04>;
45 clocks = <&arm_periph_clk>;
46 };
47};