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Graf Yang0b39db22009-12-28 11:13:51 +00001/*
2 * Copyright 2007-2009 Analog Devices Inc.
3 * Graff Yang <graf.yang@analog.com>
4 *
5 * Licensed under the GPL-2 or later.
6 */
7
Graf Yang6f546bc2010-01-28 10:46:55 +00008#include <linux/smp.h>
Graf Yang0b39db22009-12-28 11:13:51 +00009#include <asm/blackfin.h>
Graf Yang6f546bc2010-01-28 10:46:55 +000010#include <mach/pll.h>
Graf Yang0b39db22009-12-28 11:13:51 +000011
12int hotplug_coreb;
13
14void platform_cpu_die(void)
15{
Graf Yang6f546bc2010-01-28 10:46:55 +000016 unsigned long iwr;
Graf Yang0b39db22009-12-28 11:13:51 +000017 hotplug_coreb = 1;
18
Graf Yang0b39db22009-12-28 11:13:51 +000019 /* disable core timer */
20 bfin_write_TCNTL(0);
21
Graf Yang6f546bc2010-01-28 10:46:55 +000022 /* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */
Graf Yang0b39db22009-12-28 11:13:51 +000023 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
24 SSYNC();
25
Graf Yang6f546bc2010-01-28 10:46:55 +000026 /* set CoreB wakeup by ipi0, iwr will be discarded */
27 bfin_iwr_set_sup0(&iwr, &iwr, &iwr);
28 SSYNC();
29
30 coreb_die();
Graf Yang0b39db22009-12-28 11:13:51 +000031}