Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007-2009 Analog Devices Inc. |
| 3 | * Graff Yang <graf.yang@analog.com> |
| 4 | * |
| 5 | * Licensed under the GPL-2 or later. |
| 6 | */ |
| 7 | |
Graf Yang | 6f546bc | 2010-01-28 10:46:55 +0000 | [diff] [blame^] | 8 | #include <linux/smp.h> |
Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 9 | #include <asm/blackfin.h> |
Graf Yang | 6f546bc | 2010-01-28 10:46:55 +0000 | [diff] [blame^] | 10 | #include <mach/pll.h> |
Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 11 | |
| 12 | int hotplug_coreb; |
| 13 | |
| 14 | void platform_cpu_die(void) |
| 15 | { |
Graf Yang | 6f546bc | 2010-01-28 10:46:55 +0000 | [diff] [blame^] | 16 | unsigned long iwr; |
Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 17 | hotplug_coreb = 1; |
| 18 | |
Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 19 | /* disable core timer */ |
| 20 | bfin_write_TCNTL(0); |
| 21 | |
Graf Yang | 6f546bc | 2010-01-28 10:46:55 +0000 | [diff] [blame^] | 22 | /* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */ |
Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 23 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1))); |
| 24 | SSYNC(); |
| 25 | |
Graf Yang | 6f546bc | 2010-01-28 10:46:55 +0000 | [diff] [blame^] | 26 | /* set CoreB wakeup by ipi0, iwr will be discarded */ |
| 27 | bfin_iwr_set_sup0(&iwr, &iwr, &iwr); |
| 28 | SSYNC(); |
| 29 | |
| 30 | coreb_die(); |
Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 31 | } |