Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #ifndef __SDHCI_MSM_H__ |
| 16 | #define __SDHCI_MSM_H__ |
| 17 | |
| 18 | #include <linux/mmc/mmc.h> |
Gilad Broner | c788a67 | 2015-09-08 15:39:11 +0300 | [diff] [blame] | 19 | #include <linux/pm_qos.h> |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 20 | #include "sdhci-pltfm.h" |
| 21 | |
| 22 | /* This structure keeps information per regulator */ |
| 23 | struct sdhci_msm_reg_data { |
| 24 | /* voltage regulator handle */ |
| 25 | struct regulator *reg; |
| 26 | /* regulator name */ |
| 27 | const char *name; |
| 28 | /* voltage level to be set */ |
| 29 | u32 low_vol_level; |
| 30 | u32 high_vol_level; |
| 31 | /* Load values for low power and high power mode */ |
| 32 | u32 lpm_uA; |
| 33 | u32 hpm_uA; |
| 34 | |
| 35 | /* is this regulator enabled? */ |
| 36 | bool is_enabled; |
| 37 | /* is this regulator needs to be always on? */ |
| 38 | bool is_always_on; |
| 39 | /* is low power mode setting required for this regulator? */ |
| 40 | bool lpm_sup; |
| 41 | bool set_voltage_sup; |
| 42 | }; |
| 43 | |
| 44 | /* |
| 45 | * This structure keeps information for all the |
| 46 | * regulators required for a SDCC slot. |
| 47 | */ |
| 48 | struct sdhci_msm_slot_reg_data { |
| 49 | /* keeps VDD/VCC regulator info */ |
| 50 | struct sdhci_msm_reg_data *vdd_data; |
| 51 | /* keeps VDD IO regulator info */ |
| 52 | struct sdhci_msm_reg_data *vdd_io_data; |
| 53 | }; |
| 54 | |
| 55 | struct sdhci_msm_gpio { |
| 56 | u32 no; |
| 57 | const char *name; |
| 58 | bool is_enabled; |
| 59 | }; |
| 60 | |
| 61 | struct sdhci_msm_gpio_data { |
| 62 | struct sdhci_msm_gpio *gpio; |
| 63 | u8 size; |
| 64 | }; |
| 65 | |
| 66 | struct sdhci_msm_pin_data { |
| 67 | /* |
| 68 | * = 1 if controller pins are using gpios |
| 69 | * = 0 if controller has dedicated MSM pads |
| 70 | */ |
| 71 | u8 is_gpio; |
| 72 | struct sdhci_msm_gpio_data *gpio_data; |
| 73 | }; |
| 74 | |
| 75 | struct sdhci_pinctrl_data { |
| 76 | struct pinctrl *pctrl; |
| 77 | struct pinctrl_state *pins_active; |
| 78 | struct pinctrl_state *pins_sleep; |
| 79 | }; |
| 80 | |
| 81 | struct sdhci_msm_bus_voting_data { |
| 82 | struct msm_bus_scale_pdata *bus_pdata; |
| 83 | unsigned int *bw_vecs; |
| 84 | unsigned int bw_vecs_size; |
| 85 | }; |
| 86 | |
Gilad Broner | c788a67 | 2015-09-08 15:39:11 +0300 | [diff] [blame] | 87 | struct sdhci_msm_cpu_group_map { |
| 88 | int nr_groups; |
| 89 | cpumask_t *mask; |
| 90 | }; |
| 91 | |
| 92 | struct sdhci_msm_pm_qos_latency { |
| 93 | s32 latency[SDHCI_POWER_POLICY_NUM]; |
| 94 | }; |
| 95 | |
| 96 | struct sdhci_msm_pm_qos_data { |
| 97 | struct sdhci_msm_cpu_group_map cpu_group_map; |
| 98 | enum pm_qos_req_type irq_req_type; |
| 99 | int irq_cpu; |
| 100 | struct sdhci_msm_pm_qos_latency irq_latency; |
| 101 | struct sdhci_msm_pm_qos_latency *cmdq_latency; |
| 102 | struct sdhci_msm_pm_qos_latency *latency; |
| 103 | bool irq_valid; |
| 104 | bool cmdq_valid; |
| 105 | bool legacy_valid; |
| 106 | }; |
| 107 | |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 108 | /* |
| 109 | * PM QoS for group voting management - each cpu group defined is associated |
| 110 | * with 1 instance of this structure. |
| 111 | */ |
| 112 | struct sdhci_msm_pm_qos_group { |
| 113 | struct pm_qos_request req; |
| 114 | struct work_struct unvote_work; |
| 115 | atomic_t counter; |
| 116 | s32 latency; |
| 117 | }; |
| 118 | |
| 119 | /* PM QoS HW IRQ voting */ |
| 120 | struct sdhci_msm_pm_qos_irq { |
| 121 | struct pm_qos_request req; |
| 122 | struct work_struct unvote_work; |
| 123 | atomic_t counter; |
| 124 | s32 latency; |
| 125 | bool enabled; |
| 126 | }; |
| 127 | |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 128 | struct sdhci_msm_pltfm_data { |
| 129 | /* Supported UHS-I Modes */ |
| 130 | u32 caps; |
| 131 | |
| 132 | /* More capabilities */ |
| 133 | u32 caps2; |
| 134 | |
| 135 | unsigned long mmc_bus_width; |
| 136 | struct sdhci_msm_slot_reg_data *vreg_data; |
| 137 | bool nonremovable; |
| 138 | bool nonhotplug; |
| 139 | bool largeaddressbus; |
| 140 | bool pin_cfg_sts; |
| 141 | struct sdhci_msm_pin_data *pin_data; |
| 142 | struct sdhci_pinctrl_data *pctrl_data; |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 143 | int status_gpio; /* card detection GPIO that is configured as IRQ */ |
| 144 | struct sdhci_msm_bus_voting_data *voting_data; |
| 145 | u32 *sup_clk_table; |
| 146 | unsigned char sup_clk_cnt; |
Sahitya Tummala | 719c6b5 | 2015-05-21 08:28:19 +0530 | [diff] [blame] | 147 | u32 *sup_ice_clk_table; |
| 148 | unsigned char sup_ice_clk_cnt; |
Gilad Broner | c788a67 | 2015-09-08 15:39:11 +0300 | [diff] [blame] | 149 | struct sdhci_msm_pm_qos_data pm_qos_data; |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 150 | }; |
| 151 | |
| 152 | struct sdhci_msm_bus_vote { |
| 153 | uint32_t client_handle; |
| 154 | uint32_t curr_vote; |
| 155 | int min_bw_vote; |
| 156 | int max_bw_vote; |
| 157 | bool is_max_bw_needed; |
| 158 | struct delayed_work vote_work; |
| 159 | struct device_attribute max_bus_bw; |
| 160 | }; |
| 161 | |
Sahitya Tummala | 719c6b5 | 2015-05-21 08:28:19 +0530 | [diff] [blame] | 162 | struct sdhci_msm_ice_data { |
| 163 | struct qcom_ice_variant_ops *vops; |
| 164 | struct completion async_done; |
| 165 | struct platform_device *pdev; |
| 166 | int state; |
| 167 | }; |
| 168 | |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 169 | struct sdhci_msm_host { |
| 170 | struct platform_device *pdev; |
| 171 | void __iomem *core_mem; /* MSM SDCC mapped address */ |
| 172 | int pwr_irq; /* power irq */ |
| 173 | struct clk *clk; /* main SD/MMC bus clock */ |
| 174 | struct clk *pclk; /* SDHC peripheral bus clock */ |
| 175 | struct clk *bus_clk; /* SDHC bus voter clock */ |
| 176 | struct clk *ff_clk; /* CDC calibration fixed feedback clock */ |
| 177 | struct clk *sleep_clk; /* CDC calibration sleep clock */ |
Sahitya Tummala | 719c6b5 | 2015-05-21 08:28:19 +0530 | [diff] [blame] | 178 | struct clk *ice_clk; /* SDHC peripheral ICE clock */ |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 179 | atomic_t clks_on; /* Set if clocks are enabled */ |
| 180 | struct sdhci_msm_pltfm_data *pdata; |
| 181 | struct mmc_host *mmc; |
| 182 | struct sdhci_pltfm_data sdhci_msm_pdata; |
| 183 | u32 curr_pwr_state; |
| 184 | u32 curr_io_level; |
| 185 | struct completion pwr_irq_completion; |
| 186 | struct sdhci_msm_bus_vote msm_bus_vote; |
| 187 | struct device_attribute polling; |
| 188 | u32 clk_rate; /* Keeps track of current clock rate that is set */ |
| 189 | bool tuning_done; |
| 190 | bool calibration_done; |
| 191 | u8 saved_tuning_phase; |
| 192 | bool en_auto_cmd21; |
| 193 | struct device_attribute auto_cmd21_attr; |
| 194 | atomic_t controller_clock; |
| 195 | bool use_cdclp533; |
| 196 | bool use_updated_dll_reset; |
| 197 | bool use_14lpp_dll; |
Ritesh Harjani | ea70966 | 2015-05-27 15:40:24 +0530 | [diff] [blame] | 198 | bool enhanced_strobe; |
Venkat Gopalakrishnan | b47cf40 | 2015-09-04 18:32:25 -0700 | [diff] [blame] | 199 | bool rclk_delay_fix; |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 200 | u32 caps_0; |
Sahitya Tummala | 719c6b5 | 2015-05-21 08:28:19 +0530 | [diff] [blame] | 201 | struct sdhci_msm_ice_data ice; |
| 202 | u32 ice_clk_rate; |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 203 | struct sdhci_msm_pm_qos_group *pm_qos; |
Gilad Broner | 07d92eb | 2015-09-29 16:57:21 +0300 | [diff] [blame] | 204 | int pm_qos_prev_cpu; |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 205 | bool pm_qos_group_enable; |
| 206 | struct sdhci_msm_pm_qos_irq pm_qos_irq; |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 207 | }; |
Subhash Jadavani | ebcd00d | 2015-07-09 17:28:42 -0700 | [diff] [blame] | 208 | |
| 209 | extern char *saved_command_line; |
| 210 | |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 211 | void sdhci_msm_pm_qos_irq_init(struct sdhci_host *host); |
| 212 | void sdhci_msm_pm_qos_irq_vote(struct sdhci_host *host); |
| 213 | void sdhci_msm_pm_qos_irq_unvote(struct sdhci_host *host, bool async); |
| 214 | |
| 215 | void sdhci_msm_pm_qos_cpu_init(struct sdhci_host *host, |
| 216 | struct sdhci_msm_pm_qos_latency *latency); |
| 217 | void sdhci_msm_pm_qos_cpu_vote(struct sdhci_host *host, |
| 218 | struct sdhci_msm_pm_qos_latency *latency, int cpu); |
Gilad Broner | 07d92eb | 2015-09-29 16:57:21 +0300 | [diff] [blame] | 219 | bool sdhci_msm_pm_qos_cpu_unvote(struct sdhci_host *host, int cpu, bool async); |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 220 | |
| 221 | |
Sahitya Tummala | 5687473 | 2015-05-21 08:24:03 +0530 | [diff] [blame] | 222 | #endif /* __SDHCI_MSM_H__ */ |