blob: 6222e87a79b623e7299e2c694e01246979d1accd [file] [log] [blame]
Paul Walmsley69d88a02008-03-18 10:02:50 +02001/*
Paul Walmsley59fb6592010-12-21 15:30:55 -07002 * OMAP2+ Clock Management prototypes
Paul Walmsley69d88a02008-03-18 10:02:50 +02003 *
Paul Walmsleyd9a16f92012-10-29 20:57:39 -06004 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
Rajendra Nayak9b472672009-12-08 18:24:50 -07005 * Copyright (C) 2007-2009 Nokia Corporation
Paul Walmsley69d88a02008-03-18 10:02:50 +02006 *
7 * Written by Paul Walmsley
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
Paul Walmsley59fb6592010-12-21 15:30:55 -070013#ifndef __ARCH_ASM_MACH_OMAP2_CM_H
14#define __ARCH_ASM_MACH_OMAP2_CM_H
Paul Walmsley69d88a02008-03-18 10:02:50 +020015
Benoit Coussond9e66252010-05-20 12:31:08 -060016/*
17 * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the
18 * PRCM to request that a module exit the inactive state in the case of
19 * OMAP2 & 3.
20 * In the case of OMAP4 this is the max duration in microseconds for the
21 * module to reach the functionnal state from an inactive state.
22 */
23#define MAX_MODULE_READY_TIME 2000
24
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060025# ifndef __ASSEMBLER__
26extern void __iomem *cm_base;
27extern void __iomem *cm2_base;
28extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
29# endif
30
Paul Walmsleyb8f15b72012-06-17 11:57:53 -060031/*
32 * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
33 * the PRCM to request that a module enter the inactive state in the
34 * case of OMAP2 & 3. In the case of OMAP4 this is the max duration
35 * in microseconds for the module to reach the inactive state from
36 * a functional state.
37 * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
38 * kernel init.
39 */
40#define MAX_MODULE_DISABLE_TIME 5000
41
Paul Walmsley21325b252012-10-21 01:01:12 -060042# ifndef __ASSEMBLER__
43
44/**
45 * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060046 * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
47 * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
Tero Kristoa8ae5af2014-10-27 08:39:23 -070048 * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
Tero Kristo128603f2014-10-27 08:39:24 -070049 * @module_enable: ptr to the SoC CM-specific module_enable impl
50 * @module_disable: ptr to the SoC CM-specific module_disable impl
Paul Walmsley21325b252012-10-21 01:01:12 -060051 */
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060052struct cm_ll_data {
53 int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
54 u8 *idlest_reg_id);
Tero Kristo021b6ff2014-10-27 08:39:23 -070055 int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
56 u8 idlest_shift);
Tero Kristoa8ae5af2014-10-27 08:39:23 -070057 int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
58 u8 idlest_shift);
Tero Kristo128603f2014-10-27 08:39:24 -070059 void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
60 void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060061};
62
63extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
64 u8 *idlest_reg_id);
Tero Kristo021b6ff2014-10-27 08:39:23 -070065int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
66 u8 idlest_shift);
Tero Kristoa8ae5af2014-10-27 08:39:23 -070067int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
68 u8 idlest_shift);
Tero Kristo128603f2014-10-27 08:39:24 -070069int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
70int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
Paul Walmsley21325b252012-10-21 01:01:12 -060071extern int cm_register(struct cm_ll_data *cld);
72extern int cm_unregister(struct cm_ll_data *cld);
73
74# endif
75
Paul Walmsley69d88a02008-03-18 10:02:50 +020076#endif