blob: 6e7af7bb4855b8533e5556aec37316dc06d455ab [file] [log] [blame]
Michael Chana4636962009-06-08 18:14:43 -07001/* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2009 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
13#include <linux/module.h>
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/slab.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21#include <linux/netdevice.h>
22#include <linux/uio_driver.h>
23#include <linux/in.h>
24#include <linux/dma-mapping.h>
25#include <linux/delay.h>
26#include <linux/ethtool.h>
27#include <linux/if_vlan.h>
28#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
29#define BCM_VLAN 1
30#endif
31#include <net/ip.h>
32#include <net/tcp.h>
33#include <net/route.h>
34#include <net/ipv6.h>
35#include <net/ip6_route.h>
36#include <scsi/iscsi_if.h>
37
38#include "cnic_if.h"
39#include "bnx2.h"
Michael Chane2513062009-10-10 13:46:58 +000040#include "bnx2x_reg.h"
41#include "bnx2x_fw_defs.h"
42#include "bnx2x_hsi.h"
43#include "../scsi/bnx2i/57xx_iscsi_constants.h"
44#include "../scsi/bnx2i/57xx_iscsi_hsi.h"
Michael Chana4636962009-06-08 18:14:43 -070045#include "cnic.h"
46#include "cnic_defs.h"
47
48#define DRV_MODULE_NAME "cnic"
49#define PFX DRV_MODULE_NAME ": "
50
51static char version[] __devinitdata =
52 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
53
54MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
55 "Chen (zongxi@broadcom.com");
56MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
57MODULE_LICENSE("GPL");
58MODULE_VERSION(CNIC_MODULE_VERSION);
59
60static LIST_HEAD(cnic_dev_list);
61static DEFINE_RWLOCK(cnic_dev_lock);
62static DEFINE_MUTEX(cnic_lock);
63
64static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
65
66static int cnic_service_bnx2(void *, void *);
Michael Chan71034ba2009-10-10 13:46:59 +000067static int cnic_service_bnx2x(void *, void *);
Michael Chana4636962009-06-08 18:14:43 -070068static int cnic_ctl(void *, struct cnic_ctl_info *);
69
70static struct cnic_ops cnic_bnx2_ops = {
71 .cnic_owner = THIS_MODULE,
72 .cnic_handler = cnic_service_bnx2,
73 .cnic_ctl = cnic_ctl,
74};
75
Michael Chan71034ba2009-10-10 13:46:59 +000076static struct cnic_ops cnic_bnx2x_ops = {
77 .cnic_owner = THIS_MODULE,
78 .cnic_handler = cnic_service_bnx2x,
79 .cnic_ctl = cnic_ctl,
80};
81
Michael Chan86b53602009-10-10 13:46:57 +000082static void cnic_shutdown_rings(struct cnic_dev *);
83static void cnic_init_rings(struct cnic_dev *);
Michael Chana4636962009-06-08 18:14:43 -070084static int cnic_cm_set_pg(struct cnic_sock *);
85
86static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
87{
88 struct cnic_dev *dev = uinfo->priv;
89 struct cnic_local *cp = dev->cnic_priv;
90
91 if (!capable(CAP_NET_ADMIN))
92 return -EPERM;
93
94 if (cp->uio_dev != -1)
95 return -EBUSY;
96
Michael Chan86b53602009-10-10 13:46:57 +000097 rtnl_lock();
98 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
99 rtnl_unlock();
100 return -ENODEV;
101 }
102
Michael Chana4636962009-06-08 18:14:43 -0700103 cp->uio_dev = iminor(inode);
104
Michael Chan86b53602009-10-10 13:46:57 +0000105 cnic_init_rings(dev);
106 rtnl_unlock();
Michael Chana4636962009-06-08 18:14:43 -0700107
108 return 0;
109}
110
111static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
112{
113 struct cnic_dev *dev = uinfo->priv;
114 struct cnic_local *cp = dev->cnic_priv;
115
Michael Chan86b53602009-10-10 13:46:57 +0000116 cnic_shutdown_rings(dev);
Michael Chan6ef57a02009-09-21 15:39:37 +0000117
Michael Chana4636962009-06-08 18:14:43 -0700118 cp->uio_dev = -1;
119 return 0;
120}
121
122static inline void cnic_hold(struct cnic_dev *dev)
123{
124 atomic_inc(&dev->ref_count);
125}
126
127static inline void cnic_put(struct cnic_dev *dev)
128{
129 atomic_dec(&dev->ref_count);
130}
131
132static inline void csk_hold(struct cnic_sock *csk)
133{
134 atomic_inc(&csk->ref_count);
135}
136
137static inline void csk_put(struct cnic_sock *csk)
138{
139 atomic_dec(&csk->ref_count);
140}
141
142static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
143{
144 struct cnic_dev *cdev;
145
146 read_lock(&cnic_dev_lock);
147 list_for_each_entry(cdev, &cnic_dev_list, list) {
148 if (netdev == cdev->netdev) {
149 cnic_hold(cdev);
150 read_unlock(&cnic_dev_lock);
151 return cdev;
152 }
153 }
154 read_unlock(&cnic_dev_lock);
155 return NULL;
156}
157
Michael Chan7fc1ece2009-08-14 15:49:47 +0000158static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
159{
160 atomic_inc(&ulp_ops->ref_count);
161}
162
163static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
164{
165 atomic_dec(&ulp_ops->ref_count);
166}
167
Michael Chana4636962009-06-08 18:14:43 -0700168static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
169{
170 struct cnic_local *cp = dev->cnic_priv;
171 struct cnic_eth_dev *ethdev = cp->ethdev;
172 struct drv_ctl_info info;
173 struct drv_ctl_io *io = &info.data.io;
174
175 info.cmd = DRV_CTL_CTX_WR_CMD;
176 io->cid_addr = cid_addr;
177 io->offset = off;
178 io->data = val;
179 ethdev->drv_ctl(dev->netdev, &info);
180}
181
Michael Chan71034ba2009-10-10 13:46:59 +0000182static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
183{
184 struct cnic_local *cp = dev->cnic_priv;
185 struct cnic_eth_dev *ethdev = cp->ethdev;
186 struct drv_ctl_info info;
187 struct drv_ctl_io *io = &info.data.io;
188
189 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
190 io->offset = off;
191 io->dma_addr = addr;
192 ethdev->drv_ctl(dev->netdev, &info);
193}
194
195static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
196{
197 struct cnic_local *cp = dev->cnic_priv;
198 struct cnic_eth_dev *ethdev = cp->ethdev;
199 struct drv_ctl_info info;
200 struct drv_ctl_l2_ring *ring = &info.data.ring;
201
202 if (start)
203 info.cmd = DRV_CTL_START_L2_CMD;
204 else
205 info.cmd = DRV_CTL_STOP_L2_CMD;
206
207 ring->cid = cid;
208 ring->client_id = cl_id;
209 ethdev->drv_ctl(dev->netdev, &info);
210}
211
Michael Chana4636962009-06-08 18:14:43 -0700212static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
213{
214 struct cnic_local *cp = dev->cnic_priv;
215 struct cnic_eth_dev *ethdev = cp->ethdev;
216 struct drv_ctl_info info;
217 struct drv_ctl_io *io = &info.data.io;
218
219 info.cmd = DRV_CTL_IO_WR_CMD;
220 io->offset = off;
221 io->data = val;
222 ethdev->drv_ctl(dev->netdev, &info);
223}
224
225static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
226{
227 struct cnic_local *cp = dev->cnic_priv;
228 struct cnic_eth_dev *ethdev = cp->ethdev;
229 struct drv_ctl_info info;
230 struct drv_ctl_io *io = &info.data.io;
231
232 info.cmd = DRV_CTL_IO_RD_CMD;
233 io->offset = off;
234 ethdev->drv_ctl(dev->netdev, &info);
235 return io->data;
236}
237
238static int cnic_in_use(struct cnic_sock *csk)
239{
240 return test_bit(SK_F_INUSE, &csk->flags);
241}
242
243static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
244{
245 struct cnic_local *cp = dev->cnic_priv;
246 struct cnic_eth_dev *ethdev = cp->ethdev;
247 struct drv_ctl_info info;
248
249 info.cmd = DRV_CTL_COMPLETION_CMD;
250 info.data.comp.comp_count = count;
251 ethdev->drv_ctl(dev->netdev, &info);
252}
253
Michael Chan71034ba2009-10-10 13:46:59 +0000254static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
255{
256 u32 i;
257
258 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
259 if (cp->ctx_tbl[i].cid == cid) {
260 *l5_cid = i;
261 return 0;
262 }
263 }
264 return -EINVAL;
265}
266
Michael Chana4636962009-06-08 18:14:43 -0700267static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
268 struct cnic_sock *csk)
269{
270 struct iscsi_path path_req;
271 char *buf = NULL;
272 u16 len = 0;
273 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
274 struct cnic_ulp_ops *ulp_ops;
275
276 if (cp->uio_dev == -1)
277 return -ENODEV;
278
279 if (csk) {
280 len = sizeof(path_req);
281 buf = (char *) &path_req;
282 memset(&path_req, 0, len);
283
284 msg_type = ISCSI_KEVENT_PATH_REQ;
285 path_req.handle = (u64) csk->l5_cid;
286 if (test_bit(SK_F_IPV6, &csk->flags)) {
287 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
288 sizeof(struct in6_addr));
289 path_req.ip_addr_len = 16;
290 } else {
291 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
292 sizeof(struct in_addr));
293 path_req.ip_addr_len = 4;
294 }
295 path_req.vlan_id = csk->vlan_id;
296 path_req.pmtu = csk->mtu;
297 }
298
299 rcu_read_lock();
Michael Chan6d7760a2009-07-27 11:25:58 -0700300 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
Michael Chana4636962009-06-08 18:14:43 -0700301 if (ulp_ops)
302 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
303 rcu_read_unlock();
304 return 0;
305}
306
307static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
308 char *buf, u16 len)
309{
310 int rc = -EINVAL;
311
312 switch (msg_type) {
313 case ISCSI_UEVENT_PATH_UPDATE: {
314 struct cnic_local *cp;
315 u32 l5_cid;
316 struct cnic_sock *csk;
317 struct iscsi_path *path_resp;
318
319 if (len < sizeof(*path_resp))
320 break;
321
322 path_resp = (struct iscsi_path *) buf;
323 cp = dev->cnic_priv;
324 l5_cid = (u32) path_resp->handle;
325 if (l5_cid >= MAX_CM_SK_TBL_SZ)
326 break;
327
328 csk = &cp->csk_tbl[l5_cid];
329 csk_hold(csk);
330 if (cnic_in_use(csk)) {
331 memcpy(csk->ha, path_resp->mac_addr, 6);
332 if (test_bit(SK_F_IPV6, &csk->flags))
333 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
334 sizeof(struct in6_addr));
335 else
336 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
337 sizeof(struct in_addr));
338 if (is_valid_ether_addr(csk->ha))
339 cnic_cm_set_pg(csk);
340 }
341 csk_put(csk);
342 rc = 0;
343 }
344 }
345
346 return rc;
347}
348
349static int cnic_offld_prep(struct cnic_sock *csk)
350{
351 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
352 return 0;
353
354 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
355 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
356 return 0;
357 }
358
359 return 1;
360}
361
362static int cnic_close_prep(struct cnic_sock *csk)
363{
364 clear_bit(SK_F_CONNECT_START, &csk->flags);
365 smp_mb__after_clear_bit();
366
367 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
368 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
369 msleep(1);
370
371 return 1;
372 }
373 return 0;
374}
375
376static int cnic_abort_prep(struct cnic_sock *csk)
377{
378 clear_bit(SK_F_CONNECT_START, &csk->flags);
379 smp_mb__after_clear_bit();
380
381 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
382 msleep(1);
383
384 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
385 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
386 return 1;
387 }
388
389 return 0;
390}
391
Michael Chan6d7760a2009-07-27 11:25:58 -0700392static void cnic_uio_stop(void)
393{
394 struct cnic_dev *dev;
395
396 read_lock(&cnic_dev_lock);
397 list_for_each_entry(dev, &cnic_dev_list, list) {
398 struct cnic_local *cp = dev->cnic_priv;
399
400 if (cp->cnic_uinfo)
401 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
402 }
403 read_unlock(&cnic_dev_lock);
404}
405
Michael Chana4636962009-06-08 18:14:43 -0700406int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
407{
408 struct cnic_dev *dev;
409
410 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
411 printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
412 ulp_type);
413 return -EINVAL;
414 }
415 mutex_lock(&cnic_lock);
416 if (cnic_ulp_tbl[ulp_type]) {
417 printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
418 "been registered\n", ulp_type);
419 mutex_unlock(&cnic_lock);
420 return -EBUSY;
421 }
422
423 read_lock(&cnic_dev_lock);
424 list_for_each_entry(dev, &cnic_dev_list, list) {
425 struct cnic_local *cp = dev->cnic_priv;
426
427 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
428 }
429 read_unlock(&cnic_dev_lock);
430
Michael Chan7fc1ece2009-08-14 15:49:47 +0000431 atomic_set(&ulp_ops->ref_count, 0);
Michael Chana4636962009-06-08 18:14:43 -0700432 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
433 mutex_unlock(&cnic_lock);
434
435 /* Prevent race conditions with netdev_event */
436 rtnl_lock();
437 read_lock(&cnic_dev_lock);
438 list_for_each_entry(dev, &cnic_dev_list, list) {
439 struct cnic_local *cp = dev->cnic_priv;
440
441 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
442 ulp_ops->cnic_init(dev);
443 }
444 read_unlock(&cnic_dev_lock);
445 rtnl_unlock();
446
447 return 0;
448}
449
450int cnic_unregister_driver(int ulp_type)
451{
452 struct cnic_dev *dev;
Michael Chan7fc1ece2009-08-14 15:49:47 +0000453 struct cnic_ulp_ops *ulp_ops;
454 int i = 0;
Michael Chana4636962009-06-08 18:14:43 -0700455
456 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
457 printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
458 ulp_type);
459 return -EINVAL;
460 }
461 mutex_lock(&cnic_lock);
Michael Chan7fc1ece2009-08-14 15:49:47 +0000462 ulp_ops = cnic_ulp_tbl[ulp_type];
463 if (!ulp_ops) {
Michael Chana4636962009-06-08 18:14:43 -0700464 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
465 "been registered\n", ulp_type);
466 goto out_unlock;
467 }
468 read_lock(&cnic_dev_lock);
469 list_for_each_entry(dev, &cnic_dev_list, list) {
470 struct cnic_local *cp = dev->cnic_priv;
471
472 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
473 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
474 "still has devices registered\n", ulp_type);
475 read_unlock(&cnic_dev_lock);
476 goto out_unlock;
477 }
478 }
479 read_unlock(&cnic_dev_lock);
480
Michael Chan6d7760a2009-07-27 11:25:58 -0700481 if (ulp_type == CNIC_ULP_ISCSI)
482 cnic_uio_stop();
483
Michael Chana4636962009-06-08 18:14:43 -0700484 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
485
486 mutex_unlock(&cnic_lock);
487 synchronize_rcu();
Michael Chan7fc1ece2009-08-14 15:49:47 +0000488 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
489 msleep(100);
490 i++;
491 }
492
493 if (atomic_read(&ulp_ops->ref_count) != 0)
494 printk(KERN_WARNING PFX "%s: Failed waiting for ref count to go"
495 " to zero.\n", dev->netdev->name);
Michael Chana4636962009-06-08 18:14:43 -0700496 return 0;
497
498out_unlock:
499 mutex_unlock(&cnic_lock);
500 return -EINVAL;
501}
502
503static int cnic_start_hw(struct cnic_dev *);
504static void cnic_stop_hw(struct cnic_dev *);
505
506static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
507 void *ulp_ctx)
508{
509 struct cnic_local *cp = dev->cnic_priv;
510 struct cnic_ulp_ops *ulp_ops;
511
512 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
513 printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
514 ulp_type);
515 return -EINVAL;
516 }
517 mutex_lock(&cnic_lock);
518 if (cnic_ulp_tbl[ulp_type] == NULL) {
519 printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
520 "has not been registered\n", ulp_type);
521 mutex_unlock(&cnic_lock);
522 return -EAGAIN;
523 }
524 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
525 printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
526 "been registered to this device\n", ulp_type);
527 mutex_unlock(&cnic_lock);
528 return -EBUSY;
529 }
530
531 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
532 cp->ulp_handle[ulp_type] = ulp_ctx;
533 ulp_ops = cnic_ulp_tbl[ulp_type];
534 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
535 cnic_hold(dev);
536
537 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
538 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
539 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
540
541 mutex_unlock(&cnic_lock);
542
543 return 0;
544
545}
546EXPORT_SYMBOL(cnic_register_driver);
547
548static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
549{
550 struct cnic_local *cp = dev->cnic_priv;
Michael Chan681dbd72009-08-14 15:49:46 +0000551 int i = 0;
Michael Chana4636962009-06-08 18:14:43 -0700552
553 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
554 printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
555 ulp_type);
556 return -EINVAL;
557 }
558 mutex_lock(&cnic_lock);
559 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
560 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
561 cnic_put(dev);
562 } else {
563 printk(KERN_ERR PFX "cnic_unregister_device: device not "
564 "registered to this ulp type %d\n", ulp_type);
565 mutex_unlock(&cnic_lock);
566 return -EINVAL;
567 }
568 mutex_unlock(&cnic_lock);
569
570 synchronize_rcu();
571
Michael Chan681dbd72009-08-14 15:49:46 +0000572 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
573 i < 20) {
574 msleep(100);
575 i++;
576 }
577 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
578 printk(KERN_WARNING PFX "%s: Failed waiting for ULP up call"
579 " to complete.\n", dev->netdev->name);
580
Michael Chana4636962009-06-08 18:14:43 -0700581 return 0;
582}
583EXPORT_SYMBOL(cnic_unregister_driver);
584
585static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
586{
587 id_tbl->start = start_id;
588 id_tbl->max = size;
589 id_tbl->next = 0;
590 spin_lock_init(&id_tbl->lock);
591 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
592 if (!id_tbl->table)
593 return -ENOMEM;
594
595 return 0;
596}
597
598static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
599{
600 kfree(id_tbl->table);
601 id_tbl->table = NULL;
602}
603
604static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
605{
606 int ret = -1;
607
608 id -= id_tbl->start;
609 if (id >= id_tbl->max)
610 return ret;
611
612 spin_lock(&id_tbl->lock);
613 if (!test_bit(id, id_tbl->table)) {
614 set_bit(id, id_tbl->table);
615 ret = 0;
616 }
617 spin_unlock(&id_tbl->lock);
618 return ret;
619}
620
621/* Returns -1 if not successful */
622static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
623{
624 u32 id;
625
626 spin_lock(&id_tbl->lock);
627 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
628 if (id >= id_tbl->max) {
629 id = -1;
630 if (id_tbl->next != 0) {
631 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
632 if (id >= id_tbl->next)
633 id = -1;
634 }
635 }
636
637 if (id < id_tbl->max) {
638 set_bit(id, id_tbl->table);
639 id_tbl->next = (id + 1) & (id_tbl->max - 1);
640 id += id_tbl->start;
641 }
642
643 spin_unlock(&id_tbl->lock);
644
645 return id;
646}
647
648static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
649{
650 if (id == -1)
651 return;
652
653 id -= id_tbl->start;
654 if (id >= id_tbl->max)
655 return;
656
657 clear_bit(id, id_tbl->table);
658}
659
660static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
661{
662 int i;
663
664 if (!dma->pg_arr)
665 return;
666
667 for (i = 0; i < dma->num_pages; i++) {
668 if (dma->pg_arr[i]) {
669 pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
670 dma->pg_arr[i], dma->pg_map_arr[i]);
671 dma->pg_arr[i] = NULL;
672 }
673 }
674 if (dma->pgtbl) {
675 pci_free_consistent(dev->pcidev, dma->pgtbl_size,
676 dma->pgtbl, dma->pgtbl_map);
677 dma->pgtbl = NULL;
678 }
679 kfree(dma->pg_arr);
680 dma->pg_arr = NULL;
681 dma->num_pages = 0;
682}
683
684static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
685{
686 int i;
687 u32 *page_table = dma->pgtbl;
688
689 for (i = 0; i < dma->num_pages; i++) {
690 /* Each entry needs to be in big endian format. */
691 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
692 page_table++;
693 *page_table = (u32) dma->pg_map_arr[i];
694 page_table++;
695 }
696}
697
Michael Chan71034ba2009-10-10 13:46:59 +0000698static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
699{
700 int i;
701 u32 *page_table = dma->pgtbl;
702
703 for (i = 0; i < dma->num_pages; i++) {
704 /* Each entry needs to be in little endian format. */
705 *page_table = dma->pg_map_arr[i] & 0xffffffff;
706 page_table++;
707 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
708 page_table++;
709 }
710}
711
Michael Chana4636962009-06-08 18:14:43 -0700712static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
713 int pages, int use_pg_tbl)
714{
715 int i, size;
716 struct cnic_local *cp = dev->cnic_priv;
717
718 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
719 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
720 if (dma->pg_arr == NULL)
721 return -ENOMEM;
722
723 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
724 dma->num_pages = pages;
725
726 for (i = 0; i < pages; i++) {
727 dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
728 BCM_PAGE_SIZE,
729 &dma->pg_map_arr[i]);
730 if (dma->pg_arr[i] == NULL)
731 goto error;
732 }
733 if (!use_pg_tbl)
734 return 0;
735
736 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
737 ~(BCM_PAGE_SIZE - 1);
738 dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
739 &dma->pgtbl_map);
740 if (dma->pgtbl == NULL)
741 goto error;
742
743 cp->setup_pgtbl(dev, dma);
744
745 return 0;
746
747error:
748 cnic_free_dma(dev, dma);
749 return -ENOMEM;
750}
751
Michael Chan86b53602009-10-10 13:46:57 +0000752static void cnic_free_context(struct cnic_dev *dev)
753{
754 struct cnic_local *cp = dev->cnic_priv;
755 int i;
756
757 for (i = 0; i < cp->ctx_blks; i++) {
758 if (cp->ctx_arr[i].ctx) {
759 pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
760 cp->ctx_arr[i].ctx,
761 cp->ctx_arr[i].mapping);
762 cp->ctx_arr[i].ctx = NULL;
763 }
764 }
765}
766
Michael Chana4636962009-06-08 18:14:43 -0700767static void cnic_free_resc(struct cnic_dev *dev)
768{
769 struct cnic_local *cp = dev->cnic_priv;
770 int i = 0;
771
772 if (cp->cnic_uinfo) {
Michael Chana4636962009-06-08 18:14:43 -0700773 while (cp->uio_dev != -1 && i < 15) {
774 msleep(100);
775 i++;
776 }
777 uio_unregister_device(cp->cnic_uinfo);
778 kfree(cp->cnic_uinfo);
779 cp->cnic_uinfo = NULL;
780 }
781
782 if (cp->l2_buf) {
783 pci_free_consistent(dev->pcidev, cp->l2_buf_size,
784 cp->l2_buf, cp->l2_buf_map);
785 cp->l2_buf = NULL;
786 }
787
788 if (cp->l2_ring) {
789 pci_free_consistent(dev->pcidev, cp->l2_ring_size,
790 cp->l2_ring, cp->l2_ring_map);
791 cp->l2_ring = NULL;
792 }
793
Michael Chan86b53602009-10-10 13:46:57 +0000794 cnic_free_context(dev);
Michael Chana4636962009-06-08 18:14:43 -0700795 kfree(cp->ctx_arr);
796 cp->ctx_arr = NULL;
797 cp->ctx_blks = 0;
798
799 cnic_free_dma(dev, &cp->gbl_buf_info);
800 cnic_free_dma(dev, &cp->conn_buf_info);
801 cnic_free_dma(dev, &cp->kwq_info);
Michael Chan71034ba2009-10-10 13:46:59 +0000802 cnic_free_dma(dev, &cp->kwq_16_data_info);
Michael Chana4636962009-06-08 18:14:43 -0700803 cnic_free_dma(dev, &cp->kcq_info);
804 kfree(cp->iscsi_tbl);
805 cp->iscsi_tbl = NULL;
806 kfree(cp->ctx_tbl);
807 cp->ctx_tbl = NULL;
808
809 cnic_free_id_tbl(&cp->cid_tbl);
810}
811
812static int cnic_alloc_context(struct cnic_dev *dev)
813{
814 struct cnic_local *cp = dev->cnic_priv;
815
816 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
817 int i, k, arr_size;
818
819 cp->ctx_blk_size = BCM_PAGE_SIZE;
820 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
821 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
822 sizeof(struct cnic_ctx);
823 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
824 if (cp->ctx_arr == NULL)
825 return -ENOMEM;
826
827 k = 0;
828 for (i = 0; i < 2; i++) {
829 u32 j, reg, off, lo, hi;
830
831 if (i == 0)
832 off = BNX2_PG_CTX_MAP;
833 else
834 off = BNX2_ISCSI_CTX_MAP;
835
836 reg = cnic_reg_rd_ind(dev, off);
837 lo = reg >> 16;
838 hi = reg & 0xffff;
839 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
840 cp->ctx_arr[k].cid = j;
841 }
842
843 cp->ctx_blks = k;
844 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
845 cp->ctx_blks = 0;
846 return -ENOMEM;
847 }
848
849 for (i = 0; i < cp->ctx_blks; i++) {
850 cp->ctx_arr[i].ctx =
851 pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
852 &cp->ctx_arr[i].mapping);
853 if (cp->ctx_arr[i].ctx == NULL)
854 return -ENOMEM;
855 }
856 }
857 return 0;
858}
859
Michael Chanec0248e2009-08-26 09:49:22 +0000860static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
861{
862 struct cnic_local *cp = dev->cnic_priv;
863
864 cp->l2_ring_size = pages * BCM_PAGE_SIZE;
865 cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
866 &cp->l2_ring_map);
867 if (!cp->l2_ring)
868 return -ENOMEM;
869
870 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
871 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
872 cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
873 &cp->l2_buf_map);
874 if (!cp->l2_buf)
875 return -ENOMEM;
876
877 return 0;
878}
879
Michael Chan5e9b2db2009-08-26 09:49:23 +0000880static int cnic_alloc_uio(struct cnic_dev *dev) {
881 struct cnic_local *cp = dev->cnic_priv;
882 struct uio_info *uinfo;
883 int ret;
884
885 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
886 if (!uinfo)
887 return -ENOMEM;
888
889 uinfo->mem[0].addr = dev->netdev->base_addr;
890 uinfo->mem[0].internal_addr = dev->regview;
891 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
892 uinfo->mem[0].memtype = UIO_MEM_PHYS;
893
Michael Chan5e9b2db2009-08-26 09:49:23 +0000894 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
Michael Chan86b53602009-10-10 13:46:57 +0000895 uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
Michael Chan5e9b2db2009-08-26 09:49:23 +0000896 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
897 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
898 else
899 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
900
901 uinfo->name = "bnx2_cnic";
Michael Chan71034ba2009-10-10 13:46:59 +0000902 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
903 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
904 PAGE_MASK;
905 uinfo->mem[1].size = sizeof(struct host_def_status_block);
906
907 uinfo->name = "bnx2x_cnic";
Michael Chan5e9b2db2009-08-26 09:49:23 +0000908 }
909
910 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
911
912 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
913 uinfo->mem[2].size = cp->l2_ring_size;
914 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
915
916 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
917 uinfo->mem[3].size = cp->l2_buf_size;
918 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
919
920 uinfo->version = CNIC_MODULE_VERSION;
921 uinfo->irq = UIO_IRQ_CUSTOM;
922
923 uinfo->open = cnic_uio_open;
924 uinfo->release = cnic_uio_close;
925
926 uinfo->priv = dev;
927
928 ret = uio_register_device(&dev->pcidev->dev, uinfo);
929 if (ret) {
930 kfree(uinfo);
931 return ret;
932 }
933
934 cp->cnic_uinfo = uinfo;
935 return 0;
936}
937
Michael Chana4636962009-06-08 18:14:43 -0700938static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
939{
940 struct cnic_local *cp = dev->cnic_priv;
Michael Chana4636962009-06-08 18:14:43 -0700941 int ret;
942
943 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
944 if (ret)
945 goto error;
946 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
947
948 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
949 if (ret)
950 goto error;
951 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
952
953 ret = cnic_alloc_context(dev);
954 if (ret)
955 goto error;
956
Michael Chanec0248e2009-08-26 09:49:22 +0000957 ret = cnic_alloc_l2_rings(dev, 2);
958 if (ret)
Michael Chana4636962009-06-08 18:14:43 -0700959 goto error;
960
Michael Chan5e9b2db2009-08-26 09:49:23 +0000961 ret = cnic_alloc_uio(dev);
962 if (ret)
Michael Chana4636962009-06-08 18:14:43 -0700963 goto error;
964
Michael Chana4636962009-06-08 18:14:43 -0700965 return 0;
966
967error:
968 cnic_free_resc(dev);
969 return ret;
970}
971
Michael Chan71034ba2009-10-10 13:46:59 +0000972static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
973{
974 struct cnic_local *cp = dev->cnic_priv;
975 struct cnic_eth_dev *ethdev = cp->ethdev;
976 int ctx_blk_size = cp->ethdev->ctx_blk_size;
977 int total_mem, blks, i, cid_space;
978
979 if (BNX2X_ISCSI_START_CID < ethdev->starting_cid)
980 return -EINVAL;
981
982 cid_space = MAX_ISCSI_TBL_SZ +
983 (BNX2X_ISCSI_START_CID - ethdev->starting_cid);
984
985 total_mem = BNX2X_CONTEXT_MEM_SIZE * cid_space;
986 blks = total_mem / ctx_blk_size;
987 if (total_mem % ctx_blk_size)
988 blks++;
989
990 if (blks > cp->ethdev->ctx_tbl_len)
991 return -ENOMEM;
992
993 cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL);
994 if (cp->ctx_arr == NULL)
995 return -ENOMEM;
996
997 cp->ctx_blks = blks;
998 cp->ctx_blk_size = ctx_blk_size;
999 if (BNX2X_CHIP_IS_E1H(cp->chip_id))
1000 cp->ctx_align = 0;
1001 else
1002 cp->ctx_align = ctx_blk_size;
1003
1004 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1005
1006 for (i = 0; i < blks; i++) {
1007 cp->ctx_arr[i].ctx =
1008 pci_alloc_consistent(dev->pcidev, cp->ctx_blk_size,
1009 &cp->ctx_arr[i].mapping);
1010 if (cp->ctx_arr[i].ctx == NULL)
1011 return -ENOMEM;
1012
1013 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1014 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1015 cnic_free_context(dev);
1016 cp->ctx_blk_size += cp->ctx_align;
1017 i = -1;
1018 continue;
1019 }
1020 }
1021 }
1022 return 0;
1023}
1024
1025static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1026{
1027 struct cnic_local *cp = dev->cnic_priv;
1028 int i, j, n, ret, pages;
1029 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1030
1031 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1032 GFP_KERNEL);
1033 if (!cp->iscsi_tbl)
1034 goto error;
1035
1036 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1037 MAX_CNIC_L5_CONTEXT, GFP_KERNEL);
1038 if (!cp->ctx_tbl)
1039 goto error;
1040
1041 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1042 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1043 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1044 }
1045
1046 pages = PAGE_ALIGN(MAX_CNIC_L5_CONTEXT * CNIC_KWQ16_DATA_SIZE) /
1047 PAGE_SIZE;
1048
1049 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1050 if (ret)
1051 return -ENOMEM;
1052
1053 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1054 for (i = 0, j = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1055 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1056
1057 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1058 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1059 off;
1060
1061 if ((i % n) == (n - 1))
1062 j++;
1063 }
1064
1065 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0);
1066 if (ret)
1067 goto error;
1068 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
1069
1070 for (i = 0; i < KCQ_PAGE_CNT; i++) {
1071 struct bnx2x_bd_chain_next *next =
1072 (struct bnx2x_bd_chain_next *)
1073 &cp->kcq[i][MAX_KCQE_CNT];
1074 int j = i + 1;
1075
1076 if (j >= KCQ_PAGE_CNT)
1077 j = 0;
1078 next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32;
1079 next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff;
1080 }
1081
1082 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1083 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1084 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1085 if (ret)
1086 goto error;
1087
1088 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1089 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1090 if (ret)
1091 goto error;
1092
1093 ret = cnic_alloc_bnx2x_context(dev);
1094 if (ret)
1095 goto error;
1096
1097 cp->bnx2x_status_blk = cp->status_blk;
1098 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1099
1100 cp->l2_rx_ring_size = 15;
1101
1102 ret = cnic_alloc_l2_rings(dev, 4);
1103 if (ret)
1104 goto error;
1105
1106 ret = cnic_alloc_uio(dev);
1107 if (ret)
1108 goto error;
1109
1110 return 0;
1111
1112error:
1113 cnic_free_resc(dev);
1114 return -ENOMEM;
1115}
1116
Michael Chana4636962009-06-08 18:14:43 -07001117static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1118{
1119 return cp->max_kwq_idx -
1120 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1121}
1122
1123static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1124 u32 num_wqes)
1125{
1126 struct cnic_local *cp = dev->cnic_priv;
1127 struct kwqe *prod_qe;
1128 u16 prod, sw_prod, i;
1129
1130 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1131 return -EAGAIN; /* bnx2 is down */
1132
1133 spin_lock_bh(&cp->cnic_ulp_lock);
1134 if (num_wqes > cnic_kwq_avail(cp) &&
1135 !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
1136 spin_unlock_bh(&cp->cnic_ulp_lock);
1137 return -EAGAIN;
1138 }
1139
1140 cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
1141
1142 prod = cp->kwq_prod_idx;
1143 sw_prod = prod & MAX_KWQ_IDX;
1144 for (i = 0; i < num_wqes; i++) {
1145 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1146 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1147 prod++;
1148 sw_prod = prod & MAX_KWQ_IDX;
1149 }
1150 cp->kwq_prod_idx = prod;
1151
1152 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1153
1154 spin_unlock_bh(&cp->cnic_ulp_lock);
1155 return 0;
1156}
1157
Michael Chan71034ba2009-10-10 13:46:59 +00001158static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1159 union l5cm_specific_data *l5_data)
1160{
1161 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1162 dma_addr_t map;
1163
1164 map = ctx->kwqe_data_mapping;
1165 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1166 l5_data->phy_address.hi = (u64) map >> 32;
1167 return ctx->kwqe_data;
1168}
1169
1170static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1171 u32 type, union l5cm_specific_data *l5_data)
1172{
1173 struct cnic_local *cp = dev->cnic_priv;
1174 struct l5cm_spe kwqe;
1175 struct kwqe_16 *kwq[1];
1176 int ret;
1177
1178 kwqe.hdr.conn_and_cmd_data =
1179 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1180 BNX2X_HW_CID(cid, cp->func)));
1181 kwqe.hdr.type = cpu_to_le16(type);
1182 kwqe.hdr.reserved = 0;
1183 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1184 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1185
1186 kwq[0] = (struct kwqe_16 *) &kwqe;
1187
1188 spin_lock_bh(&cp->cnic_ulp_lock);
1189 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1190 spin_unlock_bh(&cp->cnic_ulp_lock);
1191
1192 if (ret == 1)
1193 return 0;
1194
1195 return -EBUSY;
1196}
1197
1198static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1199 struct kcqe *cqes[], u32 num_cqes)
1200{
1201 struct cnic_local *cp = dev->cnic_priv;
1202 struct cnic_ulp_ops *ulp_ops;
1203
1204 rcu_read_lock();
1205 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1206 if (likely(ulp_ops)) {
1207 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1208 cqes, num_cqes);
1209 }
1210 rcu_read_unlock();
1211}
1212
1213static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1214{
1215 struct cnic_local *cp = dev->cnic_priv;
1216 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1217 int func = cp->func, pages;
1218 int hq_bds;
1219
1220 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1221 cp->num_ccells = req1->num_ccells_per_conn;
1222 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1223 cp->num_iscsi_tasks;
1224 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1225 BNX2X_ISCSI_R2TQE_SIZE;
1226 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1227 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1228 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1229 cp->num_cqs = req1->num_cqs;
1230
1231 if (!dev->max_iscsi_conn)
1232 return 0;
1233
1234 /* init Tstorm RAM */
1235 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func),
1236 req1->rq_num_wqes);
1237 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1238 PAGE_SIZE);
1239 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1240 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1241 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1242 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1243 req1->num_tasks_per_conn);
1244
1245 /* init Ustorm RAM */
1246 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1247 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func),
1248 req1->rq_buffer_size);
1249 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1250 PAGE_SIZE);
1251 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1252 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1253 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1254 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1255 req1->num_tasks_per_conn);
1256 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func),
1257 req1->rq_num_wqes);
1258 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func),
1259 req1->cq_num_wqes);
1260 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1261 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1262
1263 /* init Xstorm RAM */
1264 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1265 PAGE_SIZE);
1266 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1267 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1268 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1269 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1270 req1->num_tasks_per_conn);
1271 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1272 hq_bds);
1273 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func),
1274 req1->num_tasks_per_conn);
1275 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1276 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1277
1278 /* init Cstorm RAM */
1279 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1280 PAGE_SIZE);
1281 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1282 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1283 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1284 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1285 req1->num_tasks_per_conn);
1286 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func),
1287 req1->cq_num_wqes);
1288 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1289 hq_bds);
1290
1291 return 0;
1292}
1293
1294static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1295{
1296 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1297 struct cnic_local *cp = dev->cnic_priv;
1298 int func = cp->func;
1299 struct iscsi_kcqe kcqe;
1300 struct kcqe *cqes[1];
1301
1302 memset(&kcqe, 0, sizeof(kcqe));
1303 if (!dev->max_iscsi_conn) {
1304 kcqe.completion_status =
1305 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1306 goto done;
1307 }
1308
1309 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1310 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1311 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1312 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1313 req2->error_bit_map[1]);
1314
1315 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1316 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1317 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1318 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1319 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1320 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1321 req2->error_bit_map[1]);
1322
1323 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1324 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1325
1326 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1327
1328done:
1329 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1330 cqes[0] = (struct kcqe *) &kcqe;
1331 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1332
1333 return 0;
1334}
1335
1336static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1337{
1338 struct cnic_local *cp = dev->cnic_priv;
1339 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1340
1341 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1342 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1343
1344 cnic_free_dma(dev, &iscsi->hq_info);
1345 cnic_free_dma(dev, &iscsi->r2tq_info);
1346 cnic_free_dma(dev, &iscsi->task_array_info);
1347 }
1348 cnic_free_id(&cp->cid_tbl, ctx->cid);
1349 ctx->cid = 0;
1350}
1351
1352static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1353{
1354 u32 cid;
1355 int ret, pages;
1356 struct cnic_local *cp = dev->cnic_priv;
1357 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1358 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1359
1360 cid = cnic_alloc_new_id(&cp->cid_tbl);
1361 if (cid == -1) {
1362 ret = -ENOMEM;
1363 goto error;
1364 }
1365
1366 ctx->cid = cid;
1367 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1368
1369 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1370 if (ret)
1371 goto error;
1372
1373 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1374 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1375 if (ret)
1376 goto error;
1377
1378 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1379 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1380 if (ret)
1381 goto error;
1382
1383 return 0;
1384
1385error:
1386 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1387 return ret;
1388}
1389
1390static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1391 struct regpair *ctx_addr)
1392{
1393 struct cnic_local *cp = dev->cnic_priv;
1394 struct cnic_eth_dev *ethdev = cp->ethdev;
1395 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1396 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1397 unsigned long align_off = 0;
1398 dma_addr_t ctx_map;
1399 void *ctx;
1400
1401 if (cp->ctx_align) {
1402 unsigned long mask = cp->ctx_align - 1;
1403
1404 if (cp->ctx_arr[blk].mapping & mask)
1405 align_off = cp->ctx_align -
1406 (cp->ctx_arr[blk].mapping & mask);
1407 }
1408 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1409 (off * BNX2X_CONTEXT_MEM_SIZE);
1410 ctx = cp->ctx_arr[blk].ctx + align_off +
1411 (off * BNX2X_CONTEXT_MEM_SIZE);
1412 if (init)
1413 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1414
1415 ctx_addr->lo = ctx_map & 0xffffffff;
1416 ctx_addr->hi = (u64) ctx_map >> 32;
1417 return ctx;
1418}
1419
1420static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1421 u32 num)
1422{
1423 struct cnic_local *cp = dev->cnic_priv;
1424 struct iscsi_kwqe_conn_offload1 *req1 =
1425 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1426 struct iscsi_kwqe_conn_offload2 *req2 =
1427 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1428 struct iscsi_kwqe_conn_offload3 *req3;
1429 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1430 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1431 u32 cid = ctx->cid;
1432 u32 hw_cid = BNX2X_HW_CID(cid, cp->func);
1433 struct iscsi_context *ictx;
1434 struct regpair context_addr;
1435 int i, j, n = 2, n_max;
1436
1437 ctx->ctx_flags = 0;
1438 if (!req2->num_additional_wqes)
1439 return -EINVAL;
1440
1441 n_max = req2->num_additional_wqes + 2;
1442
1443 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1444 if (ictx == NULL)
1445 return -ENOMEM;
1446
1447 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1448
1449 ictx->xstorm_ag_context.hq_prod = 1;
1450
1451 ictx->xstorm_st_context.iscsi.first_burst_length =
1452 ISCSI_DEF_FIRST_BURST_LEN;
1453 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1454 ISCSI_DEF_MAX_RECV_SEG_LEN;
1455 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1456 req1->sq_page_table_addr_lo;
1457 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1458 req1->sq_page_table_addr_hi;
1459 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1460 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1461 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1462 iscsi->hq_info.pgtbl_map & 0xffffffff;
1463 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1464 (u64) iscsi->hq_info.pgtbl_map >> 32;
1465 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1466 iscsi->hq_info.pgtbl[0];
1467 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1468 iscsi->hq_info.pgtbl[1];
1469 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1470 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1471 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1472 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1473 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1474 iscsi->r2tq_info.pgtbl[0];
1475 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1476 iscsi->r2tq_info.pgtbl[1];
1477 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1478 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1479 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1480 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1481 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1482 BNX2X_ISCSI_PBL_NOT_CACHED;
1483 ictx->xstorm_st_context.iscsi.flags.flags |=
1484 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1485 ictx->xstorm_st_context.iscsi.flags.flags |=
1486 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1487
1488 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1489 /* TSTORM requires the base address of RQ DB & not PTE */
1490 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1491 req2->rq_page_table_addr_lo & PAGE_MASK;
1492 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1493 req2->rq_page_table_addr_hi;
1494 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1495 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1496 ictx->tstorm_st_context.tcp.flags2 |=
1497 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1498
1499 ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1500
1501 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1502 req2->rq_page_table_addr_lo & 0xffffffff;
1503 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1504 (u64) req2->rq_page_table_addr_hi >> 32;
1505 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1506 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1507 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1508 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1509 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1510 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1511 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1512 iscsi->r2tq_info.pgtbl[0];
1513 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1514 iscsi->r2tq_info.pgtbl[1];
1515 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1516 req1->cq_page_table_addr_lo;
1517 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1518 req1->cq_page_table_addr_hi;
1519 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1520 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1521 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1522 ictx->ustorm_st_context.task_pbe_cache_index =
1523 BNX2X_ISCSI_PBL_NOT_CACHED;
1524 ictx->ustorm_st_context.task_pdu_cache_index =
1525 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1526
1527 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1528 if (j == 3) {
1529 if (n >= n_max)
1530 break;
1531 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1532 j = 0;
1533 }
1534 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1535 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1536 req3->qp_first_pte[j].hi;
1537 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1538 req3->qp_first_pte[j].lo;
1539 }
1540
1541 ictx->ustorm_st_context.task_pbl_base.lo =
1542 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1543 ictx->ustorm_st_context.task_pbl_base.hi =
1544 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1545 ictx->ustorm_st_context.tce_phy_addr.lo =
1546 iscsi->task_array_info.pgtbl[0];
1547 ictx->ustorm_st_context.tce_phy_addr.hi =
1548 iscsi->task_array_info.pgtbl[1];
1549 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1550 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1551 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1552 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1553 ISCSI_DEF_MAX_BURST_LEN;
1554 ictx->ustorm_st_context.negotiated_rx |=
1555 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1556 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1557
1558 ictx->cstorm_st_context.hq_pbl_base.lo =
1559 iscsi->hq_info.pgtbl_map & 0xffffffff;
1560 ictx->cstorm_st_context.hq_pbl_base.hi =
1561 (u64) iscsi->hq_info.pgtbl_map >> 32;
1562 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1563 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1564 ictx->cstorm_st_context.task_pbl_base.lo =
1565 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1566 ictx->cstorm_st_context.task_pbl_base.hi =
1567 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1568 /* CSTORM and USTORM initialization is different, CSTORM requires
1569 * CQ DB base & not PTE addr */
1570 ictx->cstorm_st_context.cq_db_base.lo =
1571 req1->cq_page_table_addr_lo & PAGE_MASK;
1572 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1573 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1574 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1575 for (i = 0; i < cp->num_cqs; i++) {
1576 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1577 ISCSI_INITIAL_SN;
1578 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1579 ISCSI_INITIAL_SN;
1580 }
1581
1582 ictx->xstorm_ag_context.cdu_reserved =
1583 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1584 ISCSI_CONNECTION_TYPE);
1585 ictx->ustorm_ag_context.cdu_usage =
1586 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1587 ISCSI_CONNECTION_TYPE);
1588 return 0;
1589
1590}
1591
1592static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1593 u32 num, int *work)
1594{
1595 struct iscsi_kwqe_conn_offload1 *req1;
1596 struct iscsi_kwqe_conn_offload2 *req2;
1597 struct cnic_local *cp = dev->cnic_priv;
1598 struct iscsi_kcqe kcqe;
1599 struct kcqe *cqes[1];
1600 u32 l5_cid;
1601 int ret;
1602
1603 if (num < 2) {
1604 *work = num;
1605 return -EINVAL;
1606 }
1607
1608 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1609 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1610 if ((num - 2) < req2->num_additional_wqes) {
1611 *work = num;
1612 return -EINVAL;
1613 }
1614 *work = 2 + req2->num_additional_wqes;;
1615
1616 l5_cid = req1->iscsi_conn_id;
1617 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1618 return -EINVAL;
1619
1620 memset(&kcqe, 0, sizeof(kcqe));
1621 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1622 kcqe.iscsi_conn_id = l5_cid;
1623 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1624
1625 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1626 atomic_dec(&cp->iscsi_conn);
1627 ret = 0;
1628 goto done;
1629 }
1630 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1631 if (ret) {
1632 atomic_dec(&cp->iscsi_conn);
1633 ret = 0;
1634 goto done;
1635 }
1636 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1637 if (ret < 0) {
1638 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1639 atomic_dec(&cp->iscsi_conn);
1640 goto done;
1641 }
1642
1643 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1644 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid,
1645 cp->func);
1646
1647done:
1648 cqes[0] = (struct kcqe *) &kcqe;
1649 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1650 return ret;
1651}
1652
1653
1654static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1655{
1656 struct cnic_local *cp = dev->cnic_priv;
1657 struct iscsi_kwqe_conn_update *req =
1658 (struct iscsi_kwqe_conn_update *) kwqe;
1659 void *data;
1660 union l5cm_specific_data l5_data;
1661 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1662 int ret;
1663
1664 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1665 return -EINVAL;
1666
1667 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1668 if (!data)
1669 return -ENOMEM;
1670
1671 memcpy(data, kwqe, sizeof(struct kwqe));
1672
1673 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1674 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1675 return ret;
1676}
1677
1678static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1679{
1680 struct cnic_local *cp = dev->cnic_priv;
1681 struct iscsi_kwqe_conn_destroy *req =
1682 (struct iscsi_kwqe_conn_destroy *) kwqe;
1683 union l5cm_specific_data l5_data;
1684 u32 l5_cid = req->reserved0;
1685 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1686 int ret = 0;
1687 struct iscsi_kcqe kcqe;
1688 struct kcqe *cqes[1];
1689
1690 if (!(ctx->ctx_flags & CTX_FL_OFFLD_START))
1691 goto skip_cfc_delete;
1692
1693 while (!time_after(jiffies, ctx->timestamp + (2 * HZ)))
1694 msleep(250);
1695
1696 init_waitqueue_head(&ctx->waitq);
1697 ctx->wait_cond = 0;
1698 memset(&l5_data, 0, sizeof(l5_data));
1699 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
1700 req->context_id,
1701 ETH_CONNECTION_TYPE |
1702 (1 << SPE_HDR_COMMON_RAMROD_SHIFT),
1703 &l5_data);
1704 if (ret == 0)
1705 wait_event(ctx->waitq, ctx->wait_cond);
1706
1707skip_cfc_delete:
1708 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1709
1710 atomic_dec(&cp->iscsi_conn);
1711
1712 memset(&kcqe, 0, sizeof(kcqe));
1713 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1714 kcqe.iscsi_conn_id = l5_cid;
1715 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1716 kcqe.iscsi_conn_context_id = req->context_id;
1717
1718 cqes[0] = (struct kcqe *) &kcqe;
1719 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1720
1721 return ret;
1722}
1723
1724static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1725 struct l4_kwq_connect_req1 *kwqe1,
1726 struct l4_kwq_connect_req3 *kwqe3,
1727 struct l5cm_active_conn_buffer *conn_buf)
1728{
1729 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1730 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1731 &conn_buf->xstorm_conn_buffer;
1732 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1733 &conn_buf->tstorm_conn_buffer;
1734 struct regpair context_addr;
1735 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1736 struct in6_addr src_ip, dst_ip;
1737 int i;
1738 u32 *addrp;
1739
1740 addrp = (u32 *) &conn_addr->local_ip_addr;
1741 for (i = 0; i < 4; i++, addrp++)
1742 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1743
1744 addrp = (u32 *) &conn_addr->remote_ip_addr;
1745 for (i = 0; i < 4; i++, addrp++)
1746 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1747
1748 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1749
1750 xstorm_buf->context_addr.hi = context_addr.hi;
1751 xstorm_buf->context_addr.lo = context_addr.lo;
1752 xstorm_buf->mss = 0xffff;
1753 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1754 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1755 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1756 xstorm_buf->pseudo_header_checksum =
1757 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1758
1759 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1760 tstorm_buf->params |=
1761 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1762 if (kwqe3->ka_timeout) {
1763 tstorm_buf->ka_enable = 1;
1764 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1765 tstorm_buf->ka_interval = kwqe3->ka_interval;
1766 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1767 }
1768 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1769 tstorm_buf->snd_buf = kwqe3->snd_buf;
1770 tstorm_buf->max_rt_time = 0xffffffff;
1771}
1772
1773static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1774{
1775 struct cnic_local *cp = dev->cnic_priv;
1776 int func = CNIC_FUNC(cp);
1777 u8 *mac = dev->mac_addr;
1778
1779 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1780 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]);
1781 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1782 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]);
1783 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1784 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]);
1785 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1786 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]);
1787 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1788 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]);
1789 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1790 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]);
1791
1792 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1793 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]);
1794 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1795 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1796 mac[4]);
1797 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1798 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]);
1799 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1800 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1801 mac[2]);
1802 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1803 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2,
1804 mac[1]);
1805 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1806 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3,
1807 mac[0]);
1808}
1809
1810static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1811{
1812 struct cnic_local *cp = dev->cnic_priv;
1813 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1814 u16 tstorm_flags = 0;
1815
1816 if (tcp_ts) {
1817 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1818 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1819 }
1820
1821 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1822 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags);
1823
1824 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1825 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags);
1826}
1827
1828static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1829 u32 num, int *work)
1830{
1831 struct cnic_local *cp = dev->cnic_priv;
1832 struct l4_kwq_connect_req1 *kwqe1 =
1833 (struct l4_kwq_connect_req1 *) wqes[0];
1834 struct l4_kwq_connect_req3 *kwqe3;
1835 struct l5cm_active_conn_buffer *conn_buf;
1836 struct l5cm_conn_addr_params *conn_addr;
1837 union l5cm_specific_data l5_data;
1838 u32 l5_cid = kwqe1->pg_cid;
1839 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1840 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1841 int ret;
1842
1843 if (num < 2) {
1844 *work = num;
1845 return -EINVAL;
1846 }
1847
1848 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1849 *work = 3;
1850 else
1851 *work = 2;
1852
1853 if (num < *work) {
1854 *work = num;
1855 return -EINVAL;
1856 }
1857
1858 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1859 printk(KERN_ERR PFX "%s: conn_buf size too big\n",
1860 dev->netdev->name);
1861 return -ENOMEM;
1862 }
1863 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1864 if (!conn_buf)
1865 return -ENOMEM;
1866
1867 memset(conn_buf, 0, sizeof(*conn_buf));
1868
1869 conn_addr = &conn_buf->conn_addr_buf;
1870 conn_addr->remote_addr_0 = csk->ha[0];
1871 conn_addr->remote_addr_1 = csk->ha[1];
1872 conn_addr->remote_addr_2 = csk->ha[2];
1873 conn_addr->remote_addr_3 = csk->ha[3];
1874 conn_addr->remote_addr_4 = csk->ha[4];
1875 conn_addr->remote_addr_5 = csk->ha[5];
1876
1877 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1878 struct l4_kwq_connect_req2 *kwqe2 =
1879 (struct l4_kwq_connect_req2 *) wqes[1];
1880
1881 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
1882 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
1883 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
1884
1885 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
1886 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
1887 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
1888 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
1889 }
1890 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
1891
1892 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
1893 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
1894 conn_addr->local_tcp_port = kwqe1->src_port;
1895 conn_addr->remote_tcp_port = kwqe1->dst_port;
1896
1897 conn_addr->pmtu = kwqe3->pmtu;
1898 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
1899
1900 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1901 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id);
1902
1903 cnic_bnx2x_set_tcp_timestamp(dev,
1904 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
1905
1906 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
1907 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1908 if (!ret)
1909 ctx->ctx_flags |= CTX_FL_OFFLD_START;
1910
1911 return ret;
1912}
1913
1914static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
1915{
1916 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
1917 union l5cm_specific_data l5_data;
1918 int ret;
1919
1920 memset(&l5_data, 0, sizeof(l5_data));
1921 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
1922 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1923 return ret;
1924}
1925
1926static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
1927{
1928 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
1929 union l5cm_specific_data l5_data;
1930 int ret;
1931
1932 memset(&l5_data, 0, sizeof(l5_data));
1933 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
1934 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1935 return ret;
1936}
1937static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1938{
1939 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
1940 struct l4_kcq kcqe;
1941 struct kcqe *cqes[1];
1942
1943 memset(&kcqe, 0, sizeof(kcqe));
1944 kcqe.pg_host_opaque = req->host_opaque;
1945 kcqe.pg_cid = req->host_opaque;
1946 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
1947 cqes[0] = (struct kcqe *) &kcqe;
1948 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1949 return 0;
1950}
1951
1952static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1953{
1954 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
1955 struct l4_kcq kcqe;
1956 struct kcqe *cqes[1];
1957
1958 memset(&kcqe, 0, sizeof(kcqe));
1959 kcqe.pg_host_opaque = req->pg_host_opaque;
1960 kcqe.pg_cid = req->pg_cid;
1961 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
1962 cqes[0] = (struct kcqe *) &kcqe;
1963 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1964 return 0;
1965}
1966
1967static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1968 u32 num_wqes)
1969{
1970 int i, work, ret;
1971 u32 opcode;
1972 struct kwqe *kwqe;
1973
1974 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1975 return -EAGAIN; /* bnx2 is down */
1976
1977 for (i = 0; i < num_wqes; ) {
1978 kwqe = wqes[i];
1979 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
1980 work = 1;
1981
1982 switch (opcode) {
1983 case ISCSI_KWQE_OPCODE_INIT1:
1984 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
1985 break;
1986 case ISCSI_KWQE_OPCODE_INIT2:
1987 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
1988 break;
1989 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
1990 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
1991 num_wqes - i, &work);
1992 break;
1993 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
1994 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
1995 break;
1996 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
1997 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
1998 break;
1999 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2000 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2001 &work);
2002 break;
2003 case L4_KWQE_OPCODE_VALUE_CLOSE:
2004 ret = cnic_bnx2x_close(dev, kwqe);
2005 break;
2006 case L4_KWQE_OPCODE_VALUE_RESET:
2007 ret = cnic_bnx2x_reset(dev, kwqe);
2008 break;
2009 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2010 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2011 break;
2012 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2013 ret = cnic_bnx2x_update_pg(dev, kwqe);
2014 break;
2015 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2016 ret = 0;
2017 break;
2018 default:
2019 ret = 0;
2020 printk(KERN_ERR PFX "%s: Unknown type of KWQE(0x%x)\n",
2021 dev->netdev->name, opcode);
2022 break;
2023 }
2024 if (ret < 0)
2025 printk(KERN_ERR PFX "%s: KWQE(0x%x) failed\n",
2026 dev->netdev->name, opcode);
2027 i += work;
2028 }
2029 return 0;
2030}
2031
Michael Chana4636962009-06-08 18:14:43 -07002032static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2033{
2034 struct cnic_local *cp = dev->cnic_priv;
2035 int i, j;
2036
2037 i = 0;
2038 j = 1;
2039 while (num_cqes) {
2040 struct cnic_ulp_ops *ulp_ops;
2041 int ulp_type;
2042 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2043 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2044
2045 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2046 cnic_kwq_completion(dev, 1);
2047
2048 while (j < num_cqes) {
2049 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2050
2051 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2052 break;
2053
2054 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2055 cnic_kwq_completion(dev, 1);
2056 j++;
2057 }
2058
2059 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2060 ulp_type = CNIC_ULP_RDMA;
2061 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2062 ulp_type = CNIC_ULP_ISCSI;
2063 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2064 ulp_type = CNIC_ULP_L4;
2065 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2066 goto end;
2067 else {
2068 printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
2069 dev->netdev->name, kcqe_op_flag);
2070 goto end;
2071 }
2072
2073 rcu_read_lock();
2074 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2075 if (likely(ulp_ops)) {
2076 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2077 cp->completed_kcq + i, j);
2078 }
2079 rcu_read_unlock();
2080end:
2081 num_cqes -= j;
2082 i += j;
2083 j = 1;
2084 }
2085 return;
2086}
2087
2088static u16 cnic_bnx2_next_idx(u16 idx)
2089{
2090 return idx + 1;
2091}
2092
2093static u16 cnic_bnx2_hw_idx(u16 idx)
2094{
2095 return idx;
2096}
2097
Michael Chan71034ba2009-10-10 13:46:59 +00002098static u16 cnic_bnx2x_next_idx(u16 idx)
2099{
2100 idx++;
2101 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2102 idx++;
2103
2104 return idx;
2105}
2106
2107static u16 cnic_bnx2x_hw_idx(u16 idx)
2108{
2109 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2110 idx++;
2111 return idx;
2112}
2113
Michael Chana4636962009-06-08 18:14:43 -07002114static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
2115{
2116 struct cnic_local *cp = dev->cnic_priv;
2117 u16 i, ri, last;
2118 struct kcqe *kcqe;
2119 int kcqe_cnt = 0, last_cnt = 0;
2120
2121 i = ri = last = *sw_prod;
2122 ri &= MAX_KCQ_IDX;
2123
2124 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2125 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2126 cp->completed_kcq[kcqe_cnt++] = kcqe;
2127 i = cp->next_idx(i);
2128 ri = i & MAX_KCQ_IDX;
2129 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2130 last_cnt = kcqe_cnt;
2131 last = i;
2132 }
2133 }
2134
2135 *sw_prod = last;
2136 return last_cnt;
2137}
2138
Michael Chan86b53602009-10-10 13:46:57 +00002139static void cnic_chk_pkt_rings(struct cnic_local *cp)
Michael Chana4636962009-06-08 18:14:43 -07002140{
2141 u16 rx_cons = *cp->rx_cons_ptr;
2142 u16 tx_cons = *cp->tx_cons_ptr;
2143
2144 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2145 cp->tx_cons = tx_cons;
2146 cp->rx_cons = rx_cons;
Michael Chan71034ba2009-10-10 13:46:59 +00002147
Michael Chana4636962009-06-08 18:14:43 -07002148 uio_event_notify(cp->cnic_uinfo);
2149 }
2150}
2151
2152static int cnic_service_bnx2(void *data, void *status_blk)
2153{
2154 struct cnic_dev *dev = data;
2155 struct status_block *sblk = status_blk;
2156 struct cnic_local *cp = dev->cnic_priv;
2157 u32 status_idx = sblk->status_idx;
2158 u16 hw_prod, sw_prod;
2159 int kcqe_cnt;
2160
2161 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2162 return status_idx;
2163
2164 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2165
2166 hw_prod = sblk->status_completion_producer_index;
2167 sw_prod = cp->kcq_prod_idx;
2168 while (sw_prod != hw_prod) {
2169 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2170 if (kcqe_cnt == 0)
2171 goto done;
2172
2173 service_kcqes(dev, kcqe_cnt);
2174
2175 /* Tell compiler that status_blk fields can change. */
2176 barrier();
2177 if (status_idx != sblk->status_idx) {
2178 status_idx = sblk->status_idx;
2179 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2180 hw_prod = sblk->status_completion_producer_index;
2181 } else
2182 break;
2183 }
2184
2185done:
2186 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2187
2188 cp->kcq_prod_idx = sw_prod;
2189
Michael Chan86b53602009-10-10 13:46:57 +00002190 cnic_chk_pkt_rings(cp);
Michael Chana4636962009-06-08 18:14:43 -07002191 return status_idx;
2192}
2193
2194static void cnic_service_bnx2_msix(unsigned long data)
2195{
2196 struct cnic_dev *dev = (struct cnic_dev *) data;
2197 struct cnic_local *cp = dev->cnic_priv;
2198 struct status_block_msix *status_blk = cp->bnx2_status_blk;
2199 u32 status_idx = status_blk->status_idx;
2200 u16 hw_prod, sw_prod;
2201 int kcqe_cnt;
2202
2203 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2204
2205 hw_prod = status_blk->status_completion_producer_index;
2206 sw_prod = cp->kcq_prod_idx;
2207 while (sw_prod != hw_prod) {
2208 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2209 if (kcqe_cnt == 0)
2210 goto done;
2211
2212 service_kcqes(dev, kcqe_cnt);
2213
2214 /* Tell compiler that status_blk fields can change. */
2215 barrier();
2216 if (status_idx != status_blk->status_idx) {
2217 status_idx = status_blk->status_idx;
2218 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2219 hw_prod = status_blk->status_completion_producer_index;
2220 } else
2221 break;
2222 }
2223
2224done:
2225 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2226 cp->kcq_prod_idx = sw_prod;
2227
Michael Chan86b53602009-10-10 13:46:57 +00002228 cnic_chk_pkt_rings(cp);
Michael Chana4636962009-06-08 18:14:43 -07002229
2230 cp->last_status_idx = status_idx;
2231 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2232 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2233}
2234
2235static irqreturn_t cnic_irq(int irq, void *dev_instance)
2236{
2237 struct cnic_dev *dev = dev_instance;
2238 struct cnic_local *cp = dev->cnic_priv;
2239 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2240
2241 if (cp->ack_int)
2242 cp->ack_int(dev);
2243
2244 prefetch(cp->status_blk);
2245 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2246
2247 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2248 tasklet_schedule(&cp->cnic_irq_task);
2249
2250 return IRQ_HANDLED;
2251}
2252
Michael Chan71034ba2009-10-10 13:46:59 +00002253static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2254 u16 index, u8 op, u8 update)
2255{
2256 struct cnic_local *cp = dev->cnic_priv;
2257 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2258 COMMAND_REG_INT_ACK);
2259 struct igu_ack_register igu_ack;
2260
2261 igu_ack.status_block_index = index;
2262 igu_ack.sb_id_and_flags =
2263 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2264 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2265 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2266 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2267
2268 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2269}
2270
2271static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2272{
2273 struct cnic_local *cp = dev->cnic_priv;
2274
2275 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0,
2276 IGU_INT_DISABLE, 0);
2277}
2278
2279static void cnic_service_bnx2x_bh(unsigned long data)
2280{
2281 struct cnic_dev *dev = (struct cnic_dev *) data;
2282 struct cnic_local *cp = dev->cnic_priv;
2283 u16 hw_prod, sw_prod;
2284 struct cstorm_status_block_c *sblk =
2285 &cp->bnx2x_status_blk->c_status_block;
2286 u32 status_idx = sblk->status_block_index;
2287 int kcqe_cnt;
2288
2289 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2290 return;
2291
2292 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2293 hw_prod = cp->hw_idx(hw_prod);
2294 sw_prod = cp->kcq_prod_idx;
2295 while (sw_prod != hw_prod) {
2296 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2297 if (kcqe_cnt == 0)
2298 goto done;
2299
2300 service_kcqes(dev, kcqe_cnt);
2301
2302 /* Tell compiler that sblk fields can change. */
2303 barrier();
2304 if (status_idx == sblk->status_block_index)
2305 break;
2306
2307 status_idx = sblk->status_block_index;
2308 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2309 hw_prod = cp->hw_idx(hw_prod);
2310 }
2311
2312done:
2313 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX);
2314 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID,
2315 status_idx, IGU_INT_ENABLE, 1);
2316
2317 cp->kcq_prod_idx = sw_prod;
2318 return;
2319}
2320
2321static int cnic_service_bnx2x(void *data, void *status_blk)
2322{
2323 struct cnic_dev *dev = data;
2324 struct cnic_local *cp = dev->cnic_priv;
2325 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2326
2327 prefetch(cp->status_blk);
2328 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2329
2330 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2331 tasklet_schedule(&cp->cnic_irq_task);
2332
2333 cnic_chk_pkt_rings(cp);
2334
2335 return 0;
2336}
2337
Michael Chana4636962009-06-08 18:14:43 -07002338static void cnic_ulp_stop(struct cnic_dev *dev)
2339{
2340 struct cnic_local *cp = dev->cnic_priv;
2341 int if_type;
2342
Michael Chan6d7760a2009-07-27 11:25:58 -07002343 if (cp->cnic_uinfo)
2344 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2345
Michael Chana4636962009-06-08 18:14:43 -07002346 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2347 struct cnic_ulp_ops *ulp_ops;
2348
Michael Chan681dbd72009-08-14 15:49:46 +00002349 mutex_lock(&cnic_lock);
2350 ulp_ops = cp->ulp_ops[if_type];
2351 if (!ulp_ops) {
2352 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002353 continue;
Michael Chan681dbd72009-08-14 15:49:46 +00002354 }
2355 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2356 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002357
2358 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2359 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
Michael Chan681dbd72009-08-14 15:49:46 +00002360
2361 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
Michael Chana4636962009-06-08 18:14:43 -07002362 }
Michael Chana4636962009-06-08 18:14:43 -07002363}
2364
2365static void cnic_ulp_start(struct cnic_dev *dev)
2366{
2367 struct cnic_local *cp = dev->cnic_priv;
2368 int if_type;
2369
Michael Chana4636962009-06-08 18:14:43 -07002370 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2371 struct cnic_ulp_ops *ulp_ops;
2372
Michael Chan681dbd72009-08-14 15:49:46 +00002373 mutex_lock(&cnic_lock);
2374 ulp_ops = cp->ulp_ops[if_type];
2375 if (!ulp_ops || !ulp_ops->cnic_start) {
2376 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002377 continue;
Michael Chan681dbd72009-08-14 15:49:46 +00002378 }
2379 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2380 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002381
2382 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2383 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
Michael Chan681dbd72009-08-14 15:49:46 +00002384
2385 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
Michael Chana4636962009-06-08 18:14:43 -07002386 }
Michael Chana4636962009-06-08 18:14:43 -07002387}
2388
2389static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2390{
2391 struct cnic_dev *dev = data;
2392
2393 switch (info->cmd) {
2394 case CNIC_CTL_STOP_CMD:
2395 cnic_hold(dev);
Michael Chana4636962009-06-08 18:14:43 -07002396
2397 cnic_ulp_stop(dev);
2398 cnic_stop_hw(dev);
2399
Michael Chana4636962009-06-08 18:14:43 -07002400 cnic_put(dev);
2401 break;
2402 case CNIC_CTL_START_CMD:
2403 cnic_hold(dev);
Michael Chana4636962009-06-08 18:14:43 -07002404
2405 if (!cnic_start_hw(dev))
2406 cnic_ulp_start(dev);
2407
Michael Chana4636962009-06-08 18:14:43 -07002408 cnic_put(dev);
2409 break;
Michael Chan71034ba2009-10-10 13:46:59 +00002410 case CNIC_CTL_COMPLETION_CMD: {
2411 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2412 u32 l5_cid;
2413 struct cnic_local *cp = dev->cnic_priv;
2414
2415 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2416 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2417
2418 ctx->wait_cond = 1;
2419 wake_up(&ctx->waitq);
2420 }
2421 break;
2422 }
Michael Chana4636962009-06-08 18:14:43 -07002423 default:
2424 return -EINVAL;
2425 }
2426 return 0;
2427}
2428
2429static void cnic_ulp_init(struct cnic_dev *dev)
2430{
2431 int i;
2432 struct cnic_local *cp = dev->cnic_priv;
2433
Michael Chana4636962009-06-08 18:14:43 -07002434 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2435 struct cnic_ulp_ops *ulp_ops;
2436
Michael Chan7fc1ece2009-08-14 15:49:47 +00002437 mutex_lock(&cnic_lock);
2438 ulp_ops = cnic_ulp_tbl[i];
2439 if (!ulp_ops || !ulp_ops->cnic_init) {
2440 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002441 continue;
Michael Chan7fc1ece2009-08-14 15:49:47 +00002442 }
2443 ulp_get(ulp_ops);
2444 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002445
2446 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2447 ulp_ops->cnic_init(dev);
2448
Michael Chan7fc1ece2009-08-14 15:49:47 +00002449 ulp_put(ulp_ops);
Michael Chana4636962009-06-08 18:14:43 -07002450 }
Michael Chana4636962009-06-08 18:14:43 -07002451}
2452
2453static void cnic_ulp_exit(struct cnic_dev *dev)
2454{
2455 int i;
2456 struct cnic_local *cp = dev->cnic_priv;
2457
Michael Chana4636962009-06-08 18:14:43 -07002458 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2459 struct cnic_ulp_ops *ulp_ops;
2460
Michael Chan7fc1ece2009-08-14 15:49:47 +00002461 mutex_lock(&cnic_lock);
2462 ulp_ops = cnic_ulp_tbl[i];
2463 if (!ulp_ops || !ulp_ops->cnic_exit) {
2464 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002465 continue;
Michael Chan7fc1ece2009-08-14 15:49:47 +00002466 }
2467 ulp_get(ulp_ops);
2468 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002469
2470 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2471 ulp_ops->cnic_exit(dev);
2472
Michael Chan7fc1ece2009-08-14 15:49:47 +00002473 ulp_put(ulp_ops);
Michael Chana4636962009-06-08 18:14:43 -07002474 }
Michael Chana4636962009-06-08 18:14:43 -07002475}
2476
2477static int cnic_cm_offload_pg(struct cnic_sock *csk)
2478{
2479 struct cnic_dev *dev = csk->dev;
2480 struct l4_kwq_offload_pg *l4kwqe;
2481 struct kwqe *wqes[1];
2482
2483 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2484 memset(l4kwqe, 0, sizeof(*l4kwqe));
2485 wqes[0] = (struct kwqe *) l4kwqe;
2486
2487 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2488 l4kwqe->flags =
2489 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2490 l4kwqe->l2hdr_nbytes = ETH_HLEN;
2491
2492 l4kwqe->da0 = csk->ha[0];
2493 l4kwqe->da1 = csk->ha[1];
2494 l4kwqe->da2 = csk->ha[2];
2495 l4kwqe->da3 = csk->ha[3];
2496 l4kwqe->da4 = csk->ha[4];
2497 l4kwqe->da5 = csk->ha[5];
2498
2499 l4kwqe->sa0 = dev->mac_addr[0];
2500 l4kwqe->sa1 = dev->mac_addr[1];
2501 l4kwqe->sa2 = dev->mac_addr[2];
2502 l4kwqe->sa3 = dev->mac_addr[3];
2503 l4kwqe->sa4 = dev->mac_addr[4];
2504 l4kwqe->sa5 = dev->mac_addr[5];
2505
2506 l4kwqe->etype = ETH_P_IP;
2507 l4kwqe->ipid_count = DEF_IPID_COUNT;
2508 l4kwqe->host_opaque = csk->l5_cid;
2509
2510 if (csk->vlan_id) {
2511 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2512 l4kwqe->vlan_tag = csk->vlan_id;
2513 l4kwqe->l2hdr_nbytes += 4;
2514 }
2515
2516 return dev->submit_kwqes(dev, wqes, 1);
2517}
2518
2519static int cnic_cm_update_pg(struct cnic_sock *csk)
2520{
2521 struct cnic_dev *dev = csk->dev;
2522 struct l4_kwq_update_pg *l4kwqe;
2523 struct kwqe *wqes[1];
2524
2525 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2526 memset(l4kwqe, 0, sizeof(*l4kwqe));
2527 wqes[0] = (struct kwqe *) l4kwqe;
2528
2529 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2530 l4kwqe->flags =
2531 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2532 l4kwqe->pg_cid = csk->pg_cid;
2533
2534 l4kwqe->da0 = csk->ha[0];
2535 l4kwqe->da1 = csk->ha[1];
2536 l4kwqe->da2 = csk->ha[2];
2537 l4kwqe->da3 = csk->ha[3];
2538 l4kwqe->da4 = csk->ha[4];
2539 l4kwqe->da5 = csk->ha[5];
2540
2541 l4kwqe->pg_host_opaque = csk->l5_cid;
2542 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2543
2544 return dev->submit_kwqes(dev, wqes, 1);
2545}
2546
2547static int cnic_cm_upload_pg(struct cnic_sock *csk)
2548{
2549 struct cnic_dev *dev = csk->dev;
2550 struct l4_kwq_upload *l4kwqe;
2551 struct kwqe *wqes[1];
2552
2553 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2554 memset(l4kwqe, 0, sizeof(*l4kwqe));
2555 wqes[0] = (struct kwqe *) l4kwqe;
2556
2557 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2558 l4kwqe->flags =
2559 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2560 l4kwqe->cid = csk->pg_cid;
2561
2562 return dev->submit_kwqes(dev, wqes, 1);
2563}
2564
2565static int cnic_cm_conn_req(struct cnic_sock *csk)
2566{
2567 struct cnic_dev *dev = csk->dev;
2568 struct l4_kwq_connect_req1 *l4kwqe1;
2569 struct l4_kwq_connect_req2 *l4kwqe2;
2570 struct l4_kwq_connect_req3 *l4kwqe3;
2571 struct kwqe *wqes[3];
2572 u8 tcp_flags = 0;
2573 int num_wqes = 2;
2574
2575 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2576 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2577 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2578 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2579 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2580 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2581
2582 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2583 l4kwqe3->flags =
2584 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2585 l4kwqe3->ka_timeout = csk->ka_timeout;
2586 l4kwqe3->ka_interval = csk->ka_interval;
2587 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2588 l4kwqe3->tos = csk->tos;
2589 l4kwqe3->ttl = csk->ttl;
2590 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2591 l4kwqe3->pmtu = csk->mtu;
2592 l4kwqe3->rcv_buf = csk->rcv_buf;
2593 l4kwqe3->snd_buf = csk->snd_buf;
2594 l4kwqe3->seed = csk->seed;
2595
2596 wqes[0] = (struct kwqe *) l4kwqe1;
2597 if (test_bit(SK_F_IPV6, &csk->flags)) {
2598 wqes[1] = (struct kwqe *) l4kwqe2;
2599 wqes[2] = (struct kwqe *) l4kwqe3;
2600 num_wqes = 3;
2601
2602 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2603 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2604 l4kwqe2->flags =
2605 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2606 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2607 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2608 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2609 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2610 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2611 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2612 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2613 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2614 sizeof(struct tcphdr);
2615 } else {
2616 wqes[1] = (struct kwqe *) l4kwqe3;
2617 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2618 sizeof(struct tcphdr);
2619 }
2620
2621 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2622 l4kwqe1->flags =
2623 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2624 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2625 l4kwqe1->cid = csk->cid;
2626 l4kwqe1->pg_cid = csk->pg_cid;
2627 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2628 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2629 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2630 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2631 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2632 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2633 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2634 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2635 if (csk->tcp_flags & SK_TCP_NAGLE)
2636 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2637 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2638 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2639 if (csk->tcp_flags & SK_TCP_SACK)
2640 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2641 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2642 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2643
2644 l4kwqe1->tcp_flags = tcp_flags;
2645
2646 return dev->submit_kwqes(dev, wqes, num_wqes);
2647}
2648
2649static int cnic_cm_close_req(struct cnic_sock *csk)
2650{
2651 struct cnic_dev *dev = csk->dev;
2652 struct l4_kwq_close_req *l4kwqe;
2653 struct kwqe *wqes[1];
2654
2655 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2656 memset(l4kwqe, 0, sizeof(*l4kwqe));
2657 wqes[0] = (struct kwqe *) l4kwqe;
2658
2659 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2660 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2661 l4kwqe->cid = csk->cid;
2662
2663 return dev->submit_kwqes(dev, wqes, 1);
2664}
2665
2666static int cnic_cm_abort_req(struct cnic_sock *csk)
2667{
2668 struct cnic_dev *dev = csk->dev;
2669 struct l4_kwq_reset_req *l4kwqe;
2670 struct kwqe *wqes[1];
2671
2672 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2673 memset(l4kwqe, 0, sizeof(*l4kwqe));
2674 wqes[0] = (struct kwqe *) l4kwqe;
2675
2676 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2677 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2678 l4kwqe->cid = csk->cid;
2679
2680 return dev->submit_kwqes(dev, wqes, 1);
2681}
2682
2683static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2684 u32 l5_cid, struct cnic_sock **csk, void *context)
2685{
2686 struct cnic_local *cp = dev->cnic_priv;
2687 struct cnic_sock *csk1;
2688
2689 if (l5_cid >= MAX_CM_SK_TBL_SZ)
2690 return -EINVAL;
2691
2692 csk1 = &cp->csk_tbl[l5_cid];
2693 if (atomic_read(&csk1->ref_count))
2694 return -EAGAIN;
2695
2696 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2697 return -EBUSY;
2698
2699 csk1->dev = dev;
2700 csk1->cid = cid;
2701 csk1->l5_cid = l5_cid;
2702 csk1->ulp_type = ulp_type;
2703 csk1->context = context;
2704
2705 csk1->ka_timeout = DEF_KA_TIMEOUT;
2706 csk1->ka_interval = DEF_KA_INTERVAL;
2707 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2708 csk1->tos = DEF_TOS;
2709 csk1->ttl = DEF_TTL;
2710 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2711 csk1->rcv_buf = DEF_RCV_BUF;
2712 csk1->snd_buf = DEF_SND_BUF;
2713 csk1->seed = DEF_SEED;
2714
2715 *csk = csk1;
2716 return 0;
2717}
2718
2719static void cnic_cm_cleanup(struct cnic_sock *csk)
2720{
2721 if (csk->src_port) {
2722 struct cnic_dev *dev = csk->dev;
2723 struct cnic_local *cp = dev->cnic_priv;
2724
2725 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2726 csk->src_port = 0;
2727 }
2728}
2729
2730static void cnic_close_conn(struct cnic_sock *csk)
2731{
2732 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2733 cnic_cm_upload_pg(csk);
2734 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2735 }
2736 cnic_cm_cleanup(csk);
2737}
2738
2739static int cnic_cm_destroy(struct cnic_sock *csk)
2740{
2741 if (!cnic_in_use(csk))
2742 return -EINVAL;
2743
2744 csk_hold(csk);
2745 clear_bit(SK_F_INUSE, &csk->flags);
2746 smp_mb__after_clear_bit();
2747 while (atomic_read(&csk->ref_count) != 1)
2748 msleep(1);
2749 cnic_cm_cleanup(csk);
2750
2751 csk->flags = 0;
2752 csk_put(csk);
2753 return 0;
2754}
2755
2756static inline u16 cnic_get_vlan(struct net_device *dev,
2757 struct net_device **vlan_dev)
2758{
2759 if (dev->priv_flags & IFF_802_1Q_VLAN) {
2760 *vlan_dev = vlan_dev_real_dev(dev);
2761 return vlan_dev_vlan_id(dev);
2762 }
2763 *vlan_dev = dev;
2764 return 0;
2765}
2766
2767static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2768 struct dst_entry **dst)
2769{
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002770#if defined(CONFIG_INET)
Michael Chana4636962009-06-08 18:14:43 -07002771 struct flowi fl;
2772 int err;
2773 struct rtable *rt;
2774
2775 memset(&fl, 0, sizeof(fl));
2776 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2777
2778 err = ip_route_output_key(&init_net, &rt, &fl);
2779 if (!err)
2780 *dst = &rt->u.dst;
2781 return err;
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002782#else
2783 return -ENETUNREACH;
2784#endif
Michael Chana4636962009-06-08 18:14:43 -07002785}
2786
2787static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2788 struct dst_entry **dst)
2789{
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002790#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
Michael Chana4636962009-06-08 18:14:43 -07002791 struct flowi fl;
2792
2793 memset(&fl, 0, sizeof(fl));
2794 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2795 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2796 fl.oif = dst_addr->sin6_scope_id;
2797
2798 *dst = ip6_route_output(&init_net, NULL, &fl);
2799 if (*dst)
2800 return 0;
2801#endif
2802
2803 return -ENETUNREACH;
2804}
2805
2806static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2807 int ulp_type)
2808{
2809 struct cnic_dev *dev = NULL;
2810 struct dst_entry *dst;
2811 struct net_device *netdev = NULL;
2812 int err = -ENETUNREACH;
2813
2814 if (dst_addr->sin_family == AF_INET)
2815 err = cnic_get_v4_route(dst_addr, &dst);
2816 else if (dst_addr->sin_family == AF_INET6) {
2817 struct sockaddr_in6 *dst_addr6 =
2818 (struct sockaddr_in6 *) dst_addr;
2819
2820 err = cnic_get_v6_route(dst_addr6, &dst);
2821 } else
2822 return NULL;
2823
2824 if (err)
2825 return NULL;
2826
2827 if (!dst->dev)
2828 goto done;
2829
2830 cnic_get_vlan(dst->dev, &netdev);
2831
2832 dev = cnic_from_netdev(netdev);
2833
2834done:
2835 dst_release(dst);
2836 if (dev)
2837 cnic_put(dev);
2838 return dev;
2839}
2840
2841static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2842{
2843 struct cnic_dev *dev = csk->dev;
2844 struct cnic_local *cp = dev->cnic_priv;
2845
2846 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
2847}
2848
2849static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2850{
2851 struct cnic_dev *dev = csk->dev;
2852 struct cnic_local *cp = dev->cnic_priv;
2853 int is_v6, err, rc = -ENETUNREACH;
2854 struct dst_entry *dst;
2855 struct net_device *realdev;
2856 u32 local_port;
2857
2858 if (saddr->local.v6.sin6_family == AF_INET6 &&
2859 saddr->remote.v6.sin6_family == AF_INET6)
2860 is_v6 = 1;
2861 else if (saddr->local.v4.sin_family == AF_INET &&
2862 saddr->remote.v4.sin_family == AF_INET)
2863 is_v6 = 0;
2864 else
2865 return -EINVAL;
2866
2867 clear_bit(SK_F_IPV6, &csk->flags);
2868
2869 if (is_v6) {
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002870#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
Michael Chana4636962009-06-08 18:14:43 -07002871 set_bit(SK_F_IPV6, &csk->flags);
2872 err = cnic_get_v6_route(&saddr->remote.v6, &dst);
2873 if (err)
2874 return err;
2875
2876 if (!dst || dst->error || !dst->dev)
2877 goto err_out;
2878
2879 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
2880 sizeof(struct in6_addr));
2881 csk->dst_port = saddr->remote.v6.sin6_port;
2882 local_port = saddr->local.v6.sin6_port;
2883#else
2884 return rc;
2885#endif
2886
2887 } else {
2888 err = cnic_get_v4_route(&saddr->remote.v4, &dst);
2889 if (err)
2890 return err;
2891
2892 if (!dst || dst->error || !dst->dev)
2893 goto err_out;
2894
2895 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
2896 csk->dst_port = saddr->remote.v4.sin_port;
2897 local_port = saddr->local.v4.sin_port;
2898 }
2899
2900 csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
2901 if (realdev != dev->netdev)
2902 goto err_out;
2903
2904 if (local_port >= CNIC_LOCAL_PORT_MIN &&
2905 local_port < CNIC_LOCAL_PORT_MAX) {
2906 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
2907 local_port = 0;
2908 } else
2909 local_port = 0;
2910
2911 if (!local_port) {
2912 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
2913 if (local_port == -1) {
2914 rc = -ENOMEM;
2915 goto err_out;
2916 }
2917 }
2918 csk->src_port = local_port;
2919
2920 csk->mtu = dst_mtu(dst);
2921 rc = 0;
2922
2923err_out:
2924 dst_release(dst);
2925 return rc;
2926}
2927
2928static void cnic_init_csk_state(struct cnic_sock *csk)
2929{
2930 csk->state = 0;
2931 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
2932 clear_bit(SK_F_CLOSING, &csk->flags);
2933}
2934
2935static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2936{
2937 int err = 0;
2938
2939 if (!cnic_in_use(csk))
2940 return -EINVAL;
2941
2942 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
2943 return -EINVAL;
2944
2945 cnic_init_csk_state(csk);
2946
2947 err = cnic_get_route(csk, saddr);
2948 if (err)
2949 goto err_out;
2950
2951 err = cnic_resolve_addr(csk, saddr);
2952 if (!err)
2953 return 0;
2954
2955err_out:
2956 clear_bit(SK_F_CONNECT_START, &csk->flags);
2957 return err;
2958}
2959
2960static int cnic_cm_abort(struct cnic_sock *csk)
2961{
2962 struct cnic_local *cp = csk->dev->cnic_priv;
2963 u32 opcode;
2964
2965 if (!cnic_in_use(csk))
2966 return -EINVAL;
2967
2968 if (cnic_abort_prep(csk))
2969 return cnic_cm_abort_req(csk);
2970
2971 /* Getting here means that we haven't started connect, or
2972 * connect was not successful.
2973 */
2974
2975 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2976 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
2977 opcode = csk->state;
2978 else
2979 opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
2980 cp->close_conn(csk, opcode);
2981
2982 return 0;
2983}
2984
2985static int cnic_cm_close(struct cnic_sock *csk)
2986{
2987 if (!cnic_in_use(csk))
2988 return -EINVAL;
2989
2990 if (cnic_close_prep(csk)) {
2991 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2992 return cnic_cm_close_req(csk);
2993 }
2994 return 0;
2995}
2996
2997static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
2998 u8 opcode)
2999{
3000 struct cnic_ulp_ops *ulp_ops;
3001 int ulp_type = csk->ulp_type;
3002
3003 rcu_read_lock();
3004 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3005 if (ulp_ops) {
3006 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3007 ulp_ops->cm_connect_complete(csk);
3008 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3009 ulp_ops->cm_close_complete(csk);
3010 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3011 ulp_ops->cm_remote_abort(csk);
3012 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3013 ulp_ops->cm_abort_complete(csk);
3014 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3015 ulp_ops->cm_remote_close(csk);
3016 }
3017 rcu_read_unlock();
3018}
3019
3020static int cnic_cm_set_pg(struct cnic_sock *csk)
3021{
3022 if (cnic_offld_prep(csk)) {
3023 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3024 cnic_cm_update_pg(csk);
3025 else
3026 cnic_cm_offload_pg(csk);
3027 }
3028 return 0;
3029}
3030
3031static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3032{
3033 struct cnic_local *cp = dev->cnic_priv;
3034 u32 l5_cid = kcqe->pg_host_opaque;
3035 u8 opcode = kcqe->op_code;
3036 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3037
3038 csk_hold(csk);
3039 if (!cnic_in_use(csk))
3040 goto done;
3041
3042 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3043 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3044 goto done;
3045 }
3046 csk->pg_cid = kcqe->pg_cid;
3047 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3048 cnic_cm_conn_req(csk);
3049
3050done:
3051 csk_put(csk);
3052}
3053
3054static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3055{
3056 struct cnic_local *cp = dev->cnic_priv;
3057 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3058 u8 opcode = l4kcqe->op_code;
3059 u32 l5_cid;
3060 struct cnic_sock *csk;
3061
3062 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3063 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3064 cnic_cm_process_offld_pg(dev, l4kcqe);
3065 return;
3066 }
3067
3068 l5_cid = l4kcqe->conn_id;
3069 if (opcode & 0x80)
3070 l5_cid = l4kcqe->cid;
3071 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3072 return;
3073
3074 csk = &cp->csk_tbl[l5_cid];
3075 csk_hold(csk);
3076
3077 if (!cnic_in_use(csk)) {
3078 csk_put(csk);
3079 return;
3080 }
3081
3082 switch (opcode) {
3083 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3084 if (l4kcqe->status == 0)
3085 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3086
3087 smp_mb__before_clear_bit();
3088 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3089 cnic_cm_upcall(cp, csk, opcode);
3090 break;
3091
3092 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3093 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
3094 csk->state = opcode;
3095 /* fall through */
3096 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3097 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
Michael Chan71034ba2009-10-10 13:46:59 +00003098 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3099 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
Michael Chana4636962009-06-08 18:14:43 -07003100 cp->close_conn(csk, opcode);
3101 break;
3102
3103 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3104 cnic_cm_upcall(cp, csk, opcode);
3105 break;
3106 }
3107 csk_put(csk);
3108}
3109
3110static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3111{
3112 struct cnic_dev *dev = data;
3113 int i;
3114
3115 for (i = 0; i < num; i++)
3116 cnic_cm_process_kcqe(dev, kcqe[i]);
3117}
3118
3119static struct cnic_ulp_ops cm_ulp_ops = {
3120 .indicate_kcqes = cnic_cm_indicate_kcqe,
3121};
3122
3123static void cnic_cm_free_mem(struct cnic_dev *dev)
3124{
3125 struct cnic_local *cp = dev->cnic_priv;
3126
3127 kfree(cp->csk_tbl);
3128 cp->csk_tbl = NULL;
3129 cnic_free_id_tbl(&cp->csk_port_tbl);
3130}
3131
3132static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3133{
3134 struct cnic_local *cp = dev->cnic_priv;
3135
3136 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3137 GFP_KERNEL);
3138 if (!cp->csk_tbl)
3139 return -ENOMEM;
3140
3141 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3142 CNIC_LOCAL_PORT_MIN)) {
3143 cnic_cm_free_mem(dev);
3144 return -ENOMEM;
3145 }
3146 return 0;
3147}
3148
3149static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3150{
3151 if ((opcode == csk->state) ||
3152 (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
3153 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
3154 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
3155 return 1;
3156 }
3157 return 0;
3158}
3159
3160static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3161{
3162 struct cnic_dev *dev = csk->dev;
3163 struct cnic_local *cp = dev->cnic_priv;
3164
3165 clear_bit(SK_F_CONNECT_START, &csk->flags);
3166 if (cnic_ready_to_close(csk, opcode)) {
3167 cnic_close_conn(csk);
3168 cnic_cm_upcall(cp, csk, opcode);
3169 }
3170}
3171
3172static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3173{
3174}
3175
3176static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3177{
3178 u32 seed;
3179
3180 get_random_bytes(&seed, 4);
3181 cnic_ctx_wr(dev, 45, 0, seed);
3182 return 0;
3183}
3184
Michael Chan71034ba2009-10-10 13:46:59 +00003185static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3186{
3187 struct cnic_dev *dev = csk->dev;
3188 struct cnic_local *cp = dev->cnic_priv;
3189 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3190 union l5cm_specific_data l5_data;
3191 u32 cmd = 0;
3192 int close_complete = 0;
3193
3194 switch (opcode) {
3195 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3196 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3197 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3198 if (cnic_ready_to_close(csk, opcode))
3199 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3200 break;
3201 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3202 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3203 break;
3204 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3205 close_complete = 1;
3206 break;
3207 }
3208 if (cmd) {
3209 memset(&l5_data, 0, sizeof(l5_data));
3210
3211 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3212 &l5_data);
3213 } else if (close_complete) {
3214 ctx->timestamp = jiffies;
3215 cnic_close_conn(csk);
3216 cnic_cm_upcall(cp, csk, csk->state);
3217 }
3218}
3219
3220static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3221{
3222}
3223
3224static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3225{
3226 struct cnic_local *cp = dev->cnic_priv;
3227 int func = CNIC_FUNC(cp);
3228
3229 cnic_init_bnx2x_mac(dev);
3230 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3231
3232 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3233 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0);
3234
3235 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3236 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1);
3237 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3238 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func),
3239 DEF_MAX_DA_COUNT);
3240
3241 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3242 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL);
3243 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3244 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS);
3245 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3246 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2);
3247 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3248 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER);
3249
3250 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func),
3251 DEF_MAX_CWND);
3252 return 0;
3253}
3254
Michael Chana4636962009-06-08 18:14:43 -07003255static int cnic_cm_open(struct cnic_dev *dev)
3256{
3257 struct cnic_local *cp = dev->cnic_priv;
3258 int err;
3259
3260 err = cnic_cm_alloc_mem(dev);
3261 if (err)
3262 return err;
3263
3264 err = cp->start_cm(dev);
3265
3266 if (err)
3267 goto err_out;
3268
3269 dev->cm_create = cnic_cm_create;
3270 dev->cm_destroy = cnic_cm_destroy;
3271 dev->cm_connect = cnic_cm_connect;
3272 dev->cm_abort = cnic_cm_abort;
3273 dev->cm_close = cnic_cm_close;
3274 dev->cm_select_dev = cnic_cm_select_dev;
3275
3276 cp->ulp_handle[CNIC_ULP_L4] = dev;
3277 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3278 return 0;
3279
3280err_out:
3281 cnic_cm_free_mem(dev);
3282 return err;
3283}
3284
3285static int cnic_cm_shutdown(struct cnic_dev *dev)
3286{
3287 struct cnic_local *cp = dev->cnic_priv;
3288 int i;
3289
3290 cp->stop_cm(dev);
3291
3292 if (!cp->csk_tbl)
3293 return 0;
3294
3295 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3296 struct cnic_sock *csk = &cp->csk_tbl[i];
3297
3298 clear_bit(SK_F_INUSE, &csk->flags);
3299 cnic_cm_cleanup(csk);
3300 }
3301 cnic_cm_free_mem(dev);
3302
3303 return 0;
3304}
3305
3306static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3307{
3308 struct cnic_local *cp = dev->cnic_priv;
3309 u32 cid_addr;
3310 int i;
3311
3312 if (CHIP_NUM(cp) == CHIP_NUM_5709)
3313 return;
3314
3315 cid_addr = GET_CID_ADDR(cid);
3316
3317 for (i = 0; i < CTX_SIZE; i += 4)
3318 cnic_ctx_wr(dev, cid_addr, i, 0);
3319}
3320
3321static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3322{
3323 struct cnic_local *cp = dev->cnic_priv;
3324 int ret = 0, i;
3325 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3326
3327 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3328 return 0;
3329
3330 for (i = 0; i < cp->ctx_blks; i++) {
3331 int j;
3332 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3333 u32 val;
3334
3335 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3336
3337 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3338 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3339 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3340 (u64) cp->ctx_arr[i].mapping >> 32);
3341 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3342 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3343 for (j = 0; j < 10; j++) {
3344
3345 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3346 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3347 break;
3348 udelay(5);
3349 }
3350 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3351 ret = -EBUSY;
3352 break;
3353 }
3354 }
3355 return ret;
3356}
3357
3358static void cnic_free_irq(struct cnic_dev *dev)
3359{
3360 struct cnic_local *cp = dev->cnic_priv;
3361 struct cnic_eth_dev *ethdev = cp->ethdev;
3362
3363 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3364 cp->disable_int_sync(dev);
3365 tasklet_disable(&cp->cnic_irq_task);
3366 free_irq(ethdev->irq_arr[0].vector, dev);
3367 }
3368}
3369
3370static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3371{
3372 struct cnic_local *cp = dev->cnic_priv;
3373 struct cnic_eth_dev *ethdev = cp->ethdev;
3374
3375 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3376 int err, i = 0;
3377 int sblk_num = cp->status_blk_num;
3378 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3379 BNX2_HC_SB_CONFIG_1;
3380
3381 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3382
3383 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3384 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3385 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3386
3387 cp->bnx2_status_blk = cp->status_blk;
3388 cp->last_status_idx = cp->bnx2_status_blk->status_idx;
3389 tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
3390 (unsigned long) dev);
3391 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3392 "cnic", dev);
3393 if (err) {
3394 tasklet_disable(&cp->cnic_irq_task);
3395 return err;
3396 }
3397 while (cp->bnx2_status_blk->status_completion_producer_index &&
3398 i < 10) {
3399 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3400 1 << (11 + sblk_num));
3401 udelay(10);
3402 i++;
3403 barrier();
3404 }
3405 if (cp->bnx2_status_blk->status_completion_producer_index) {
3406 cnic_free_irq(dev);
3407 goto failed;
3408 }
3409
3410 } else {
3411 struct status_block *sblk = cp->status_blk;
3412 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3413 int i = 0;
3414
3415 while (sblk->status_completion_producer_index && i < 10) {
3416 CNIC_WR(dev, BNX2_HC_COMMAND,
3417 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3418 udelay(10);
3419 i++;
3420 barrier();
3421 }
3422 if (sblk->status_completion_producer_index)
3423 goto failed;
3424
3425 }
3426 return 0;
3427
3428failed:
3429 printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
3430 dev->netdev->name);
3431 return -EBUSY;
3432}
3433
3434static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3435{
3436 struct cnic_local *cp = dev->cnic_priv;
3437 struct cnic_eth_dev *ethdev = cp->ethdev;
3438
3439 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3440 return;
3441
3442 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3443 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3444}
3445
3446static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3447{
3448 struct cnic_local *cp = dev->cnic_priv;
3449 struct cnic_eth_dev *ethdev = cp->ethdev;
3450
3451 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3452 return;
3453
3454 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3455 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3456 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3457 synchronize_irq(ethdev->irq_arr[0].vector);
3458}
3459
3460static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3461{
3462 struct cnic_local *cp = dev->cnic_priv;
3463 struct cnic_eth_dev *ethdev = cp->ethdev;
3464 u32 cid_addr, tx_cid, sb_id;
3465 u32 val, offset0, offset1, offset2, offset3;
3466 int i;
3467 struct tx_bd *txbd;
3468 dma_addr_t buf_map;
3469 struct status_block *s_blk = cp->status_blk;
3470
3471 sb_id = cp->status_blk_num;
3472 tx_cid = 20;
3473 cnic_init_context(dev, tx_cid);
3474 cnic_init_context(dev, tx_cid + 1);
3475 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3476 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3477 struct status_block_msix *sblk = cp->status_blk;
3478
3479 tx_cid = TX_TSS_CID + sb_id - 1;
3480 cnic_init_context(dev, tx_cid);
3481 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3482 (TX_TSS_CID << 7));
3483 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3484 }
3485 cp->tx_cons = *cp->tx_cons_ptr;
3486
3487 cid_addr = GET_CID_ADDR(tx_cid);
3488 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3489 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3490
3491 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3492 cnic_ctx_wr(dev, cid_addr2, i, 0);
3493
3494 offset0 = BNX2_L2CTX_TYPE_XI;
3495 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3496 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3497 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3498 } else {
3499 offset0 = BNX2_L2CTX_TYPE;
3500 offset1 = BNX2_L2CTX_CMD_TYPE;
3501 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3502 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3503 }
3504 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3505 cnic_ctx_wr(dev, cid_addr, offset0, val);
3506
3507 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3508 cnic_ctx_wr(dev, cid_addr, offset1, val);
3509
3510 txbd = (struct tx_bd *) cp->l2_ring;
3511
3512 buf_map = cp->l2_buf_map;
3513 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3514 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3515 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3516 }
3517 val = (u64) cp->l2_ring_map >> 32;
3518 cnic_ctx_wr(dev, cid_addr, offset2, val);
3519 txbd->tx_bd_haddr_hi = val;
3520
3521 val = (u64) cp->l2_ring_map & 0xffffffff;
3522 cnic_ctx_wr(dev, cid_addr, offset3, val);
3523 txbd->tx_bd_haddr_lo = val;
3524}
3525
3526static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3527{
3528 struct cnic_local *cp = dev->cnic_priv;
3529 struct cnic_eth_dev *ethdev = cp->ethdev;
3530 u32 cid_addr, sb_id, val, coal_reg, coal_val;
3531 int i;
3532 struct rx_bd *rxbd;
3533 struct status_block *s_blk = cp->status_blk;
3534
3535 sb_id = cp->status_blk_num;
3536 cnic_init_context(dev, 2);
3537 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3538 coal_reg = BNX2_HC_COMMAND;
3539 coal_val = CNIC_RD(dev, coal_reg);
3540 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3541 struct status_block_msix *sblk = cp->status_blk;
3542
3543 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3544 coal_reg = BNX2_HC_COALESCE_NOW;
3545 coal_val = 1 << (11 + sb_id);
3546 }
3547 i = 0;
3548 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3549 CNIC_WR(dev, coal_reg, coal_val);
3550 udelay(10);
3551 i++;
3552 barrier();
3553 }
3554 cp->rx_cons = *cp->rx_cons_ptr;
3555
3556 cid_addr = GET_CID_ADDR(2);
3557 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3558 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3559 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3560
3561 if (sb_id == 0)
3562 val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
3563 else
3564 val = BNX2_L2CTX_STATUSB_NUM(sb_id);
3565 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3566
3567 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
3568 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3569 dma_addr_t buf_map;
3570 int n = (i % cp->l2_rx_ring_size) + 1;
3571
3572 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3573 rxbd->rx_bd_len = cp->l2_single_buf_size;
3574 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3575 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3576 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3577 }
3578 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3579 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3580 rxbd->rx_bd_haddr_hi = val;
3581
3582 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3583 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3584 rxbd->rx_bd_haddr_lo = val;
3585
3586 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3587 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3588}
3589
3590static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3591{
3592 struct kwqe *wqes[1], l2kwqe;
3593
3594 memset(&l2kwqe, 0, sizeof(l2kwqe));
3595 wqes[0] = &l2kwqe;
3596 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3597 (L2_KWQE_OPCODE_VALUE_FLUSH <<
3598 KWQE_OPCODE_SHIFT) | 2;
3599 dev->submit_kwqes(dev, wqes, 1);
3600}
3601
3602static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3603{
3604 struct cnic_local *cp = dev->cnic_priv;
3605 u32 val;
3606
3607 val = cp->func << 2;
3608
3609 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3610
3611 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3612 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3613 dev->mac_addr[0] = (u8) (val >> 8);
3614 dev->mac_addr[1] = (u8) val;
3615
3616 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3617
3618 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3619 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3620 dev->mac_addr[2] = (u8) (val >> 24);
3621 dev->mac_addr[3] = (u8) (val >> 16);
3622 dev->mac_addr[4] = (u8) (val >> 8);
3623 dev->mac_addr[5] = (u8) val;
3624
3625 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3626
3627 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3628 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3629 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3630
3631 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3632 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3633 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3634}
3635
3636static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3637{
3638 struct cnic_local *cp = dev->cnic_priv;
3639 struct cnic_eth_dev *ethdev = cp->ethdev;
3640 struct status_block *sblk = cp->status_blk;
3641 u32 val;
3642 int err;
3643
3644 cnic_set_bnx2_mac(dev);
3645
3646 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3647 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3648 if (BCM_PAGE_BITS > 12)
3649 val |= (12 - 8) << 4;
3650 else
3651 val |= (BCM_PAGE_BITS - 8) << 4;
3652
3653 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3654
3655 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3656 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3657 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3658
3659 err = cnic_setup_5709_context(dev, 1);
3660 if (err)
3661 return err;
3662
3663 cnic_init_context(dev, KWQ_CID);
3664 cnic_init_context(dev, KCQ_CID);
3665
3666 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3667 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3668
3669 cp->max_kwq_idx = MAX_KWQ_IDX;
3670 cp->kwq_prod_idx = 0;
3671 cp->kwq_con_idx = 0;
3672 cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
3673
3674 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3675 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3676 else
3677 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3678
3679 /* Initialize the kernel work queue context. */
3680 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3681 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3682 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
3683
3684 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3685 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3686
3687 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3688 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3689
3690 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3691 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3692
3693 val = (u32) cp->kwq_info.pgtbl_map;
3694 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3695
3696 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3697 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3698
3699 cp->kcq_prod_idx = 0;
3700
3701 /* Initialize the kernel complete queue context. */
3702 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3703 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3704 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
3705
3706 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3707 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3708
3709 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3710 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3711
3712 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
3713 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3714
3715 val = (u32) cp->kcq_info.pgtbl_map;
3716 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3717
3718 cp->int_num = 0;
3719 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3720 u32 sb_id = cp->status_blk_num;
3721 u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
3722
3723 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
3724 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3725 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3726 }
3727
3728 /* Enable Commnad Scheduler notification when we write to the
3729 * host producer index of the kernel contexts. */
3730 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
3731
3732 /* Enable Command Scheduler notification when we write to either
3733 * the Send Queue or Receive Queue producer indexes of the kernel
3734 * bypass contexts. */
3735 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
3736 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
3737
3738 /* Notify COM when the driver post an application buffer. */
3739 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
3740
3741 /* Set the CP and COM doorbells. These two processors polls the
3742 * doorbell for a non zero value before running. This must be done
3743 * after setting up the kernel queue contexts. */
3744 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
3745 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
3746
3747 cnic_init_bnx2_tx_ring(dev);
3748 cnic_init_bnx2_rx_ring(dev);
3749
3750 err = cnic_init_bnx2_irq(dev);
3751 if (err) {
3752 printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
3753 dev->netdev->name);
3754 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
3755 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
3756 return err;
3757 }
3758
3759 return 0;
3760}
3761
Michael Chan71034ba2009-10-10 13:46:59 +00003762static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
3763{
3764 struct cnic_local *cp = dev->cnic_priv;
3765 struct cnic_eth_dev *ethdev = cp->ethdev;
3766 u32 start_offset = ethdev->ctx_tbl_offset;
3767 int i;
3768
3769 for (i = 0; i < cp->ctx_blks; i++) {
3770 struct cnic_ctx *ctx = &cp->ctx_arr[i];
3771 dma_addr_t map = ctx->mapping;
3772
3773 if (cp->ctx_align) {
3774 unsigned long mask = cp->ctx_align - 1;
3775
3776 map = (map + mask) & ~mask;
3777 }
3778
3779 cnic_ctx_tbl_wr(dev, start_offset + i, map);
3780 }
3781}
3782
3783static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
3784{
3785 struct cnic_local *cp = dev->cnic_priv;
3786 struct cnic_eth_dev *ethdev = cp->ethdev;
3787 int err = 0;
3788
3789 tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2x_bh,
3790 (unsigned long) dev);
3791 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3792 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3793 "cnic", dev);
3794 if (err)
3795 tasklet_disable(&cp->cnic_irq_task);
3796 }
3797 return err;
3798}
3799
3800static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
3801{
3802 struct cnic_local *cp = dev->cnic_priv;
3803 u8 sb_id = cp->status_blk_num;
3804 int port = CNIC_PORT(cp);
3805
3806 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
3807 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id,
3808 HC_INDEX_C_ISCSI_EQ_CONS),
3809 64 / 12);
3810 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
3811 CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id,
3812 HC_INDEX_C_ISCSI_EQ_CONS), 0);
3813}
3814
3815static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
3816{
3817}
3818
3819static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev)
3820{
3821 struct cnic_local *cp = dev->cnic_priv;
3822 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring;
3823 struct eth_context *context;
3824 struct regpair context_addr;
3825 dma_addr_t buf_map;
3826 int func = CNIC_FUNC(cp);
3827 int port = CNIC_PORT(cp);
3828 int i;
3829 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3830 u32 val;
3831
3832 memset(txbd, 0, BCM_PAGE_SIZE);
3833
3834 buf_map = cp->l2_buf_map;
3835 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
3836 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
3837 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
3838
3839 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3840 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3841 reg_bd->addr_hi = start_bd->addr_hi;
3842 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
3843 start_bd->nbytes = cpu_to_le16(0x10);
3844 start_bd->nbd = cpu_to_le16(3);
3845 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3846 start_bd->general_data = (UNICAST_ADDRESS <<
3847 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
3848 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
3849
3850 }
3851 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr);
3852
3853 val = (u64) cp->l2_ring_map >> 32;
3854 txbd->next_bd.addr_hi = cpu_to_le32(val);
3855
3856 context->xstorm_st_context.tx_bd_page_base_hi = val;
3857
3858 val = (u64) cp->l2_ring_map & 0xffffffff;
3859 txbd->next_bd.addr_lo = cpu_to_le32(val);
3860
3861 context->xstorm_st_context.tx_bd_page_base_lo = val;
3862
3863 context->cstorm_st_context.sb_index_number =
3864 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS;
3865 context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID;
3866
3867 context->xstorm_st_context.statistics_data = (cli |
3868 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE);
3869
3870 context->xstorm_ag_context.cdu_reserved =
3871 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3872 CDU_REGION_NUMBER_XCM_AG,
3873 ETH_CONNECTION_TYPE);
3874
3875 /* reset xstorm per client statistics */
3876 val = BAR_XSTRORM_INTMEM +
3877 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3878 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
3879 CNIC_WR(dev, val + i * 4, 0);
3880
3881 cp->tx_cons_ptr =
3882 &cp->bnx2x_def_status_blk->c_def_status_block.index_values[
3883 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS];
3884}
3885
3886static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev)
3887{
3888 struct cnic_local *cp = dev->cnic_priv;
3889 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring +
3890 BCM_PAGE_SIZE);
3891 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
3892 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
3893 struct eth_context *context;
3894 struct regpair context_addr;
3895 int i;
3896 int port = CNIC_PORT(cp);
3897 int func = CNIC_FUNC(cp);
3898 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3899 u32 val;
3900 struct tstorm_eth_client_config tstorm_client = {0};
3901
3902 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
3903 dma_addr_t buf_map;
3904 int n = (i % cp->l2_rx_ring_size) + 1;
3905
3906 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3907 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3908 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3909 }
3910 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr);
3911
3912 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3913 rxbd->addr_hi = cpu_to_le32(val);
3914
3915 context->ustorm_st_context.common.bd_page_base_hi = val;
3916
3917 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3918 rxbd->addr_lo = cpu_to_le32(val);
3919
3920 context->ustorm_st_context.common.bd_page_base_lo = val;
3921
3922 context->ustorm_st_context.common.sb_index_numbers =
3923 BNX2X_ISCSI_RX_SB_INDEX_NUM;
3924 context->ustorm_st_context.common.clientId = cli;
3925 context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID;
3926 context->ustorm_st_context.common.flags =
3927 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS;
3928 context->ustorm_st_context.common.statistics_counter_id = cli;
3929 context->ustorm_st_context.common.mc_alignment_log_size = 0;
3930 context->ustorm_st_context.common.bd_buff_size =
3931 cp->l2_single_buf_size;
3932
3933 context->ustorm_ag_context.cdu_usage =
3934 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3935 CDU_REGION_NUMBER_UCM_AG,
3936 ETH_CONNECTION_TYPE);
3937
3938 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
3939 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
3940 rxcqe->addr_hi = cpu_to_le32(val);
3941
3942 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3943 USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val);
3944
3945 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3946 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val);
3947
3948 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
3949 rxcqe->addr_lo = cpu_to_le32(val);
3950
3951 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3952 USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val);
3953
3954 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3955 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val);
3956
3957 /* client tstorm info */
3958 tstorm_client.mtu = cp->l2_single_buf_size - 14;
3959 tstorm_client.config_flags =
3960 (TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE |
3961 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE);
3962 tstorm_client.statistics_counter_id = cli;
3963
3964 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
3965 TSTORM_CLIENT_CONFIG_OFFSET(port, cli),
3966 ((u32 *)&tstorm_client)[0]);
3967 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
3968 TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4,
3969 ((u32 *)&tstorm_client)[1]);
3970
3971 /* reset tstorm per client statistics */
3972 val = BAR_TSTRORM_INTMEM +
3973 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3974 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
3975 CNIC_WR(dev, val + i * 4, 0);
3976
3977 /* reset ustorm per client statistics */
3978 val = BAR_USTRORM_INTMEM +
3979 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3980 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
3981 CNIC_WR(dev, val + i * 4, 0);
3982
3983 cp->rx_cons_ptr =
3984 &cp->bnx2x_def_status_blk->u_def_status_block.index_values[
3985 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS];
3986}
3987
3988static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
3989{
3990 struct cnic_local *cp = dev->cnic_priv;
3991 u32 base, addr, val;
3992 int port = CNIC_PORT(cp);
3993
3994 dev->max_iscsi_conn = 0;
3995 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
3996 if (base < 0xa0000 || base >= 0xc0000)
3997 return;
3998
3999 val = BNX2X_SHMEM_ADDR(base,
4000 dev_info.port_hw_config[port].iscsi_mac_upper);
4001
4002 dev->mac_addr[0] = (u8) (val >> 8);
4003 dev->mac_addr[1] = (u8) val;
4004
4005 val = BNX2X_SHMEM_ADDR(base,
4006 dev_info.port_hw_config[port].iscsi_mac_lower);
4007
4008 dev->mac_addr[2] = (u8) (val >> 24);
4009 dev->mac_addr[3] = (u8) (val >> 16);
4010 dev->mac_addr[4] = (u8) (val >> 8);
4011 dev->mac_addr[5] = (u8) val;
4012
4013 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4014 val = CNIC_RD(dev, addr);
4015
4016 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4017 u16 val16;
4018
4019 addr = BNX2X_SHMEM_ADDR(base,
4020 drv_lic_key[port].max_iscsi_init_conn);
4021 val16 = CNIC_RD16(dev, addr);
4022
4023 if (val16)
4024 val16 ^= 0x1e1e;
4025 dev->max_iscsi_conn = val16;
4026 }
4027 if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
4028 int func = CNIC_FUNC(cp);
4029
4030 addr = BNX2X_SHMEM_ADDR(base,
4031 mf_cfg.func_mf_config[func].e1hov_tag);
4032 val = CNIC_RD(dev, addr);
4033 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4034 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4035 addr = BNX2X_SHMEM_ADDR(base,
4036 mf_cfg.func_mf_config[func].config);
4037 val = CNIC_RD(dev, addr);
4038 val &= FUNC_MF_CFG_PROTOCOL_MASK;
4039 if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4040 dev->max_iscsi_conn = 0;
4041 }
4042 }
4043}
4044
4045static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4046{
4047 struct cnic_local *cp = dev->cnic_priv;
4048 int func = CNIC_FUNC(cp), ret, i;
4049 int port = CNIC_PORT(cp);
4050 u16 eq_idx;
4051 u8 sb_id = cp->status_blk_num;
4052
4053 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4054 BNX2X_ISCSI_START_CID);
4055
4056 if (ret)
4057 return -ENOMEM;
4058
4059 cp->kcq_io_addr = BAR_CSTRORM_INTMEM +
4060 CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0);
4061 cp->kcq_prod_idx = 0;
4062
4063 cnic_get_bnx2x_iscsi_info(dev);
4064
4065 /* Only 1 EQ */
4066 CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX);
4067 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4068 CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0);
4069 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4070 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0),
4071 cp->kcq_info.pg_map_arr[1] & 0xffffffff);
4072 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4073 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4,
4074 (u64) cp->kcq_info.pg_map_arr[1] >> 32);
4075 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4076 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0),
4077 cp->kcq_info.pg_map_arr[0] & 0xffffffff);
4078 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4079 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4,
4080 (u64) cp->kcq_info.pg_map_arr[0] >> 32);
4081 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4082 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1);
4083 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4084 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num);
4085 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4086 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0),
4087 HC_INDEX_C_ISCSI_EQ_CONS);
4088
4089 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4090 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4091 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i),
4092 cp->conn_buf_info.pgtbl[2 * i]);
4093 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4094 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4,
4095 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4096 }
4097
4098 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4099 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func),
4100 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4101 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4102 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4,
4103 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4104
4105 cnic_setup_bnx2x_context(dev);
4106
4107 eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM +
4108 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4109 offsetof(struct cstorm_status_block_c,
4110 index_values[HC_INDEX_C_ISCSI_EQ_CONS]));
4111 if (eq_idx != 0) {
4112 printk(KERN_ERR PFX "%s: EQ cons index %x != 0\n",
4113 dev->netdev->name, eq_idx);
4114 return -EBUSY;
4115 }
4116 ret = cnic_init_bnx2x_irq(dev);
4117 if (ret)
4118 return ret;
4119
4120 cnic_init_bnx2x_tx_ring(dev);
4121 cnic_init_bnx2x_rx_ring(dev);
4122
4123 return 0;
4124}
4125
Michael Chan86b53602009-10-10 13:46:57 +00004126static void cnic_init_rings(struct cnic_dev *dev)
4127{
4128 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4129 cnic_init_bnx2_tx_ring(dev);
4130 cnic_init_bnx2_rx_ring(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00004131 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4132 struct cnic_local *cp = dev->cnic_priv;
4133 struct cnic_eth_dev *ethdev = cp->ethdev;
4134 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4135 union l5cm_specific_data l5_data;
4136 struct ustorm_eth_rx_producers rx_prods = {0};
4137 void __iomem *doorbell;
4138 int i;
4139
4140 rx_prods.bd_prod = 0;
4141 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4142 barrier();
4143
4144 doorbell = ethdev->io_base2 + BAR_USTRORM_INTMEM +
4145 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli);
4146
4147 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
4148 writel(((u32 *) &rx_prods)[i], doorbell + i * 4);
4149
4150 cnic_init_bnx2x_tx_ring(dev);
4151 cnic_init_bnx2x_rx_ring(dev);
4152
4153 l5_data.phy_address.lo = cli;
4154 l5_data.phy_address.hi = 0;
4155 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4156 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4157 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
Michael Chan86b53602009-10-10 13:46:57 +00004158 }
4159}
4160
4161static void cnic_shutdown_rings(struct cnic_dev *dev)
4162{
4163 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4164 cnic_shutdown_bnx2_rx_ring(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00004165 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4166 struct cnic_local *cp = dev->cnic_priv;
4167 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4168
4169 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
Michael Chan86b53602009-10-10 13:46:57 +00004170 }
4171}
4172
Michael Chana3059b12009-08-14 15:49:44 +00004173static int cnic_register_netdev(struct cnic_dev *dev)
4174{
4175 struct cnic_local *cp = dev->cnic_priv;
4176 struct cnic_eth_dev *ethdev = cp->ethdev;
4177 int err;
4178
4179 if (!ethdev)
4180 return -ENODEV;
4181
4182 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4183 return 0;
4184
4185 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
4186 if (err)
4187 printk(KERN_ERR PFX "%s: register_cnic failed\n",
4188 dev->netdev->name);
4189
4190 return err;
4191}
4192
4193static void cnic_unregister_netdev(struct cnic_dev *dev)
4194{
4195 struct cnic_local *cp = dev->cnic_priv;
4196 struct cnic_eth_dev *ethdev = cp->ethdev;
4197
4198 if (!ethdev)
4199 return;
4200
4201 ethdev->drv_unregister_cnic(dev->netdev);
4202}
4203
Michael Chana4636962009-06-08 18:14:43 -07004204static int cnic_start_hw(struct cnic_dev *dev)
4205{
4206 struct cnic_local *cp = dev->cnic_priv;
4207 struct cnic_eth_dev *ethdev = cp->ethdev;
4208 int err;
4209
4210 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4211 return -EALREADY;
4212
Michael Chana4636962009-06-08 18:14:43 -07004213 dev->regview = ethdev->io_base;
4214 cp->chip_id = ethdev->chip_id;
4215 pci_dev_get(dev->pcidev);
4216 cp->func = PCI_FUNC(dev->pcidev->devfn);
4217 cp->status_blk = ethdev->irq_arr[0].status_blk;
4218 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4219
4220 err = cp->alloc_resc(dev);
4221 if (err) {
4222 printk(KERN_ERR PFX "%s: allocate resource failure\n",
4223 dev->netdev->name);
4224 goto err1;
4225 }
4226
4227 err = cp->start_hw(dev);
4228 if (err)
4229 goto err1;
4230
4231 err = cnic_cm_open(dev);
4232 if (err)
4233 goto err1;
4234
4235 set_bit(CNIC_F_CNIC_UP, &dev->flags);
4236
4237 cp->enable_int(dev);
4238
4239 return 0;
4240
4241err1:
Michael Chana4636962009-06-08 18:14:43 -07004242 cp->free_resc(dev);
4243 pci_dev_put(dev->pcidev);
Michael Chana4636962009-06-08 18:14:43 -07004244 return err;
4245}
4246
4247static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4248{
Michael Chana4636962009-06-08 18:14:43 -07004249 cnic_disable_bnx2_int_sync(dev);
4250
4251 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4252 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4253
4254 cnic_init_context(dev, KWQ_CID);
4255 cnic_init_context(dev, KCQ_CID);
4256
4257 cnic_setup_5709_context(dev, 0);
4258 cnic_free_irq(dev);
4259
Michael Chana4636962009-06-08 18:14:43 -07004260 cnic_free_resc(dev);
4261}
4262
Michael Chan71034ba2009-10-10 13:46:59 +00004263
4264static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4265{
4266 struct cnic_local *cp = dev->cnic_priv;
4267 u8 sb_id = cp->status_blk_num;
4268 int port = CNIC_PORT(cp);
4269
4270 cnic_free_irq(dev);
4271 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4272 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4273 offsetof(struct cstorm_status_block_c,
4274 index_values[HC_INDEX_C_ISCSI_EQ_CONS]),
4275 0);
4276 cnic_free_resc(dev);
4277}
4278
Michael Chana4636962009-06-08 18:14:43 -07004279static void cnic_stop_hw(struct cnic_dev *dev)
4280{
4281 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4282 struct cnic_local *cp = dev->cnic_priv;
4283
4284 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4285 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4286 synchronize_rcu();
4287 cnic_cm_shutdown(dev);
4288 cp->stop_hw(dev);
4289 pci_dev_put(dev->pcidev);
4290 }
4291}
4292
4293static void cnic_free_dev(struct cnic_dev *dev)
4294{
4295 int i = 0;
4296
4297 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4298 msleep(100);
4299 i++;
4300 }
4301 if (atomic_read(&dev->ref_count) != 0)
4302 printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
4303 " to zero.\n", dev->netdev->name);
4304
4305 printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
4306 dev_put(dev->netdev);
4307 kfree(dev);
4308}
4309
4310static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4311 struct pci_dev *pdev)
4312{
4313 struct cnic_dev *cdev;
4314 struct cnic_local *cp;
4315 int alloc_size;
4316
4317 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4318
4319 cdev = kzalloc(alloc_size , GFP_KERNEL);
4320 if (cdev == NULL) {
4321 printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
4322 dev->name);
4323 return NULL;
4324 }
4325
4326 cdev->netdev = dev;
4327 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4328 cdev->register_device = cnic_register_device;
4329 cdev->unregister_device = cnic_unregister_device;
4330 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4331
4332 cp = cdev->cnic_priv;
4333 cp->dev = cdev;
4334 cp->uio_dev = -1;
4335 cp->l2_single_buf_size = 0x400;
4336 cp->l2_rx_ring_size = 3;
4337
4338 spin_lock_init(&cp->cnic_ulp_lock);
4339
4340 printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
4341
4342 return cdev;
4343}
4344
4345static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4346{
4347 struct pci_dev *pdev;
4348 struct cnic_dev *cdev;
4349 struct cnic_local *cp;
4350 struct cnic_eth_dev *ethdev = NULL;
Michael Chane2ee3612009-06-13 17:43:02 -07004351 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
Michael Chana4636962009-06-08 18:14:43 -07004352
Michael Chane2ee3612009-06-13 17:43:02 -07004353 probe = symbol_get(bnx2_cnic_probe);
Michael Chana4636962009-06-08 18:14:43 -07004354 if (probe) {
4355 ethdev = (*probe)(dev);
Michael Chan64c64602009-08-14 15:49:43 +00004356 symbol_put(bnx2_cnic_probe);
Michael Chana4636962009-06-08 18:14:43 -07004357 }
4358 if (!ethdev)
4359 return NULL;
4360
4361 pdev = ethdev->pdev;
4362 if (!pdev)
4363 return NULL;
4364
4365 dev_hold(dev);
4366 pci_dev_get(pdev);
4367 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4368 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4369 u8 rev;
4370
4371 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4372 if (rev < 0x10) {
4373 pci_dev_put(pdev);
4374 goto cnic_err;
4375 }
4376 }
4377 pci_dev_put(pdev);
4378
4379 cdev = cnic_alloc_dev(dev, pdev);
4380 if (cdev == NULL)
4381 goto cnic_err;
4382
4383 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4384 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4385
4386 cp = cdev->cnic_priv;
4387 cp->ethdev = ethdev;
4388 cdev->pcidev = pdev;
4389
4390 cp->cnic_ops = &cnic_bnx2_ops;
4391 cp->start_hw = cnic_start_bnx2_hw;
4392 cp->stop_hw = cnic_stop_bnx2_hw;
4393 cp->setup_pgtbl = cnic_setup_page_tbl;
4394 cp->alloc_resc = cnic_alloc_bnx2_resc;
4395 cp->free_resc = cnic_free_resc;
4396 cp->start_cm = cnic_cm_init_bnx2_hw;
4397 cp->stop_cm = cnic_cm_stop_bnx2_hw;
4398 cp->enable_int = cnic_enable_bnx2_int;
4399 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4400 cp->close_conn = cnic_close_bnx2_conn;
4401 cp->next_idx = cnic_bnx2_next_idx;
4402 cp->hw_idx = cnic_bnx2_hw_idx;
4403 return cdev;
4404
4405cnic_err:
4406 dev_put(dev);
4407 return NULL;
4408}
4409
Michael Chan71034ba2009-10-10 13:46:59 +00004410static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4411{
4412 struct pci_dev *pdev;
4413 struct cnic_dev *cdev;
4414 struct cnic_local *cp;
4415 struct cnic_eth_dev *ethdev = NULL;
4416 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4417
4418 probe = symbol_get(bnx2x_cnic_probe);
4419 if (probe) {
4420 ethdev = (*probe)(dev);
4421 symbol_put(bnx2x_cnic_probe);
4422 }
4423 if (!ethdev)
4424 return NULL;
4425
4426 pdev = ethdev->pdev;
4427 if (!pdev)
4428 return NULL;
4429
4430 dev_hold(dev);
4431 cdev = cnic_alloc_dev(dev, pdev);
4432 if (cdev == NULL) {
4433 dev_put(dev);
4434 return NULL;
4435 }
4436
4437 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4438 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4439
4440 cp = cdev->cnic_priv;
4441 cp->ethdev = ethdev;
4442 cdev->pcidev = pdev;
4443
4444 cp->cnic_ops = &cnic_bnx2x_ops;
4445 cp->start_hw = cnic_start_bnx2x_hw;
4446 cp->stop_hw = cnic_stop_bnx2x_hw;
4447 cp->setup_pgtbl = cnic_setup_page_tbl_le;
4448 cp->alloc_resc = cnic_alloc_bnx2x_resc;
4449 cp->free_resc = cnic_free_resc;
4450 cp->start_cm = cnic_cm_init_bnx2x_hw;
4451 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4452 cp->enable_int = cnic_enable_bnx2x_int;
4453 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4454 cp->ack_int = cnic_ack_bnx2x_msix;
4455 cp->close_conn = cnic_close_bnx2x_conn;
4456 cp->next_idx = cnic_bnx2x_next_idx;
4457 cp->hw_idx = cnic_bnx2x_hw_idx;
4458 return cdev;
4459}
4460
Michael Chana4636962009-06-08 18:14:43 -07004461static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4462{
4463 struct ethtool_drvinfo drvinfo;
4464 struct cnic_dev *cdev = NULL;
4465
4466 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4467 memset(&drvinfo, 0, sizeof(drvinfo));
4468 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4469
4470 if (!strcmp(drvinfo.driver, "bnx2"))
4471 cdev = init_bnx2_cnic(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00004472 if (!strcmp(drvinfo.driver, "bnx2x"))
4473 cdev = init_bnx2x_cnic(dev);
Michael Chana4636962009-06-08 18:14:43 -07004474 if (cdev) {
4475 write_lock(&cnic_dev_lock);
4476 list_add(&cdev->list, &cnic_dev_list);
4477 write_unlock(&cnic_dev_lock);
4478 }
4479 }
4480 return cdev;
4481}
4482
4483/**
4484 * netdev event handler
4485 */
4486static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4487 void *ptr)
4488{
4489 struct net_device *netdev = ptr;
4490 struct cnic_dev *dev;
4491 int if_type;
4492 int new_dev = 0;
4493
4494 dev = cnic_from_netdev(netdev);
4495
4496 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4497 /* Check for the hot-plug device */
4498 dev = is_cnic_dev(netdev);
4499 if (dev) {
4500 new_dev = 1;
4501 cnic_hold(dev);
4502 }
4503 }
4504 if (dev) {
4505 struct cnic_local *cp = dev->cnic_priv;
4506
4507 if (new_dev)
4508 cnic_ulp_init(dev);
4509 else if (event == NETDEV_UNREGISTER)
4510 cnic_ulp_exit(dev);
Michael Chan6053bbf2009-10-02 11:03:28 -07004511
4512 if (event == NETDEV_UP) {
Michael Chana3059b12009-08-14 15:49:44 +00004513 if (cnic_register_netdev(dev) != 0) {
4514 cnic_put(dev);
4515 goto done;
4516 }
Michael Chana4636962009-06-08 18:14:43 -07004517 if (!cnic_start_hw(dev))
4518 cnic_ulp_start(dev);
Michael Chana4636962009-06-08 18:14:43 -07004519 }
4520
4521 rcu_read_lock();
4522 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4523 struct cnic_ulp_ops *ulp_ops;
4524 void *ctx;
4525
4526 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4527 if (!ulp_ops || !ulp_ops->indicate_netevent)
4528 continue;
4529
4530 ctx = cp->ulp_handle[if_type];
4531
4532 ulp_ops->indicate_netevent(ctx, event);
4533 }
4534 rcu_read_unlock();
4535
4536 if (event == NETDEV_GOING_DOWN) {
Michael Chana4636962009-06-08 18:14:43 -07004537 cnic_ulp_stop(dev);
4538 cnic_stop_hw(dev);
Michael Chana3059b12009-08-14 15:49:44 +00004539 cnic_unregister_netdev(dev);
Michael Chana4636962009-06-08 18:14:43 -07004540 } else if (event == NETDEV_UNREGISTER) {
4541 write_lock(&cnic_dev_lock);
4542 list_del_init(&dev->list);
4543 write_unlock(&cnic_dev_lock);
4544
4545 cnic_put(dev);
4546 cnic_free_dev(dev);
4547 goto done;
4548 }
4549 cnic_put(dev);
4550 }
4551done:
4552 return NOTIFY_DONE;
4553}
4554
4555static struct notifier_block cnic_netdev_notifier = {
4556 .notifier_call = cnic_netdev_event
4557};
4558
4559static void cnic_release(void)
4560{
4561 struct cnic_dev *dev;
4562
4563 while (!list_empty(&cnic_dev_list)) {
4564 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4565 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4566 cnic_ulp_stop(dev);
4567 cnic_stop_hw(dev);
4568 }
4569
4570 cnic_ulp_exit(dev);
Michael Chana3059b12009-08-14 15:49:44 +00004571 cnic_unregister_netdev(dev);
Michael Chana4636962009-06-08 18:14:43 -07004572 list_del_init(&dev->list);
4573 cnic_free_dev(dev);
4574 }
4575}
4576
4577static int __init cnic_init(void)
4578{
4579 int rc = 0;
4580
4581 printk(KERN_INFO "%s", version);
4582
4583 rc = register_netdevice_notifier(&cnic_netdev_notifier);
4584 if (rc) {
4585 cnic_release();
4586 return rc;
4587 }
4588
4589 return 0;
4590}
4591
4592static void __exit cnic_exit(void)
4593{
4594 unregister_netdevice_notifier(&cnic_netdev_notifier);
4595 cnic_release();
4596 return;
4597}
4598
4599module_init(cnic_init);
4600module_exit(cnic_exit);