H. Peter Anvin | 05e4d31 | 2008-10-23 00:01:39 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_XEN_INTERFACE_64_H |
| 2 | #define _ASM_X86_XEN_INTERFACE_64_H |
Jeremy Fitzhardinge | 48b5db2 | 2008-07-08 15:06:34 -0700 | [diff] [blame] | 3 | |
| 4 | /* |
| 5 | * 64-bit segment selectors |
| 6 | * These flat segments are in the Xen-private section of every GDT. Since these |
| 7 | * are also present in the initial GDT, many OSes will be able to avoid |
| 8 | * installing their own GDT. |
| 9 | */ |
| 10 | |
| 11 | #define FLAT_RING3_CS32 0xe023 /* GDT index 260 */ |
| 12 | #define FLAT_RING3_CS64 0xe033 /* GDT index 261 */ |
| 13 | #define FLAT_RING3_DS32 0xe02b /* GDT index 262 */ |
| 14 | #define FLAT_RING3_DS64 0x0000 /* NULL selector */ |
| 15 | #define FLAT_RING3_SS32 0xe02b /* GDT index 262 */ |
| 16 | #define FLAT_RING3_SS64 0xe02b /* GDT index 262 */ |
| 17 | |
| 18 | #define FLAT_KERNEL_DS64 FLAT_RING3_DS64 |
| 19 | #define FLAT_KERNEL_DS32 FLAT_RING3_DS32 |
| 20 | #define FLAT_KERNEL_DS FLAT_KERNEL_DS64 |
| 21 | #define FLAT_KERNEL_CS64 FLAT_RING3_CS64 |
| 22 | #define FLAT_KERNEL_CS32 FLAT_RING3_CS32 |
| 23 | #define FLAT_KERNEL_CS FLAT_KERNEL_CS64 |
| 24 | #define FLAT_KERNEL_SS64 FLAT_RING3_SS64 |
| 25 | #define FLAT_KERNEL_SS32 FLAT_RING3_SS32 |
| 26 | #define FLAT_KERNEL_SS FLAT_KERNEL_SS64 |
| 27 | |
| 28 | #define FLAT_USER_DS64 FLAT_RING3_DS64 |
| 29 | #define FLAT_USER_DS32 FLAT_RING3_DS32 |
| 30 | #define FLAT_USER_DS FLAT_USER_DS64 |
| 31 | #define FLAT_USER_CS64 FLAT_RING3_CS64 |
| 32 | #define FLAT_USER_CS32 FLAT_RING3_CS32 |
| 33 | #define FLAT_USER_CS FLAT_USER_CS64 |
| 34 | #define FLAT_USER_SS64 FLAT_RING3_SS64 |
| 35 | #define FLAT_USER_SS32 FLAT_RING3_SS32 |
| 36 | #define FLAT_USER_SS FLAT_USER_SS64 |
| 37 | |
| 38 | #define __HYPERVISOR_VIRT_START 0xFFFF800000000000 |
| 39 | #define __HYPERVISOR_VIRT_END 0xFFFF880000000000 |
| 40 | #define __MACH2PHYS_VIRT_START 0xFFFF800000000000 |
| 41 | #define __MACH2PHYS_VIRT_END 0xFFFF804000000000 |
Ian Campbell | 7e77506 | 2010-09-30 12:37:26 +0100 | [diff] [blame] | 42 | #define __MACH2PHYS_SHIFT 3 |
Jeremy Fitzhardinge | 48b5db2 | 2008-07-08 15:06:34 -0700 | [diff] [blame] | 43 | |
| 44 | /* |
| 45 | * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) |
| 46 | * @which == SEGBASE_* ; @base == 64-bit base address |
| 47 | * Returns 0 on success. |
| 48 | */ |
| 49 | #define SEGBASE_FS 0 |
| 50 | #define SEGBASE_GS_USER 1 |
| 51 | #define SEGBASE_GS_KERNEL 2 |
| 52 | #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */ |
| 53 | |
| 54 | /* |
| 55 | * int HYPERVISOR_iret(void) |
| 56 | * All arguments are on the kernel stack, in the following format. |
| 57 | * Never returns if successful. Current kernel context is lost. |
| 58 | * The saved CS is mapped as follows: |
| 59 | * RING0 -> RING3 kernel mode. |
| 60 | * RING1 -> RING3 kernel mode. |
| 61 | * RING2 -> RING3 kernel mode. |
| 62 | * RING3 -> RING3 user mode. |
| 63 | * However RING0 indicates that the guest kernel should return to iteself |
| 64 | * directly with |
| 65 | * orb $3,1*8(%rsp) |
| 66 | * iretq |
| 67 | * If flags contains VGCF_in_syscall: |
| 68 | * Restore RAX, RIP, RFLAGS, RSP. |
| 69 | * Discard R11, RCX, CS, SS. |
| 70 | * Otherwise: |
| 71 | * Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP. |
| 72 | * All other registers are saved on hypercall entry and restored to user. |
| 73 | */ |
| 74 | /* Guest exited in SYSCALL context? Return to guest with SYSRET? */ |
| 75 | #define _VGCF_in_syscall 8 |
| 76 | #define VGCF_in_syscall (1<<_VGCF_in_syscall) |
| 77 | #define VGCF_IN_SYSCALL VGCF_in_syscall |
| 78 | |
| 79 | #ifndef __ASSEMBLY__ |
| 80 | |
| 81 | struct iret_context { |
| 82 | /* Top of stack (%rsp at point of hypercall). */ |
| 83 | uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss; |
| 84 | /* Bottom of iret stack frame. */ |
| 85 | }; |
| 86 | |
| 87 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) |
| 88 | /* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */ |
| 89 | #define __DECL_REG(name) union { \ |
| 90 | uint64_t r ## name, e ## name; \ |
| 91 | uint32_t _e ## name; \ |
| 92 | } |
| 93 | #else |
| 94 | /* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */ |
| 95 | #define __DECL_REG(name) uint64_t r ## name |
| 96 | #endif |
| 97 | |
| 98 | struct cpu_user_regs { |
| 99 | uint64_t r15; |
| 100 | uint64_t r14; |
| 101 | uint64_t r13; |
| 102 | uint64_t r12; |
| 103 | __DECL_REG(bp); |
| 104 | __DECL_REG(bx); |
| 105 | uint64_t r11; |
| 106 | uint64_t r10; |
| 107 | uint64_t r9; |
| 108 | uint64_t r8; |
| 109 | __DECL_REG(ax); |
| 110 | __DECL_REG(cx); |
| 111 | __DECL_REG(dx); |
| 112 | __DECL_REG(si); |
| 113 | __DECL_REG(di); |
| 114 | uint32_t error_code; /* private */ |
| 115 | uint32_t entry_vector; /* private */ |
| 116 | __DECL_REG(ip); |
| 117 | uint16_t cs, _pad0[1]; |
| 118 | uint8_t saved_upcall_mask; |
| 119 | uint8_t _pad1[3]; |
| 120 | __DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */ |
| 121 | __DECL_REG(sp); |
| 122 | uint16_t ss, _pad2[3]; |
| 123 | uint16_t es, _pad3[3]; |
| 124 | uint16_t ds, _pad4[3]; |
| 125 | uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */ |
| 126 | uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */ |
| 127 | }; |
| 128 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); |
| 129 | |
| 130 | #undef __DECL_REG |
| 131 | |
| 132 | #define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12) |
| 133 | #define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12) |
| 134 | |
| 135 | struct arch_vcpu_info { |
| 136 | unsigned long cr2; |
| 137 | unsigned long pad; /* sizeof(vcpu_info_t) == 64 */ |
| 138 | }; |
| 139 | |
| 140 | typedef unsigned long xen_callback_t; |
| 141 | |
| 142 | #define XEN_CALLBACK(__cs, __rip) \ |
| 143 | ((unsigned long)(__rip)) |
| 144 | |
| 145 | #endif /* !__ASSEMBLY__ */ |
| 146 | |
| 147 | |
H. Peter Anvin | 05e4d31 | 2008-10-23 00:01:39 -0700 | [diff] [blame] | 148 | #endif /* _ASM_X86_XEN_INTERFACE_64_H */ |