| Steven Miao | 93f8951 | 2012-05-16 18:26:10 +0800 | [diff] [blame] | 1 | #include <linux/linkage.h> |
| 2 | #include <asm/blackfin.h> |
| 3 | #include <asm/dpmc.h> |
| 4 | |
| 5 | #define PM_STACK (COREA_L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) |
| 6 | |
| 7 | .section .l1.text |
| 8 | ENTRY(_enter_hibernate) |
| 9 | /* switch stack to L1 scratch, prepare for ddr srfr */ |
| 10 | P0.H = HI(PM_STACK); |
| 11 | P0.L = LO(PM_STACK); |
| 12 | SP = P0; |
| 13 | |
| 14 | call _bf609_ddr_sr; |
| 15 | call _bfin_hibernate_syscontrol; |
| 16 | |
| 17 | P0.H = HI(DPM0_RESTORE4); |
| 18 | P0.L = LO(DPM0_RESTORE4); |
| 19 | P1.H = _bf609_pm_data; |
| 20 | P1.L = _bf609_pm_data; |
| 21 | [P0] = P1; |
| 22 | |
| 23 | P0.H = HI(DPM0_CTL); |
| 24 | P0.L = LO(DPM0_CTL); |
| 25 | R3.H = HI(0x00000010); |
| 26 | R3.L = LO(0x00000010); |
| Sonic Zhang | 72b099e | 2012-05-17 17:33:00 +0800 | [diff] [blame^] | 27 | |
| 28 | bfin_init_pm_bench_cycles; |
| 29 | |
| Steven Miao | 93f8951 | 2012-05-16 18:26:10 +0800 | [diff] [blame] | 30 | [P0] = R3; |
| 31 | |
| 32 | SSYNC; |
| 33 | ENDPROC(_enter_hibernate_mode) |
| 34 | |
| 35 | .section .text |
| 36 | ENTRY(_bf609_hibernate) |
| 37 | bfin_cpu_reg_save; |
| 38 | bfin_core_mmr_save; |
| 39 | |
| 40 | P0.H = _bf609_pm_data; |
| 41 | P0.L = _bf609_pm_data; |
| 42 | R1.H = 0xDEAD; |
| 43 | R1.L = 0xBEEF; |
| 44 | R2.H = .Lpm_resume_here; |
| 45 | R2.L = .Lpm_resume_here; |
| 46 | [P0++] = R1; |
| 47 | [P0++] = R2; |
| 48 | [P0++] = SP; |
| 49 | |
| 50 | P1.H = _enter_hibernate; |
| 51 | P1.L = _enter_hibernate; |
| 52 | |
| 53 | call (P1); |
| 54 | .Lpm_resume_here: |
| 55 | |
| 56 | bfin_core_mmr_restore; |
| 57 | bfin_cpu_reg_restore; |
| 58 | |
| 59 | [--sp] = RETI; /* Clear Global Interrupt Disable */ |
| 60 | SP += 4; |
| 61 | |
| 62 | RTS; |
| 63 | |
| 64 | ENDPROC(_bf609_hibernate) |
| 65 | |