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Mark A. Greer85937902009-06-03 18:41:53 -07001/*
2 * TI DA830/OMAP L137 EVM board
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6 *
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/kernel.h>
Mark A. Greer85937902009-06-03 18:41:53 -070013#include <linux/init.h>
14#include <linux/console.h>
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +040015#include <linux/interrupt.h>
Steve Chen13e1f042009-09-15 18:15:06 -070016#include <linux/gpio.h>
David A. Griego733975a2009-09-18 14:15:18 -070017#include <linux/platform_device.h>
Mark A. Greer85937902009-06-03 18:41:53 -070018#include <linux/i2c.h>
Steve Chen13e1f042009-09-15 18:15:06 -070019#include <linux/i2c/pcf857x.h>
Mark A. Greer85937902009-06-03 18:41:53 -070020#include <linux/i2c/at24.h>
David A. Griego733975a2009-09-18 14:15:18 -070021#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h>
Mark A. Greer85937902009-06-03 18:41:53 -070023
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26
Mark A. Greer85937902009-06-03 18:41:53 -070027#include <mach/cp_intc.h>
Mark A. Greer32bf0782009-08-28 15:05:21 -070028#include <mach/mux.h>
David A. Griego733975a2009-09-18 14:15:18 -070029#include <mach/nand.h>
Mark A. Greer85937902009-06-03 18:41:53 -070030#include <mach/da8xx.h>
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +040031#include <mach/usb.h>
Mark A. Greer85937902009-06-03 18:41:53 -070032
33#define DA830_EVM_PHY_MASK 0x0
34#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
35
David A. Griego733975a2009-09-18 14:15:18 -070036#define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
37#define DA830_EMIF25_CONTROL_BASE 0x68000000
38
Mark A. Greer85937902009-06-03 18:41:53 -070039static struct at24_platform_data da830_evm_i2c_eeprom_info = {
40 .byte_len = SZ_256K / 8,
41 .page_size = 64,
42 .flags = AT24_FLAG_ADDR16,
43 .setup = davinci_get_mac_addr,
44 .context = (void *)0x7f00,
45};
46
Steve Chen13e1f042009-09-15 18:15:06 -070047static int da830_evm_ui_expander_setup(struct i2c_client *client, int gpio,
48 unsigned ngpio, void *context)
49{
50 gpio_request(gpio + 6, "MUX_MODE");
51#ifdef CONFIG_DA830_UI_LCD
52 gpio_direction_output(gpio + 6, 0);
53#else /* Must be NAND or NOR */
54 gpio_direction_output(gpio + 6, 1);
55#endif
56 return 0;
57}
58
59static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
60 unsigned ngpio, void *context)
61{
62 gpio_free(gpio + 6);
63 return 0;
64}
65
66static struct pcf857x_platform_data da830_evm_ui_expander_info = {
67 .gpio_base = DAVINCI_N_GPIO,
68 .setup = da830_evm_ui_expander_setup,
69 .teardown = da830_evm_ui_expander_teardown,
70};
71
Mark A. Greer85937902009-06-03 18:41:53 -070072static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
73 {
74 I2C_BOARD_INFO("24c256", 0x50),
75 .platform_data = &da830_evm_i2c_eeprom_info,
76 },
Chaithrika U S1a7ff8f2009-08-25 15:20:05 +030077 {
78 I2C_BOARD_INFO("tlv320aic3x", 0x18),
Steve Chen13e1f042009-09-15 18:15:06 -070079 },
80 {
81 I2C_BOARD_INFO("pcf8574", 0x3f),
82 .platform_data = &da830_evm_ui_expander_info,
83 },
Mark A. Greer85937902009-06-03 18:41:53 -070084};
85
86static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
87 .bus_freq = 100, /* kHz */
88 .bus_delay = 0, /* usec */
89};
90
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +040091/*
92 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
93 */
94#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
95#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
96
97static const short da830_evm_usb11_pins[] = {
98 DA830_GPIO1_15, DA830_GPIO2_4,
99 -1
100};
101
102static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
103
104static int da830_evm_usb_set_power(unsigned port, int on)
105{
106 gpio_set_value(ON_BD_USB_DRV, on);
107 return 0;
108}
109
110static int da830_evm_usb_get_power(unsigned port)
111{
112 return gpio_get_value(ON_BD_USB_DRV);
113}
114
115static int da830_evm_usb_get_oci(unsigned port)
116{
117 return !gpio_get_value(ON_BD_USB_OVC);
118}
119
120static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
121
122static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
123{
124 int irq = gpio_to_irq(ON_BD_USB_OVC);
125 int error = 0;
126
127 if (handler != NULL) {
128 da830_evm_usb_ocic_handler = handler;
129
130 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
131 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
132 "OHCI over-current indicator", NULL);
133 if (error)
134 printk(KERN_ERR "%s: could not request IRQ to watch "
135 "over-current indicator changes\n", __func__);
136 } else
137 free_irq(irq, NULL);
138
139 return error;
140}
141
142static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
143 .set_power = da830_evm_usb_set_power,
144 .get_power = da830_evm_usb_get_power,
145 .get_oci = da830_evm_usb_get_oci,
146 .ocic_notify = da830_evm_usb_ocic_notify,
147
148 /* TPS2065 switch @ 5V */
149 .potpgt = (3 + 1) / 2, /* 3 ms max */
150};
151
152static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
153{
154 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
155 return IRQ_HANDLED;
156}
157
158static __init void da830_evm_usb_init(void)
159{
160 u32 cfgchip2;
161 int ret;
162
163 /*
164 * Set up USB clock/mode in the CFGCHIP2 register.
165 * FYI: CFGCHIP2 is 0x0000ef00 initially.
166 */
167 cfgchip2 = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
168
169 /* USB2.0 PHY reference clock is 24 MHz */
170 cfgchip2 &= ~CFGCHIP2_REFFREQ;
171 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
172
173 /*
174 * Select internal reference clock for USB 2.0 PHY
175 * and use it as a clock source for USB 1.1 PHY
176 * (this is the default setting anyway).
177 */
178 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
179 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
180
Sergei Shtylyovca6a2722009-10-30 23:52:04 +0400181 /*
182 * We have to override VBUS/ID signals when MUSB is configured into the
183 * host-only mode -- ID pin will float if no cable is connected, so the
184 * controller won't be able to drive VBUS thinking that it's a B-device.
185 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
186 */
187 cfgchip2 &= ~CFGCHIP2_OTGMODE;
188#ifdef CONFIG_USB_MUSB_HOST
189 cfgchip2 |= CFGCHIP2_FORCE_HOST;
190#else
191 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
192#endif
193
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400194 __raw_writel(cfgchip2, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
195
Sergei Shtylyovca6a2722009-10-30 23:52:04 +0400196 /* USB_REFCLKIN is not used. */
197 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
198 if (ret)
199 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
200 __func__, ret);
201 else {
202 /*
203 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
204 * with the power on to power good time of 3 ms.
205 */
206 ret = da8xx_register_usb20(1000, 3);
207 if (ret)
208 pr_warning("%s: USB 2.0 registration failed: %d\n",
209 __func__, ret);
210 }
211
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400212 ret = da8xx_pinmux_setup(da830_evm_usb11_pins);
213 if (ret) {
214 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
215 __func__, ret);
216 return;
217 }
218
219 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
220 if (ret) {
221 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
222 "power control: %d\n", __func__, ret);
223 return;
224 }
225 gpio_direction_output(ON_BD_USB_DRV, 0);
226
227 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
228 if (ret) {
229 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
230 "over-current indicator: %d\n", __func__, ret);
231 return;
232 }
233 gpio_direction_input(ON_BD_USB_OVC);
234
235 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
236 if (ret)
237 pr_warning("%s: USB 1.1 registration failed: %d\n",
238 __func__, ret);
239}
240
Mark A. Greer85937902009-06-03 18:41:53 -0700241static struct davinci_uart_config da830_evm_uart_config __initdata = {
242 .enabled_uarts = 0x7,
243};
244
Mark A. Greer32bf0782009-08-28 15:05:21 -0700245static const short da830_evm_mcasp1_pins[] = {
246 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
247 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
248 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
249 DA830_AXR1_11,
250 -1
251};
252
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400253static u8 da830_iis_serializer_direction[] = {
254 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
255 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
256 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
257};
258
259static struct snd_platform_data da830_evm_snd_data = {
260 .tx_dma_offset = 0x2000,
261 .rx_dma_offset = 0x2000,
262 .op_mode = DAVINCI_MCASP_IIS_MODE,
263 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
264 .tdm_slots = 2,
265 .serial_dir = da830_iis_serializer_direction,
266 .eventq_no = EVENTQ_0,
267 .version = MCASP_VERSION_2,
268 .txnumevt = 1,
269 .rxnumevt = 1,
270};
271
David A. Griego2eb30c82009-09-15 18:10:20 -0700272/*
273 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
274 */
275static const short da830_evm_mmc_sd_pins[] = {
276 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
277 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
278 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
279 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
280 -1
281};
282
283#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
284
285static int da830_evm_mmc_get_ro(int index)
286{
287 return gpio_get_value(DA830_MMCSD_WP_PIN);
288}
289
290static struct davinci_mmc_config da830_evm_mmc_config = {
291 .get_ro = da830_evm_mmc_get_ro,
292 .wires = 4,
293 .version = MMC_CTLR_VERSION_2,
294};
295
296static inline void da830_evm_init_mmc(void)
297{
298 int ret;
299
300 ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins);
301 if (ret) {
302 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
303 ret);
304 return;
305 }
306
307 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
308 if (ret) {
309 pr_warning("da830_evm_init: can not open GPIO %d\n",
310 DA830_MMCSD_WP_PIN);
311 return;
312 }
313 gpio_direction_input(DA830_MMCSD_WP_PIN);
314
315 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
316 if (ret) {
317 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
318 ret);
319 gpio_free(DA830_MMCSD_WP_PIN);
320 }
321}
322
David A. Griego733975a2009-09-18 14:15:18 -0700323#ifdef CONFIG_DA830_UI_NAND
324static struct mtd_partition da830_evm_nand_partitions[] = {
325 /* bootloader (U-Boot, etc) in first sector */
326 [0] = {
327 .name = "bootloader",
328 .offset = 0,
329 .size = SZ_128K,
330 .mask_flags = MTD_WRITEABLE, /* force read-only */
331 },
332 /* bootloader params in the next sector */
333 [1] = {
334 .name = "params",
335 .offset = MTDPART_OFS_APPEND,
336 .size = SZ_128K,
337 .mask_flags = MTD_WRITEABLE, /* force read-only */
338 },
339 /* kernel */
340 [2] = {
341 .name = "kernel",
342 .offset = MTDPART_OFS_APPEND,
343 .size = SZ_2M,
344 .mask_flags = 0,
345 },
346 /* file system */
347 [3] = {
348 .name = "filesystem",
349 .offset = MTDPART_OFS_APPEND,
350 .size = MTDPART_SIZ_FULL,
351 .mask_flags = 0,
352 }
353};
354
355/* flash bbt decriptors */
356static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
357static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
358
359static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
360 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
361 NAND_BBT_WRITE | NAND_BBT_2BIT |
362 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
363 .offs = 2,
364 .len = 4,
365 .veroffs = 16,
366 .maxblocks = 4,
367 .pattern = da830_evm_nand_bbt_pattern
368};
369
370static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
371 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
372 NAND_BBT_WRITE | NAND_BBT_2BIT |
373 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
374 .offs = 2,
375 .len = 4,
376 .veroffs = 16,
377 .maxblocks = 4,
378 .pattern = da830_evm_nand_mirror_pattern
379};
380
381static struct davinci_nand_pdata da830_evm_nand_pdata = {
382 .parts = da830_evm_nand_partitions,
383 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
384 .ecc_mode = NAND_ECC_HW,
385 .ecc_bits = 4,
386 .options = NAND_USE_FLASH_BBT,
387 .bbt_td = &da830_evm_nand_bbt_main_descr,
388 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
389};
390
391static struct resource da830_evm_nand_resources[] = {
392 [0] = { /* First memory resource is NAND I/O window */
393 .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE,
394 .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1,
395 .flags = IORESOURCE_MEM,
396 },
397 [1] = { /* Second memory resource is AEMIF control registers */
398 .start = DA830_EMIF25_CONTROL_BASE,
399 .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1,
400 .flags = IORESOURCE_MEM,
401 },
402};
403
404static struct platform_device da830_evm_nand_device = {
405 .name = "davinci_nand",
406 .id = 1,
407 .dev = {
408 .platform_data = &da830_evm_nand_pdata,
409 },
410 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
411 .resource = da830_evm_nand_resources,
412};
413#endif
414
415static struct platform_device *da830_evm_devices[] __initdata = {
416#ifdef CONFIG_DA830_UI_NAND
417 &da830_evm_nand_device,
418#endif
419};
420
421/*
422 * UI board NAND/NOR flashes only use 8-bit data bus.
423 */
424static const short da830_evm_emif25_pins[] = {
425 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
426 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
427 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
428 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
429 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
430 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
431 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
432 -1
433};
434
Mark A. Greer85937902009-06-03 18:41:53 -0700435static __init void da830_evm_init(void)
436{
437 struct davinci_soc_info *soc_info = &davinci_soc_info;
438 int ret;
439
440 ret = da8xx_register_edma();
441 if (ret)
442 pr_warning("da830_evm_init: edma registration failed: %d\n",
443 ret);
444
Sudhakar Rajashekharac96b56c2009-07-16 05:45:32 -0400445 ret = da8xx_pinmux_setup(da830_i2c0_pins);
Mark A. Greer85937902009-06-03 18:41:53 -0700446 if (ret)
447 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
448 ret);
449
450 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
451 if (ret)
452 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
453 ret);
454
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400455 da830_evm_usb_init();
456
Mark A. Greer85937902009-06-03 18:41:53 -0700457 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
458 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
459 soc_info->emac_pdata->rmii_en = 1;
460
Sudhakar Rajashekharac96b56c2009-07-16 05:45:32 -0400461 ret = da8xx_pinmux_setup(da830_cpgmac_pins);
Mark A. Greer85937902009-06-03 18:41:53 -0700462 if (ret)
463 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
464 ret);
465
466 ret = da8xx_register_emac();
467 if (ret)
468 pr_warning("da830_evm_init: emac registration failed: %d\n",
469 ret);
470
471 ret = da8xx_register_watchdog();
472 if (ret)
473 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
474 ret);
475
476 davinci_serial_init(&da830_evm_uart_config);
477 i2c_register_board_info(1, da830_evm_i2c_devices,
478 ARRAY_SIZE(da830_evm_i2c_devices));
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400479
Mark A. Greer32bf0782009-08-28 15:05:21 -0700480 ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins);
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400481 if (ret)
482 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
483 ret);
484
Mark A. Greerb8864aa2009-08-28 15:05:02 -0700485 da8xx_register_mcasp(1, &da830_evm_snd_data);
David A. Griego2eb30c82009-09-15 18:10:20 -0700486
487 da830_evm_init_mmc();
Steve Chen13e1f042009-09-15 18:15:06 -0700488
David A. Griego733975a2009-09-18 14:15:18 -0700489#ifdef CONFIG_DA830_UI
Steve Chen13e1f042009-09-15 18:15:06 -0700490#ifdef CONFIG_DA830_UI_LCD
491 ret = da8xx_pinmux_setup(da830_lcdcntl_pins);
492 if (ret)
493 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
494 ret);
495
496 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
497 if (ret)
498 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
David A. Griego733975a2009-09-18 14:15:18 -0700499#else /* Must be NAND or NOR */
500 ret = da8xx_pinmux_setup(da830_evm_emif25_pins);
501 if (ret)
502 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
503 ret);
504
505 ret = platform_add_devices(da830_evm_devices,
506 ARRAY_SIZE(da830_evm_devices));
507 if (ret)
508 pr_warning("da830_evm_init: EVM devices not added\n");
509#endif
Steve Chen13e1f042009-09-15 18:15:06 -0700510#endif
Mark A. Greerc51df702009-09-15 18:15:54 -0700511
512 ret = da8xx_register_rtc();
513 if (ret)
514 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
Mark A. Greer85937902009-06-03 18:41:53 -0700515}
516
517#ifdef CONFIG_SERIAL_8250_CONSOLE
518static int __init da830_evm_console_init(void)
519{
520 return add_preferred_console("ttyS", 2, "115200");
521}
522console_initcall(da830_evm_console_init);
523#endif
524
525static __init void da830_evm_irq_init(void)
526{
527 struct davinci_soc_info *soc_info = &davinci_soc_info;
528
529 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
530 soc_info->intc_irq_prios);
531}
532
533static void __init da830_evm_map_io(void)
534{
535 da830_init();
536}
537
Kevin Hilman6af65642009-09-29 11:49:46 -0700538MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
Mark A. Greer85937902009-06-03 18:41:53 -0700539 .phys_io = IO_PHYS,
540 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
541 .boot_params = (DA8XX_DDR_BASE + 0x100),
542 .map_io = da830_evm_map_io,
543 .init_irq = da830_evm_irq_init,
544 .timer = &davinci_timer,
545 .init_machine = da830_evm_init,
546MACHINE_END