| Catalin Marinas | f884b1c | 2007-07-12 16:10:22 +0100 | [diff] [blame] | 1 | #ifndef __ASMARM_HWCAP_H |
| 2 | #define __ASMARM_HWCAP_H |
| 3 | |
| 4 | /* |
| 5 | * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP |
| 6 | */ |
| Will Deacon | 194a7f7 | 2011-06-03 14:09:37 +0100 | [diff] [blame] | 7 | #define HWCAP_SWP (1 << 0) |
| 8 | #define HWCAP_HALF (1 << 1) |
| 9 | #define HWCAP_THUMB (1 << 2) |
| 10 | #define HWCAP_26BIT (1 << 3) /* Play it safe */ |
| 11 | #define HWCAP_FAST_MULT (1 << 4) |
| 12 | #define HWCAP_FPA (1 << 5) |
| 13 | #define HWCAP_VFP (1 << 6) |
| 14 | #define HWCAP_EDSP (1 << 7) |
| 15 | #define HWCAP_JAVA (1 << 8) |
| 16 | #define HWCAP_IWMMXT (1 << 9) |
| 17 | #define HWCAP_CRUNCH (1 << 10) |
| 18 | #define HWCAP_THUMBEE (1 << 11) |
| 19 | #define HWCAP_NEON (1 << 12) |
| 20 | #define HWCAP_VFPv3 (1 << 13) |
| 21 | #define HWCAP_VFPv3D16 (1 << 14) |
| 22 | #define HWCAP_TLS (1 << 15) |
| Will Deacon | 254cdf8 | 2011-06-03 14:15:22 +0100 | [diff] [blame] | 23 | #define HWCAP_VFPv4 (1 << 16) |
| 24 | #define HWCAP_IDIVA (1 << 17) |
| 25 | #define HWCAP_IDIVT (1 << 18) |
| 26 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) |
| Catalin Marinas | f884b1c | 2007-07-12 16:10:22 +0100 | [diff] [blame] | 27 | |
| David Howells | 1632b9e | 2011-12-13 15:07:49 +0000 | [diff] [blame] | 28 | #if defined(__KERNEL__) |
| 29 | #if !defined(__ASSEMBLY__) |
| Catalin Marinas | f884b1c | 2007-07-12 16:10:22 +0100 | [diff] [blame] | 30 | /* |
| 31 | * This yields a mask that user programs can use to figure out what |
| 32 | * instruction set this cpu supports. |
| 33 | */ |
| 34 | #define ELF_HWCAP (elf_hwcap) |
| 35 | extern unsigned int elf_hwcap; |
| 36 | #endif |
| David Howells | 1632b9e | 2011-12-13 15:07:49 +0000 | [diff] [blame] | 37 | #endif |
| Catalin Marinas | f884b1c | 2007-07-12 16:10:22 +0100 | [diff] [blame] | 38 | |
| 39 | #endif |