| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/include/asm/pgtable-2level-hwdef.h |
| 3 | * |
| 4 | * Copyright (C) 1995-2002 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | #ifndef _ASM_PGTABLE_2LEVEL_HWDEF_H |
| 11 | #define _ASM_PGTABLE_2LEVEL_HWDEF_H |
| 12 | |
| 13 | /* |
| 14 | * Hardware page table definitions. |
| 15 | * |
| 16 | * + Level 1 descriptor (PMD) |
| 17 | * - common |
| 18 | */ |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 19 | #define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0) |
| 20 | #define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) |
| 21 | #define PMD_TYPE_TABLE (_AT(pmdval_t, 1) << 0) |
| 22 | #define PMD_TYPE_SECT (_AT(pmdval_t, 2) << 0) |
| 23 | #define PMD_BIT4 (_AT(pmdval_t, 1) << 4) |
| 24 | #define PMD_DOMAIN(x) (_AT(pmdval_t, (x)) << 5) |
| 25 | #define PMD_PROTECTION (_AT(pmdval_t, 1) << 9) /* v5 */ |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 26 | /* |
| 27 | * - section |
| 28 | */ |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 29 | #define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) |
| 30 | #define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) |
| 31 | #define PMD_SECT_XN (_AT(pmdval_t, 1) << 4) /* v6 */ |
| 32 | #define PMD_SECT_AP_WRITE (_AT(pmdval_t, 1) << 10) |
| 33 | #define PMD_SECT_AP_READ (_AT(pmdval_t, 1) << 11) |
| 34 | #define PMD_SECT_TEX(x) (_AT(pmdval_t, (x)) << 12) /* v5 */ |
| 35 | #define PMD_SECT_APX (_AT(pmdval_t, 1) << 15) /* v6 */ |
| 36 | #define PMD_SECT_S (_AT(pmdval_t, 1) << 16) /* v6 */ |
| 37 | #define PMD_SECT_nG (_AT(pmdval_t, 1) << 17) /* v6 */ |
| 38 | #define PMD_SECT_SUPER (_AT(pmdval_t, 1) << 18) /* v6 */ |
| 39 | #define PMD_SECT_AF (_AT(pmdval_t, 0)) |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 40 | |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 41 | #define PMD_SECT_UNCACHED (_AT(pmdval_t, 0)) |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 42 | #define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) |
| 43 | #define PMD_SECT_WT (PMD_SECT_CACHEABLE) |
| 44 | #define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) |
| 45 | #define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) |
| 46 | #define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) |
| 47 | #define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) |
| 48 | |
| 49 | /* |
| 50 | * - coarse table (not used) |
| 51 | */ |
| 52 | |
| 53 | /* |
| 54 | * + Level 2 descriptor (PTE) |
| 55 | * - common |
| 56 | */ |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 57 | #define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) |
| 58 | #define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) |
| 59 | #define PTE_TYPE_LARGE (_AT(pteval_t, 1) << 0) |
| 60 | #define PTE_TYPE_SMALL (_AT(pteval_t, 2) << 0) |
| 61 | #define PTE_TYPE_EXT (_AT(pteval_t, 3) << 0) /* v5 */ |
| 62 | #define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) |
| 63 | #define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 64 | |
| 65 | /* |
| 66 | * - extended small page/tiny page |
| 67 | */ |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 68 | #define PTE_EXT_XN (_AT(pteval_t, 1) << 0) /* v6 */ |
| 69 | #define PTE_EXT_AP_MASK (_AT(pteval_t, 3) << 4) |
| 70 | #define PTE_EXT_AP0 (_AT(pteval_t, 1) << 4) |
| 71 | #define PTE_EXT_AP1 (_AT(pteval_t, 2) << 4) |
| 72 | #define PTE_EXT_AP_UNO_SRO (_AT(pteval_t, 0) << 4) |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 73 | #define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) |
| 74 | #define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) |
| 75 | #define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 76 | #define PTE_EXT_TEX(x) (_AT(pteval_t, (x)) << 6) /* v5 */ |
| 77 | #define PTE_EXT_APX (_AT(pteval_t, 1) << 9) /* v6 */ |
| 78 | #define PTE_EXT_COHERENT (_AT(pteval_t, 1) << 9) /* XScale3 */ |
| 79 | #define PTE_EXT_SHARED (_AT(pteval_t, 1) << 10) /* v6 */ |
| 80 | #define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* v6 */ |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 81 | |
| 82 | /* |
| 83 | * - small page |
| 84 | */ |
| Catalin Marinas | 442e70c | 2011-09-05 17:51:56 +0100 | [diff] [blame] | 85 | #define PTE_SMALL_AP_MASK (_AT(pteval_t, 0xff) << 4) |
| 86 | #define PTE_SMALL_AP_UNO_SRO (_AT(pteval_t, 0x00) << 4) |
| 87 | #define PTE_SMALL_AP_UNO_SRW (_AT(pteval_t, 0x55) << 4) |
| 88 | #define PTE_SMALL_AP_URO_SRW (_AT(pteval_t, 0xaa) << 4) |
| 89 | #define PTE_SMALL_AP_URW_SRW (_AT(pteval_t, 0xff) << 4) |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 90 | |
| Catalin Marinas | d7c5d0d | 2011-09-05 17:52:36 +0100 | [diff] [blame] | 91 | #define PHYS_MASK (~0UL) |
| 92 | |
| Catalin Marinas | 17f5721 | 2011-09-05 17:41:02 +0100 | [diff] [blame] | 93 | #endif |