blob: 558d6c80aca9cc292c5d3d50e99ee705535fe868 [file] [log] [blame]
Russell Kinge616c592009-09-27 20:55:43 +01001/*
2 * ARM specific SMP header, this contains our implementation
3 * details.
4 */
5#ifndef __ASMARM_SMP_PLAT_H
6#define __ASMARM_SMP_PLAT_H
7
8#include <asm/cputype.h>
9
Russell Kingf00ec482010-09-04 10:47:48 +010010/*
11 * Return true if we are running on a SMP platform
12 */
13static inline bool is_smp(void)
14{
15#ifndef CONFIG_SMP
16 return false;
17#elif defined(CONFIG_SMP_ON_UP)
18 extern unsigned int smp_on_up;
19 return !!smp_on_up;
20#else
21 return true;
22#endif
23}
24
Russell Kinge616c592009-09-27 20:55:43 +010025/* all SMP configurations have the extended CPUID registers */
26static inline int tlb_ops_need_broadcast(void)
27{
Tony Lindgren7511db92010-10-05 16:40:13 +010028 if (!is_smp())
29 return 0;
30
Russell Kinge616c592009-09-27 20:55:43 +010031 return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
32}
33
Catalin Marinas85848dd2010-09-13 15:58:37 +010034#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
35#define cache_ops_need_broadcast() 0
36#else
Russell King2ef7f3d2009-11-05 13:29:36 +000037static inline int cache_ops_need_broadcast(void)
38{
Tony Lindgren7511db92010-10-05 16:40:13 +010039 if (!is_smp())
40 return 0;
41
Russell King2ef7f3d2009-11-05 13:29:36 +000042 return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
43}
Catalin Marinas85848dd2010-09-13 15:58:37 +010044#endif
Russell King2ef7f3d2009-11-05 13:29:36 +000045
Will Deaconeb504392012-01-20 12:01:12 +010046/*
47 * Logical CPU mapping.
48 */
49extern int __cpu_logical_map[];
50#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
51
Russell Kinge616c592009-09-27 20:55:43 +010052#endif