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Vitaly Wool78818e42006-05-16 11:54:37 +01001/*
2 * linux/arch/arm/mach-pnx4008/serial.c
3 *
4 * PNX4008 UART initialization
5 *
6 * Copyright: MontaVista Software Inc. (c) 2005
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
Vitaly Wool78818e42006-05-16 11:54:37 +010012#include <linux/kernel.h>
13#include <linux/types.h>
Russell Kingfced80c2008-09-06 12:10:45 +010014#include <linux/io.h>
Vitaly Wool78818e42006-05-16 11:54:37 +010015
Russell Kinga09e64f2008-08-05 16:14:15 +010016#include <mach/platform.h>
17#include <mach/hardware.h>
Vitaly Wool78818e42006-05-16 11:54:37 +010018
19#include <linux/serial_core.h>
20#include <linux/serial_reg.h>
Vitaly Wool78818e42006-05-16 11:54:37 +010021
Linus Walleija1e6b412011-08-23 12:51:24 +010022#include <mach/gpio-pnx4008.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010023#include <mach/clock.h>
Vitaly Wool78818e42006-05-16 11:54:37 +010024
25#define UART_3 0
26#define UART_4 1
27#define UART_5 2
28#define UART_6 3
29#define UART_UNKNOWN (-1)
30
31#define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE)
32#define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE)
33#define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE)
34#define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
35
36#define UART_FCR_OFFSET 8
37#define UART_FIFO_SIZE 64
38
39void pnx4008_uart_init(void)
40{
41 u32 tmp;
42 int i = UART_FIFO_SIZE;
43
44 __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET);
45 __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET);
46
47 /* Send a NULL to fix the UART HW bug */
48 __raw_writel(0x00, UART5_BASE_VA);
49 __raw_writel(0x00, UART3_BASE_VA);
50
51 while (i--) {
52 tmp = __raw_readl(UART5_BASE_VA);
53 tmp = __raw_readl(UART3_BASE_VA);
54 }
55 __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET);
56 __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
57
58 /* setup wakeup interrupt */
59 start_int_set_rising_edge(SE_U3_RX_INT);
60 start_int_ack(SE_U3_RX_INT);
61 start_int_umask(SE_U3_RX_INT);
62
63 start_int_set_rising_edge(SE_U5_RX_INT);
64 start_int_ack(SE_U5_RX_INT);
65 start_int_umask(SE_U5_RX_INT);
66}
67