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Ralf Baechlee7c47822007-07-10 17:33:01 +01001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
Ralf Baechle566a3b92008-12-01 08:16:08 +00006 * Copyright (C) 2006, 07 MIPS Technologies, Inc.
Ralf Baechlee7c47822007-07-10 17:33:01 +01007 * written by Ralf Baechle (ralf@linux-mips.org)
Ralf Baechle566a3b92008-12-01 08:16:08 +00008 * written by Ralf Baechle <ralf@linux-mips.org>
Ralf Baechlee7c47822007-07-10 17:33:01 +01009 *
Tiejun Chen192cc7f2008-11-25 16:33:20 +080010 * Copyright (C) 2008 Wind River Systems, Inc.
11 * updated by Tiejun Chen <tiejun.chen@windriver.com>
12 *
13 * 1. Probe driver for the Malta's UART ports:
Ralf Baechlee7c47822007-07-10 17:33:01 +010014 *
15 * o 2 ports in the SMC SuperIO
16 * o 1 port in the CBUS UART, a discrete 16550 which normally is only used
17 * for bringups.
18 *
19 * We don't use 8250_platform.c on Malta as it would result in the CBUS
20 * UART becoming ttyS0.
Tiejun Chen192cc7f2008-11-25 16:33:20 +080021 *
22 * 2. Register RTC-CMOS platform device on Malta.
Ralf Baechlee7c47822007-07-10 17:33:01 +010023 */
Ralf Baechlee7c47822007-07-10 17:33:01 +010024#include <linux/init.h>
25#include <linux/serial_8250.h>
Tiejun Chen192cc7f2008-11-25 16:33:20 +080026#include <linux/mc146818rtc.h>
Ralf Baechle566a3b92008-12-01 08:16:08 +000027#include <linux/module.h>
David Howellsca4d3e672010-10-07 14:08:54 +010028#include <linux/irq.h>
Ralf Baechle566a3b92008-12-01 08:16:08 +000029#include <linux/mtd/partitions.h>
30#include <linux/mtd/physmap.h>
Tiejun Chen192cc7f2008-11-25 16:33:20 +080031#include <linux/platform_device.h>
Ralf Baechle225ae5f2012-11-13 10:41:50 +010032#include <asm/mips-boards/maltaint.h>
Ralf Baechle566a3b92008-12-01 08:16:08 +000033#include <mtd/mtd-abi.h>
Ralf Baechlee7c47822007-07-10 17:33:01 +010034
35#define SMC_PORT(base, int) \
36{ \
37 .iobase = base, \
38 .irq = int, \
39 .uartclk = 1843200, \
40 .iotype = UPIO_PORT, \
41 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
42 .regshift = 0, \
43}
44
45#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
46
47static struct plat_serial8250_port uart8250_data[] = {
48 SMC_PORT(0x3F8, 4),
49 SMC_PORT(0x2F8, 3),
Leonid Yegoshinf6ba0612013-10-14 09:49:25 +010050#ifndef CONFIG_MIPS_CMP
Ralf Baechlee7c47822007-07-10 17:33:01 +010051 {
52 .mapbase = 0x1f000900, /* The CBUS UART */
Ralf Baechle225ae5f2012-11-13 10:41:50 +010053 .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
Ralf Baechlee7c47822007-07-10 17:33:01 +010054 .uartclk = 3686400, /* Twice the usual clk! */
55 .iotype = UPIO_MEM32,
56 .flags = CBUS_UART_FLAGS,
57 .regshift = 3,
58 },
Leonid Yegoshinf6ba0612013-10-14 09:49:25 +010059#endif
Ralf Baechlee7c47822007-07-10 17:33:01 +010060 { },
61};
62
Tiejun Chen192cc7f2008-11-25 16:33:20 +080063static struct platform_device malta_uart8250_device = {
Ralf Baechlee7c47822007-07-10 17:33:01 +010064 .name = "serial8250",
Ralf Baechle566a3b92008-12-01 08:16:08 +000065 .id = PLAT8250_DEV_PLATFORM,
Ralf Baechlee7c47822007-07-10 17:33:01 +010066 .dev = {
67 .platform_data = uart8250_data,
68 },
69};
70
Tiejun Chen192cc7f2008-11-25 16:33:20 +080071struct resource malta_rtc_resources[] = {
72 {
73 .start = RTC_PORT(0),
74 .end = RTC_PORT(7),
75 .flags = IORESOURCE_IO,
76 }, {
77 .start = RTC_IRQ,
78 .end = RTC_IRQ,
79 .flags = IORESOURCE_IRQ,
80 }
81};
82
83static struct platform_device malta_rtc_device = {
84 .name = "rtc_cmos",
85 .id = -1,
86 .resource = malta_rtc_resources,
87 .num_resources = ARRAY_SIZE(malta_rtc_resources),
88};
89
Ralf Baechle566a3b92008-12-01 08:16:08 +000090static struct mtd_partition malta_mtd_partitions[] = {
91 {
92 .name = "YAMON",
93 .offset = 0x0,
94 .size = 0x100000,
95 .mask_flags = MTD_WRITEABLE
96 }, {
97 .name = "User FS",
Ralf Baechle70342282013-01-22 12:59:30 +010098 .offset = 0x100000,
Ralf Baechle566a3b92008-12-01 08:16:08 +000099 .size = 0x2e0000
100 }, {
101 .name = "Board Config",
102 .offset = 0x3e0000,
103 .size = 0x020000,
104 .mask_flags = MTD_WRITEABLE
105 }
106};
107
108static struct physmap_flash_data malta_flash_data = {
109 .width = 4,
110 .nr_parts = ARRAY_SIZE(malta_mtd_partitions),
111 .parts = malta_mtd_partitions
112};
113
114static struct resource malta_flash_resource = {
115 .start = 0x1e000000,
116 .end = 0x1e3fffff,
117 .flags = IORESOURCE_MEM
118};
119
120static struct platform_device malta_flash_device = {
121 .name = "physmap-flash",
122 .id = 0,
123 .dev = {
124 .platform_data = &malta_flash_data,
125 },
126 .num_resources = 1,
127 .resource = &malta_flash_resource,
128};
129
Tiejun Chen192cc7f2008-11-25 16:33:20 +0800130static struct platform_device *malta_devices[] __initdata = {
131 &malta_uart8250_device,
132 &malta_rtc_device,
Ralf Baechle566a3b92008-12-01 08:16:08 +0000133 &malta_flash_device,
Tiejun Chen192cc7f2008-11-25 16:33:20 +0800134};
135
136static int __init malta_add_devices(void)
Ralf Baechlee7c47822007-07-10 17:33:01 +0100137{
Tiejun Chen192cc7f2008-11-25 16:33:20 +0800138 int err;
139
140 err = platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
141 if (err)
142 return err;
143
Tiejun Chen192cc7f2008-11-25 16:33:20 +0800144 return 0;
Ralf Baechlee7c47822007-07-10 17:33:01 +0100145}
146
Tiejun Chen192cc7f2008-11-25 16:33:20 +0800147device_initcall(malta_add_devices);