blob: 9aedaf77013cccb26dd1f83821c70cd10615c1ab [file] [log] [blame]
Erik Gillingc5f80062010-01-21 16:53:02 -08001/*
2 * arch/arm/mach-tegra/board-harmony.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/io.h>
22
23#include <asm/hardware/cache-l2x0.h>
24
25#include <mach/iomap.h>
26
27#include "board.h"
Colin Crossd8611962010-01-28 16:40:29 -080028#include "clock.h"
Colin Cross73625e32010-06-23 15:49:17 -070029#include "fuse.h"
Colin Crossd8611962010-01-28 16:40:29 -080030
31static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
32 /* name parent rate enabled */
33 { "clk_m", NULL, 0, true },
34 { "pll_p", "clk_m", 216000000, true },
35 { "pll_p_out1", "pll_p", 28800000, true },
36 { "pll_p_out2", "pll_p", 48000000, true },
37 { "pll_p_out3", "pll_p", 72000000, true },
38 { "pll_p_out4", "pll_p", 108000000, true },
39 { "sys", "pll_p_out4", 108000000, true },
40 { "hclk", "sys", 108000000, true },
41 { "pclk", "hclk", 54000000, true },
42 { NULL, NULL, 0, 0},
43};
Erik Gillingc5f80062010-01-21 16:53:02 -080044
45void __init tegra_init_cache(void)
46{
47#ifdef CONFIG_CACHE_L2X0
48 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
49
50 writel(0x331, p + L2X0_TAG_LATENCY_CTRL);
51 writel(0x441, p + L2X0_DATA_LATENCY_CTRL);
52
53 l2x0_init(p, 0x6C080001, 0x8200c3fe);
54#endif
55}
56
57void __init tegra_common_init(void)
58{
Colin Cross73625e32010-06-23 15:49:17 -070059 tegra_init_fuse();
Colin Crossd8611962010-01-28 16:40:29 -080060 tegra_init_clock();
61 tegra_clk_init_from_table(common_clk_init_table);
Erik Gillingc5f80062010-01-21 16:53:02 -080062 tegra_init_cache();
63}