| Richard Purdie | 0dd28f1 | 2005-09-13 01:25:34 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Hardware specific definitions for SL-Cx000 series of PDAs |
| 3 | * |
| 4 | * Copyright (c) 2005 Alexander Wykes |
| 5 | * Copyright (c) 2005 Richard Purdie |
| 6 | * |
| 7 | * Based on Sharp's 2.4 kernel patches |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | */ |
| 14 | #ifndef __ASM_ARCH_SPITZ_H |
| 15 | #define __ASM_ARCH_SPITZ_H 1 |
| 16 | #endif |
| 17 | |
| 18 | /* Spitz/Akita GPIOs */ |
| 19 | |
| 20 | #define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */ |
| 21 | #define SPITZ_GPIO_RESET (1) |
| 22 | #define SPITZ_GPIO_nSD_DETECT (9) |
| 23 | #define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */ |
| 24 | #define SPITZ_GPIO_AK_INT (13) /* Remote Control */ |
| 25 | #define SPITZ_GPIO_ADS7846_CS (14) |
| 26 | #define SPITZ_GPIO_SYNC (16) |
| 27 | #define SPITZ_GPIO_MAX1111_CS (20) |
| 28 | #define SPITZ_GPIO_FATAL_BAT (21) |
| 29 | #define SPITZ_GPIO_HSYNC (22) |
| 30 | #define SPITZ_GPIO_nSD_CLK (32) |
| 31 | #define SPITZ_GPIO_USB_DEVICE (35) |
| 32 | #define SPITZ_GPIO_USB_HOST (37) |
| 33 | #define SPITZ_GPIO_USB_CONNECT (41) |
| 34 | #define SPITZ_GPIO_LCDCON_CS (53) |
| 35 | #define SPITZ_GPIO_nPCE (54) |
| 36 | #define SPITZ_GPIO_nSD_WP (81) |
| 37 | #define SPITZ_GPIO_ON_RESET (89) |
| 38 | #define SPITZ_GPIO_BAT_COVER (90) |
| 39 | #define SPITZ_GPIO_CF_CD (94) |
| 40 | #define SPITZ_GPIO_ON_KEY (95) |
| 41 | #define SPITZ_GPIO_SWA (97) |
| 42 | #define SPITZ_GPIO_SWB (96) |
| 43 | #define SPITZ_GPIO_CHRG_FULL (101) |
| 44 | #define SPITZ_GPIO_CO (101) |
| 45 | #define SPITZ_GPIO_CF_IRQ (105) |
| 46 | #define SPITZ_GPIO_AC_IN (115) |
| 47 | #define SPITZ_GPIO_HP_IN (116) |
| 48 | |
| 49 | /* Spitz Only GPIOs */ |
| 50 | |
| 51 | #define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */ |
| 52 | #define SPITZ_GPIO_CF2_CD (93) |
| 53 | |
| 54 | |
| 55 | /* Spitz/Akita Keyboard Definitions */ |
| 56 | |
| 57 | #define SPITZ_KEY_STROBE_NUM (11) |
| 58 | #define SPITZ_KEY_SENSE_NUM (7) |
| 59 | #define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000 |
| 60 | #define SPITZ_GPIO_G1_STROBE_BIT 0x00100000 |
| 61 | #define SPITZ_GPIO_G2_STROBE_BIT 0x01000000 |
| 62 | #define SPITZ_GPIO_G3_STROBE_BIT 0x00041880 |
| 63 | #define SPITZ_GPIO_G0_SENSE_BIT 0x00021000 |
| 64 | #define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4 |
| 65 | #define SPITZ_GPIO_G2_SENSE_BIT 0x08000000 |
| 66 | #define SPITZ_GPIO_G3_SENSE_BIT 0x00000000 |
| 67 | |
| 68 | #define SPITZ_GPIO_KEY_STROBE0 88 |
| 69 | #define SPITZ_GPIO_KEY_STROBE1 23 |
| 70 | #define SPITZ_GPIO_KEY_STROBE2 24 |
| 71 | #define SPITZ_GPIO_KEY_STROBE3 25 |
| 72 | #define SPITZ_GPIO_KEY_STROBE4 26 |
| 73 | #define SPITZ_GPIO_KEY_STROBE5 27 |
| 74 | #define SPITZ_GPIO_KEY_STROBE6 52 |
| 75 | #define SPITZ_GPIO_KEY_STROBE7 103 |
| 76 | #define SPITZ_GPIO_KEY_STROBE8 107 |
| 77 | #define SPITZ_GPIO_KEY_STROBE9 108 |
| 78 | #define SPITZ_GPIO_KEY_STROBE10 114 |
| 79 | |
| 80 | #define SPITZ_GPIO_KEY_SENSE0 12 |
| 81 | #define SPITZ_GPIO_KEY_SENSE1 17 |
| 82 | #define SPITZ_GPIO_KEY_SENSE2 91 |
| 83 | #define SPITZ_GPIO_KEY_SENSE3 34 |
| 84 | #define SPITZ_GPIO_KEY_SENSE4 36 |
| 85 | #define SPITZ_GPIO_KEY_SENSE5 38 |
| 86 | #define SPITZ_GPIO_KEY_SENSE6 39 |
| 87 | |
| 88 | |
| 89 | /* Spitz Scoop Device (No. 1) GPIOs */ |
| 90 | /* Suspend States in comments */ |
| 91 | #define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */ |
| 92 | #define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */ |
| 93 | #define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */ |
| 94 | #define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */ |
| 95 | #define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */ |
| 96 | #define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */ |
| 97 | #define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */ |
| 98 | #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ |
| 99 | #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ |
| 100 | |
| 101 | #define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ |
| 102 | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \ |
| 103 | SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
| 104 | #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) |
| 105 | #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
| 106 | #define SPITZ_SCP_SUS_SET 0 |
| 107 | |
| 108 | /* Spitz Scoop Device (No. 2) GPIOs */ |
| 109 | /* Suspend States in comments */ |
| 110 | #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ |
| 111 | #define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */ |
| 112 | #define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */ |
| 113 | #define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */ |
| 114 | #define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */ |
| 115 | #define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */ |
| 116 | #define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */ |
| 117 | #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ |
| 118 | #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ |
| 119 | |
| 120 | #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ |
| 121 | SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ |
| 122 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
| 123 | |
| 124 | #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) |
| 125 | #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ |
| 126 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
| 127 | #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) |
| 128 | |
| 129 | |
| 130 | /* Spitz IRQ Definitions */ |
| 131 | |
| 132 | #define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) |
| 133 | #define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) |
| 134 | #define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) |
| 135 | #define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) |
| 136 | #define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) |
| 137 | #define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) |
| 138 | #define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) |
| 139 | #define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) |
| 140 | #define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) |
| 141 | #define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) |
| 142 | #define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) |
| 143 | #define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) |
| 144 | #define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) |
| 145 | #define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) |
| 146 | #define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) |
| 147 | #define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) |
| 148 | #define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) |
| 149 | |
| 150 | /* |
| 151 | * Shared data structures |
| 152 | */ |
| 153 | extern struct platform_device spitzscoop_device; |
| 154 | extern struct platform_device spitzscoop2_device; |
| 155 | extern struct platform_device spitzssp_device; |
| 156 | extern struct sharpsl_charger_machinfo spitz_pm_machinfo; |
| 157 | |
| 158 | extern void spitz_lcd_power(int on); |